Still identical to the one wihtout pointers, but this version is optimised to use a const pointers. So that when we generate more than one pin they all use the same pointer registers without recreating them.

CMakeLists.txt

@@ -1,272 +0,0 @@
-cmake_minimum_required(VERSION 3.18)
-
-####################################################################################################
-# CMAKE Features
-####################################################################################################
-# do this instead of declaring languages in the beginning this WILL prevent loop errors. 
-project(${CSL_USED} ASM C CXX)		
-# Defining the executables name
-set(EXECUTABLE ${PROJECT_NAME})	
-
-####################################################################################################
-# NON-VITAL OPTION FOR COMPILATION
-####################################################################################################
-
-set(CMAKE_VERBOSE_MAKEFILE OFF)		# Should CMake print everythign ?
-
-set(OUTPUT_DOXYGEN FALSE)			# Should CMake generate Doxygen output ? 
-set(DOXYGEN_OUTPUT_DIR ${CMAKE_SOURCE_DIR}/env/doc)
-
-# TODO: discuss on where doxygen should place the output
-#		-> in env/doc
-#		-> in ked_build outside of the ked environment (prefered, as it includes also the users
-#		   project documentation
-#		idea -> creakte an override option in the projectConfig.cmake file to be able to define
-#		where and waht.
-set(PL "c")							# Used programming language, we could maybe do a check. 
-
-####################################################################################################
-# PASSED VARIABLE WHEN CALLING run.sh
-####################################################################################################
-# CSL_USED		passed by run.sh and is the quivalent of the ic name
-# PROJECT_DIR	Passed by run.sh and is the defined place where the project is. run.sh should be in
-#				the future capable of definin project paht. 
-
-####################################################################################################
-# Setting the used directory locations
-####################################################################################################
-# Location of the project : It is defaulted to one Higher than the KED Directory :TODO: Shall we let
-set(PROJECT_CONFIG_FILE ${PROJECT_DIR}/projectDefinitions.cmake)
-
-# Location of the cmkae core funtionalities / funtions / definitions
-set(CMAKE_CORE_DIR ${CMAKE_SOURCE_DIR}/env/cmake_core)		
-set(COMPILER_DEFS ${CMAKE_CORE_DIR}/compiler.cmake) 
-
-# Location of CSL, CSL_USED is passed as an argument to CMake from run.sh 
-# -> "Specific to each CSL"
-set(CSL_DIR ${CMAKE_SOURCE_DIR}/csl/${CSL_USED})		
-set(CSL_CONFIG_FILE ${CSL_DIR}/config.cmake)
-
-# To Put one layer down so that CMSIS is defined by the CSL it's core specific stuff
-set(CSL_SOURCES_DIR ${CSL_DIR}/implementation)
-set(CSL_HEADERS_DIR ${CSL_DIR}/CMSIS/Include ${CSL_DIR}/HardwareDescription)
-set(CSL_STARTUP_DIR ${CSL_DIR}/startup)
-####################################################################################
-
-# Directiry fot the drivers	-> "Common to all CSL"
-set(DRIVERS_DIR ${CMAKE_SOURCE_DIR}/drivers)			
-set(DRIVERS_HEADERS_DIR) #Declared empty because it will be filled automaticaly afterwards			
-
-# Directory fot the peripherals	-> "Common to all CSL"
-set(PERIPHERALS_DIR ${CMAKE_SOURCE_DIR}/peripherals)	
-set(PERIPHERALS_HEADERS_DIR)#Declared empty because it will be filled automaticaly afterwards
-set(PERIPHERAL_LIBS)#Declared empty because it will be filled automaticaly afterwards
-
-# Directory for the libraries -> "Common to all CSL"
-set(LIBRARIES_DIR ${CMAKE_SOURCE_DIR}/libraries)
-set(LIBRARIES_HEADERS_DIR)#Declared empty because it will be filled automaticaly afterwards
-set(LIBRARIES_LIBS)#Declared empty because it will be filled automaticaly afterwards
-
-# Directory for the SYSTEM -> "Common to all CSL"
-set(SYSTEM_DIR ${CMAKE_SOURCE_DIR}/system)
-set(SYSTEM_HEADERS_DIR)#Declared empty because it will be filled automaticaly afterwards
-set(SYSTEM_LIBS)#Declared empty because it will be filled automaticaly afterwards
-
-####################################################################################################
-# INCLUDES ####################################################################################################
-# Adding human readable color references for cmake
-include(${CMAKE_CORE_DIR}/colors.cmake)			
-
-# All the library and submodule funtions and definitions are written here
-include(${CMAKE_CORE_DIR}/cmakeCore.cmake)				
-
-# For Detailed error messages. 
-include(${CMAKE_CORE_DIR}/errorHandler.cmake)			
-
-# For Doxygen document generatio
-include(${CMAKE_CORE_DIR}/doxygen.cmake)			
-
-# All the library and submodule funtions and definitions are written here
-include(${CMAKE_CORE_DIR}/cmakeProject.cmake)				
-
-# Include the project definition defined by the end user implementiogn KED as a submodule
-include(${PROJECT_CONFIG_FILE})							
-
-# Here is the include fopr the awailable peripheral headers and standart libraries.
-include(${PERIPHERALS_DIR}/CMakeLists.txt)				
-
-# Here is the include fopr the awailable drivers headers and standart libraries.
-include(${DRIVERS_DIR}/CMakeLists.txt)				
-
-# Here is the include fopr the awailable libraries headers and standart libraries.
-include(${LIBRARIES_DIR}/CMakeLists.txt)				
-
-# Here is the include fopr the awailable system headers and standart libraries.
-include(${SYSTEM_DIR}/CMakeLists.txt)				
-
-# Include the config fiel where the compilers to use ar defined
-include(${COMPILER_DEFS})
-
-# Confugration file of the csl, there you will wind the starup code handling, compiler/linker
-# options, flags and definitions
-include(${CSL_CONFIG_FILE})
-
-####################################################################################################
-# HEADERS : ALL Header Definitions and calls MUST be made here to be able to propagate them through
-# all the modules
-####################################################################################################
-message("${BoldBlue}")
-message("+-------------------------------+")
-message("Adding Header Directories")
-message("+-------------------------------+")
-message("|-->For System")
-createHeaderDirList("${SYSTEM_DIR}" "${SYSTEM_LIST}" "SYSTEM_HEADERS_DIR")
-message("${BoldBlue}|-->For Peripherals")
-createHeaderDirList("${PERIPHERALS_DIR}" "${PERIPHERALS_LIST}" "PERIPHERALS_HEADERS_DIR")
-message("${BoldBlue}|-->For Drivers")
-createHeaderDirList("${DRIVERS_DIR}" "${DRIVERS_LIST}" "DRIVERS_HEADERS_DIR")
-message("${BoldBlue}|-->For Libraries")
-createHeaderDirList("${LIBRARIES_DIR}" "${LIBRARIES_LIST}" "LIBRARIES_HEADERS_DIR")
-message("${BoldBlue}|-->For Project")
-createHeaderDirListProject("${PROJECT_ADDITIONAL_DIRS}" "PROJECT_HEADERS_DIR")
-message("${BoldBlue}+-------------------------------+${ColourReset}")
-
-#Stick all the herade direcotries together for ease of use further down
-set (COMMON_HEADERS ${CSL_HEADERS_DIR} 
-					${SYSTEM_HEADERS_DIR}
-					${PERIPHERALS_HEADERS_DIR} 
-					${DRIVERS_HEADERS_DIR}
-					${LIBRARIES_HEADERS_DIR}
-					${PROJECT_HEADERS_DIR})
-
-####################################################################################################
-# Making Modules
-####################################################################################################
-message("${BoldBlue}")
-message("+-------------------------------+")
-message("Making Submolues")
-message("+-------------------------------+")
-message("|-->For System")
-makeSubmodules("${SYSTEM_DIR}" "${SYSTEM_LIST}" "SYSTEM_LIBS")	
-message("${BoldBlue}|-->For Peripherals")
-makeSubmodules("${PERIPHERALS_DIR}" "${PERIPHERALS_LIST}" "PERIPHERAL_LIBS")	
-message("${BoldBlue}|-->For Drivers")
-makeSubmodules("${DRIVERS_DIR}" "${DRIVERS_LIST}" "DRIVER_LIBS")	
-message("${BoldBlue}|-->For Libraries")
-makeSubmodules("${LIBRARIES_DIR}" "${LIBRARIES_LIST}" "LIBRARIES_LIBS")	
-message("${BoldBlue}|-->For Project")
-makeSubmodulesProject("${PROJECT_ADDITIONAL_DIRS}" "${PROJECT_TO_COMPILE_LIST}" "PROJECT_LIBS")	
-message("${BoldBlue}+-------------------------------+${ColourReset}")
-
-# Stick All the libraries together, only for code redability futher down.
-set(GENERATED_LIBRARIES	${PROJECT_LIBS}
-						${STARTUP_UCODE} 
-						${SYSTEM_LIBS}
-						${PERIPHERAL_LIBS} 
-						${DRIVER_LIBS} 
-						${LIBRARIES_LIBS})
-						
-
-####################################################################################################
-# Overview
-####################################################################################################
-message("${BoldBlue}")
-message("+-------------------------------+")
-message("Project Info")
-message("+-------------------------------+")
-message(" |--> Executable Name:${BoldCyan}	${EXECUTABLE}			${BoldBlue}")
-message(" |--> Startup uCode  :${BoldCyan}	${STARTUP_CODE}			${BoldBlue}")
-message(" |--> Linker         :${BoldCyan}	${LINKER}				${BoldBlue}")
-message(" |--> Project Dir    :${BoldCyan}	${PROJECT_DIR}			${BoldBlue}")
-message(" |--> Project Config :${BoldCyan}	${PROJECT_CONFIG_FILE}	${BoldBlue}")
-message(" |--> CSL Dir        :${BoldCyan}	${CSL_DIR}				${BoldBlue}")
-message(" |--> CSL Config     :${BoldCyan}	${CSL_CONFIG_FILE}		${BoldBlue}")
-message(" |--> Compiler Config:${BoldCyan}	${COMPILER_DEFS}		${BoldBlue}")
-
-message("${BoldBlue}")
-message("+-------------------------------+")
-message("Compiling Info")
-message("+-------------------------------+")
-message("|--> Main Compile Definitions:") 
-printList("${BoldCyan} | " "${MAIN_DEFS}")
-message("${BoldBlue}|--> Main Compile Flags:") 
-printList("${BoldCyan} | " "${MAIN_FLAGS}")
-message("${BoldBlue}|--> Linker Flags:") 
-printList("${BoldCyan} | " "${LINKER_FLAGS}")
-message("${BoldBlue}|--> Periferals which will be implemented:") 
-printList("${BoldCyan} |-> " "${PERIPHERALS_LIST}")
-message("${BoldBlue}|--> Drivers which will be implemented:")
-printList("${BoldCyan} |-> " "${DRIVERS_LIST}")
-message("${BoldBlue}|--> Project sources to be implemented:")
-printList("${BoldCyan} |-> " "${PROJECT_TO_COMPILE_LIST}")
-message("${BoldBlue}|--> Generated Library Submodules ${Red}!!!The Order Matters!!!${ColourReset}${BoldCyan}")
-printList("${BoldCyan} |-> " "${GENERATED_LIBRARIES}")
-message("${BoldBlue}+-------------------------------+${ColourReset}")
-
-####################################################################################################
-# EXECUTABLE
-####################################################################################################
-add_executable(${EXECUTABLE} ${PROJECT_DIR}/main.${PL})
-target_compile_options(${EXECUTABLE} PRIVATE ${MAIN_FLAGS})
-target_compile_definitions(${EXECUTABLE} PRIVATE ${MAIN_DEFS})
-target_include_directories(${EXECUTABLE} PUBLIC ${COMMON_HEADERS})
-
-####################################################################################################
-# LINKING EXECUTEABLE
-####################################################################################################
-message("${BoldGreen}")
-message("+-------------------------------+")
-message("Linker & Compiler Info")
-message("+-------------------------------+")
-
-if(IS_NO_SYS)
-	target_link_libraries(${EXECUTABLE} ${GENERATED_LIBRARIES})
-	target_link_options(${EXECUTABLE} PRIVATE ${LINKER_FLAGS}) 
-else ()	
-	target_link_libraries(${EXECUTABLE} ${GENERATED_LIBRARIES})
-endif()
-
-message(" |-> LINKER      : ${LINKER}")	
-message(" |-> C_COMPILER  : ${CMAKE_C_COMPILER}")
-message(" |-> CXX_COMPILER: ${CMAKE_CXX_COMPILER}")
-message(" |-> ASM_COMPILER: ${CMAKE_ASM_COMPILER}")
-message(" |-> OBJCOPY     : ${CMAKE_OBJCOPY}")
-message(" |-> SIZE        : ${CMAKE_SIZE}")
-
-# AS we provide our own linker nad not using the one from the curren OS (system)
-message(" |-> LINKER_FLAGS: ${CMAKE_EXE_LINKER_FLAGS}")
-message("+-------------------------------+")
-message("${ColourReset}")
-
-####################################################################################################
-# CUSTOM COMMANDS
-####################################################################################################
-
-if(NEED_OBJCOPY)
-	add_custom_command(TARGET ${EXECUTABLE}
-        POST_BUILD
-		COMMAND ${CMAKE_OBJCOPY} -O ihex ${EXECUTABLE} ${PROJECT_NAME}.hex
-		COMMAND ${CMAKE_OBJCOPY} -O binary ${EXECUTABLE} ${PROJECT_NAME}.bin)
-endif()
-
-add_custom_command(TARGET ${EXECUTABLE}
-        POST_BUILD
-		COMMAND ${CMAKE_SIZE} ${EXECUTABLE})
-
-
-####################################################################################################
-# Documentation generation
-####################################################################################################	
-generateDoxygen()
-
-####################################################################################################
-#CUSTOM Comments from dev.
-####################################################################################################
-# Link For header dependency : https://stackoverflow.com/questions/11216408/cmake-dependencies-
-# headers-between-apps-libraries-in-same-project
-# This is one possible trick to handle the assenbly compiling.
-# We can't use arm-non-eabi-as because it can onaly hande macros.
-# So this bizzare Variable makes shure that whne the asembly compiling is called the -x assembler-
-# with-cpp flag is passed
-# target_compile_options(${EXECUTABLE} PRIVATE
-#    $<$<COMPILE_LANGUAGE:ASM>:-x assembler-with-cpp ${ASM_FLAGS}>)

README.md

@@ -1,126 +1,43 @@
 # KED:  Wellcome to Kerem and Edwin's Develeppoment platform.
 
+# This branch is for testing and is organised as follow :
+## Goal is to emulate KED as it would be a submodule 
+## Tree View
+```
+├── examples
+│   └── pin_control.c
+├── ked
+│   ├── CMakeLists.txt
+│   └── peripherals
+│       └── gpio
+│           └── gpio.h
+└── peripherals
+    └── gpio
+        └── gpio.c
+```
+## Dependencies
+``` sudo apt install libgpiod-dev ```
+
+# To Compile from root of project
+## Prepeare for MAKE
+```cmake -S ked -B build -DMAIN_FILE=examples/pin_control.c```
+this will also create the build diretory for you. 
+
+## MAKE
+```cd build```
+```make```
+
+## RUN
+```./ked_executable -pin 21 -dir out -set```
+Will set GPIO21 pin (HEADER 40) to High
+
+#Size Difference with version that has no function pointers
+
+```
+Size
+text   data     bss     dec     hex  filename
+3696   332	    16	    4044	fcc	 ked_executable
+
+```
 
-# Workflow
-##TODO: (In Chronological Form) 
-+ Implementing interrupt
-	+ Timer Together
-	+ GPIO Together/Alone
-	+ SPI Edwin
-	+ I2C Kerem
-+ PWM Inlcuding Interrupts (Edwin &| Kerem)
-+ Test KED with Reflow Oven
-+ DMA
-
-## Introduction: 
-### Why ?
-This project is made to enable high portability between different Plaftorms an MCU's awailable on the market. 
-The main motivation was the chip allocation that started on 2018 and will most propably continue until 2024.
-
-### But how come that we don't use the code renerators and IDEs proposed from the manufacturters ? 
-The answer is pretty simple : 
- + We want this library to be portable between different manufacturers who uses arm cores. 
- + To give us the ability to write and test our code on a raspberry and then simply implement the same code on your MCU. 
- + To give us the opportunity the crate your own Board Support Layer based (BSL) on mutiple MCU if needed. Thus allowing us to adapt to a highly aggresive market.
- + An abstration layer that doesn't chnage between MCU's and BSL's with the miminun possible overhead as possible. 
-
-# How does it work ? 
-KED is intendet to be used as a git submodule. Allowing the mainternars of KED to do their things, while letting you to focus on your own project. 
-### Before you ask, Of Course, Yes, you would be one of our heroes if you decide to be a contributor ! 
-
-
-# What is KED?
-KED is a framework created by Kerem Yollu and Edwin Koch. KED stands for
-"Kerem and Edwin Developement". The idea was initially started by the desire to create a hardware
-abstraction layer (HAL) as the given ones are mostly bloated and not well structured.
-
-# KED structure
-This section will explain how KED is structured and how you can implement drivers, peripherals,
-etc.
-
-# Chip Support Layer (CSL)
-The CSL folder holds all the target device specific resources and implementations. For example if
-you want to use the NUCLEO 042k6 you have to choose the target device "stm32f042k6t6" as this is
-the physical IC used by the NUCLEO board. This target device is represented inside CSL folder as a
-folder named with the target device. This is crucial as there can be differeces between different
-packages with the same IC core e.g "stm32f042k6t6" vs "stm32f042f6p6". Both of them are the "same"
-but have different pin mappings and even differing peripheral structures.
-
-## Hardware Description Layer
-This is a subfolder inside each target device folder. It holds all the specific hardware
-description headers e.g "hwd_pin.h". These HWD files describe e.g. how many pins there are, how
-many timers there are, etc.  If one target device does not have a specific peripheral e.g. CAN bus
-then its HWD file is not put inside the folder.
-
-## Implementing new target device
-To implement a new target device to KED please follow the following steps in this section. Each
-subsection will explaine how the structure is defined and what has to be implemented sothat at the
-end there is a fully implemented 
-
-## Main structure of target device resources
-Each target device has its own folder in which all the resorces and device specific implementations
- are located. This folder is located to 
-in the csl folder of KED
-
-## Implementing Peripherals
-First create a folder with the spesific IC name. E.g. stm32f042k6t6 (used on the NUCLEO F042K6).
-In this folder
-TODO -> explain how to implement periperals and include 
-
-INTERFACES 
-
-	- pin
-		- pin.h Is now only missing interrupt functions 
- 	- USART
-		- usart.h Is working Great But there are many more functionalities to be added.
-		- usart.h Interrupt and DMA are the next steps
-
-	- deviceSetup	
-		- deviceSetup.h it's a copy of what ST has made but wit direct register acsess
-		- deviceSetup.h we need to test it with other configurations to see if it works as 
-			supposed or if the MCU is on it's defaul 8MHz congif. 
-		- setupInit(); funtion is called from bsl/csl/stm32f042/startup/startup_stm32f042x6.s 
-			and is called before the main(); 
-
-PROGRAMMING 
-	
-	- CPP
-		- CPP Classes are taking extreme ammount of code ! 5kB for one class
-		- Try to generate a CPP proect with cube to sse if we are missing some flags.  	 
-		- Huge difference i we use main.c or main.cpp as enrty point. somehow the first intoduction of classes are taking env. 5Kb
-
-
-DOCUMENTATION
-
-	- STM-Flash utility 
-		- https://www.mankier.com/1/st-flash#Options
-		- erasing flash ```st-flash erase```
-	- Fun with Linus and why he only wants C 
-		- https://www.realworldtech.com/forum/?threadid=104196&curpostid=104299
-
-TOOLS
-	
-	- #### **`run.sh`** will compile and load the code directly to your device. It also creates 
-	  and/or updates the Doxygen documentation of the code.
-	   It can also be used used just for compiling.
-	- #### **`tmux-dev.sh`** will automatically create the different "workbenches" for easy 
-	  workflow.
-	  
-
-HELPEFULL STUFF
-
-	- [tmux cheat sheet](https://tmuxcheatsheet.com)
-	- pinout of stm32f04k6 nucleo
-	  ![pinout][https://www.e-komponent.com/stm32f031k6-mbed-enabled-development-nucleo-32-stm32f0-arm-cortex-m0-mcu-32-bit-embedded-evaluation-board]
-
-REFRESHERS
-	- tmux stuff
-		- change frame with `Ctrl+B W`. A widnow with a preview will open. Coose eather by moving
-		  selection via cursor and the presseing `enter` or bynumber
-
-
-
-RESTRUCTURATION 02_08_2023: 
-    - Maybe : Separate the pripherals trio : Ex : i2c.h i2c.c imp_i2c.h as ->  i2c.h i2c.c csl_i2c.h cls_i2c.c
-        - This mitigates confusion for end user and hides away complexity.
 

csl/rpi/CMakeLists.txt

@@ -1,4 +0,0 @@
-####################################################################################################
-#SUBDIRECTORIES
-####################################################################################################
-add_subdirectory(Src)

csl/rpi/Inc/systemCall.hpp

@@ -1,14 +0,0 @@
-#ifndef _SYSTEMCALL_H_
-#define _SYSTEMCALL_H_
-
-#include <cstdio>
-#include <iostream>
-#include <memory>
-#include <stdexcept>
-#include <string>
-#include <array>
-
-// Ide from : https://stackoverflow.com/questions/478898/how-do-i-execute-a-command-and-get-the-output-of-the-command-within-c-using-po
-std::string execBash(const char* cmd);
-
-#endif // _SYSTEMCALL_H_

csl/rpi/Src/CMakeLists.txt

@@ -1,13 +0,0 @@
-add_library(rpiGpio gpio.cpp)
-
-target_compile_options(rpiGpio PRIVATE ${C_FLAGS})
-target_compile_definitions(rpiGpio PRIVATE ${C_DEFS})
-target_include_directories(rpiGpio PRIVATE ${INTERFACES_DIR} ../Inc)
-add_library(sub::gpio ALIAS rpiGpio)
-
-add_library(rpiDelay delay.cpp)
-
-target_compile_options(rpiDelay PRIVATE ${C_FLAGS})
-target_compile_definitions(rpiDelay PRIVATE ${C_DEFS})
-target_include_directories(rpiDelay PRIVATE ${INTERFACES_DIR} ../Inc)
-add_library(sub::delay ALIAS rpiDelay)

csl/rpi/Src/delay.cpp

@@ -1,17 +0,0 @@
-#include "delay.hpp" 
-#include <unistd.h>
-
-Delay::Delay()
-{
-
-}
-
-Delay::~Delay()
-{
-
-}
-
-void Delay::ms(uint16_t delay)
-{
-	usleep(1000*delay);
-}

csl/rpi/Src/gpio.cpp

@@ -1,141 +0,0 @@
-#include "pin.hpp"
-#include "systemCall.hpp"
-#include <fstream>
-#include <iostream>
-
-
-char buffer[50];
-char gpioNo = 17; 
-uint8_t currentPin = 0; 
-int ck = 0; 
-std::ifstream bufFile; 
-
-Pin::Pin()
-{
-} 
-
-Pin::~Pin()
-{
-
-} 
-
-void Pin::setMode(mode mode)
-{
-	switch(mode)
-	{
-		case input:
-			sprintf(buffer, "echo \"in\" > /sys/class/gpio/gpio%d/direction",gpioNo);
-			system(buffer);
-			break; 
-		case output:
-			sprintf(buffer, "echo \"out\" > /sys/class/gpio/gpio%d/direction",gpioNo);
-			system(buffer);
-			break; 
-		case analog:
-			std::cout << "No analog pins are awailable for raspberry" << std::endl;
-			break; 
-		case alternate:
-			std::cout << "No analog pins are awailable for raspberry" << std::endl;
-			break; 
-		default :
-			break; 
-	}
-}
- 
-void Pin::setOutputState(state state)
-{
-	
-}
- 
-void Pin::setPullUpDonw(pullUpDown resistance)
-{
-	
-}
- 
-void Pin::setSpeed(speed speed)
-{
-	
-}
- 
-void Pin::config(mode mode, state state, pullUpDown resistance, speed speed)
-{
-	
-}
- 
-
-bool Pin::read()
-{
-	sprintf(buffer,"/sys/class/gpio/gpio%d/value",gpioNo);
-	bufFile.open(buffer,std::ios::in);
-	if(bufFile.is_open())
-	{
-		bufFile.read(buffer,1);  
-
-		if(buffer[0] == '1')
-		{
-			bufFile.close();
-			return 1; 
-		}
-		else if (buffer[0] == '0')
-		{
-			bufFile.close();
-			return 0; 
-		}
-	}
-}
-
-bool Pin::toggle()
-{
-	return 1; 	
-}
-
-void Pin::write(bool state)
-{
-	if(state == 1)
-	{
-		sprintf(buffer, "echo \"%d\" > /sys/class/gpio/gpio%d/value",state,gpioNo);
-		system(buffer);
-		return;
-	}
-	sprintf(buffer, "echo \"%d\" > /sys/class/gpio/gpio%d/value",state,gpioNo);
-	system(buffer);
-}
-
-
-void Pin::init()
-{
-	sprintf(buffer,"[ -d /sys/class/gpio/gpio%d ]",gpioNo); // retunrs null if directory exists
-	ck = system(buffer);
-	if( ck != 0) 
-	{
-		sprintf(buffer, "echo \"%d\" > /sys/class/gpio/export",gpioNo);
-		ck = system(buffer);
-	}
-	else
-	{
-		std::cout << "Pin already initiated"<< std::endl;	
-	}
-}
-
-void Pin::deInit()
-{
-	sprintf(buffer,"[ -d /sys/class/gpio/gpio%d ]",gpioNo); // retunrs null if directory exists
-	ck = system(buffer);
-	if( ck == 0) 
-	{
-		sprintf(buffer, "echo \"%d\" > /sys/class/gpio/unexport",gpioNo);
-		system(buffer);
-	}
-}
-
-
-void Pin::hardwareInfo()
-{
-	
-}
-
-
-void Pin::throwError(uint16_t line, errors errNo)
-{
-	
-}

csl/rpi/Src/systemCall.cpp

@@ -1,14 +0,0 @@
-#include "systemCall.hpp"
-
-std::string execBash(const char* cmd) {
-    std::array<char, 128> buffer;
-    std::string result;
-    std::unique_ptr<FILE, decltype(&pclose)> pipe(popen(cmd, "r"), pclose);
-    if (!pipe) {
-        throw std::runtime_error("popen() failed!");
-    }
-    while (fgets(buffer.data(), buffer.size(), pipe.get()) != nullptr) {
-        result += buffer.data();
-    }
-    return result;
-}

csl/rpi/compiler.cmake

@@ -1,14 +0,0 @@
-####################################################################################################
-# bsl_nucleo_f042k6_compiler.cmake
-####################################################################################################
-
-set(CMAKE_SIZE "/usr/bin/size")
-set(CMAKE_C_COMPILER "/usr/bin/gcc")
-set(CMAKE_CXX_COMPILER "/usr/bin/g++")
-
-option(IS_NO_SYS "Use a custom linker script" OFF)
-option(NEED_OBJCOPY "If objcopy is neede for cross compilation" OFF)
-
-####################################################################################################
-#PROJECT & LIBRARIES : defined by user and important that it comes after the VARIABLES otherwise the Set varibale will not be used. 
-####################################################################################################

csl/rpi/config.cmake

@@ -1,29 +0,0 @@
-####################################################################################################
-# bsl_nucleo_f042k6.cmake
-####################################################################################################
-
-####################################################################################################
-#PROJECT & LIBRARIES : defined by user and important that it comes after the VARIABLES otherwise the Set varibale will not be used. 
-####################################################################################################
-set(CMAKE_CXX_STANDARD 11)
-set(CSL_USED ${CMAKE_SOURCE_DIR}/csl/rpi)
-####################################################################################################
-#VARIABLES : defined by user
-####################################################################################################
-
-set(C_FLAGS 
-	-Wall				#Error : If you don't know this one please chek basical compiling 
-	-fdiagnostics-color=always
-	$<$<CONFIG:Debug>:-O -g -gdwarf-2>)
-
-set(C_DEFS 
-	-DRASPBERRY #Defined by kerem to auto configure headers in main.hpp
-	)
-
-set (CPP_INCLUDES ${CMAKE_SOURCE_DIR})
-set (CPP_FLAGS ${C_FLAGS})
-set (CPP_DEFS ${C_DEFS})
-
-#list(APPEND EXTRA_LIBS sub::translator)
-list(APPEND EXTRA_LIBS sub::delay)
-list(APPEND EXTRA_LIBS sub::gpio)

csl/stm32f042k6t6/.mxproject

@@ -1,14 +0,0 @@
-[PreviousLibFiles]
-LibFiles=Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_gpio.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_system.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_pwr.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_exti.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_bus.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_cortex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_rcc.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_crs.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_utils.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_dma.h;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_gpio.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_pwr.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_exti.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_rcc.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_utils.c;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_gpio.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_system.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_pwr.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_exti.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_bus.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_cortex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_rcc.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_crs.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_utils.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_dma.h;Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h;Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h;Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h;Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/system_stm32f0xx.c;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/tz_context.h;
-
-[PreviousUsedMakefileFiles]
-SourceFiles=Src\main.c;Src\stm32f0xx_it.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_gpio.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_pwr.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_exti.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_rcc.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_utils.c;Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/system_stm32f0xx.c;Src/system_stm32f0xx.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_gpio.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_pwr.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_exti.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_rcc.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_utils.c;Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/system_stm32f0xx.c;Src/system_stm32f0xx.c;;;
-HeaderPath=Drivers\STM32F0xx_HAL_Driver\Inc;Drivers\CMSIS\Device\ST\STM32F0xx\Include;Drivers\CMSIS\Include;Inc;
-CDefines=USE_FULL_LL_DRIVER;HSE_VALUE:8000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;HSI_VALUE:8000000;LSI_VALUE:40000;VDD_VALUE:3300;PREFETCH_ENABLE:1;INSTRUCTION_CACHE_ENABLE:0;DATA_CACHE_ENABLE:0;STM32F042x6;USE_FULL_LL_DRIVER;HSE_VALUE:8000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;HSI_VALUE:8000000;LSI_VALUE:40000;VDD_VALUE:3300;PREFETCH_ENABLE:1;INSTRUCTION_CACHE_ENABLE:0;DATA_CACHE_ENABLE:0;
-
-[PreviousGenFiles]
-HeaderPath=C:/keyterm/stm/stm32f042/cmakeLowLayer/Inc
-HeaderFiles=stm32f0xx_it.h;stm32_assert.h;main.h;
-SourcePath=C:/keyterm/stm/stm32f042/cmakeLowLayer/Src
-SourceFiles=stm32f0xx_it.c;main.c;
-

csl/stm32f042k6t6/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h

@@ -1,275 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx.h
-  * @author  MCD Application Team
-  * @brief   CMSIS STM32F0xx Device Peripheral Access Layer Header File.           
-  *            
-  *          The file is the unique include file that the application programmer
-  *          is using in the C source code, usually in main.c. This file contains:
-  *           - Configuration section that allows to select:
-  *              - The STM32F0xx device used in the target application
-  *              - To use or not the peripheral’s drivers in application code(i.e. 
-  *                code will be based on direct access to peripheral’s registers 
-  *                rather than drivers API), this option is controlled by 
-  *                "#define USE_HAL_DRIVER"
-  *  
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
-  * All rights reserved.</center></h2>
-  *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
-  *
-  ******************************************************************************
-  */
-
-/** @addtogroup CMSIS
-  * @{
-  */
-
-/** @addtogroup stm32f0xx
-  * @{
-  */
-    
-#ifndef __STM32F0xx_H
-#define __STM32F0xx_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif /* __cplusplus */
-   
-/** @addtogroup Library_configuration_section
-  * @{
-  */
-  
-/**
-  * @brief STM32 Family
-  */
-#if !defined  (STM32F0)
-#define STM32F0
-#endif /* STM32F0 */
-
-/** Uncomment the line below according to the target STM32 device used in your application.
-  * stm32f0xxxx.h file contains:
-  * - All the peripheral register's definitions, bits definitions and memory mapping for STM32F0xxxx devices
-  * - IRQ channel definition
-  * - Peripheral memory mapping and physical registers address definition
-  * - Peripheral pointer declaration and driver header file inclusion
-  * - Product miscellaneous configuration: assert macros…
-  * Note: These CMSIS drivers (stm32f0xxxx.h) are always supporting features of the sub-family’s superset.
-  */
-
-#if !defined (STM32F030x6) && !defined (STM32F030x8) &&                           \
-    !defined (STM32F031x6) && !defined (STM32F038xx) &&                           \
-    !defined (STM32F042x6) && !defined (STM32F048xx) && !defined (STM32F070x6) && \
-    !defined (STM32F051x8) && !defined (STM32F058xx) &&                           \
-    !defined (STM32F071xB) && !defined (STM32F072xB) && !defined (STM32F078xx) && !defined (STM32F070xB) && \
-    !defined (STM32F091xC) && !defined (STM32F098xx) && !defined (STM32F030xC)
-  /* #define STM32F030x6 */  /*!< STM32F030x4, STM32F030x6 Devices (STM32F030xx microcontrollers where the Flash memory ranges between 16 and 32 Kbytes)              */
-  /* #define STM32F030x8 */  /*!< STM32F030x8 Devices (STM32F030xx microcontrollers where the Flash memory is 64 Kbytes)                                              */
-  /* #define STM32F031x6 */  /*!< STM32F031x4, STM32F031x6 Devices (STM32F031xx microcontrollers where the Flash memory ranges between 16 and 32 Kbytes)              */
-  /* #define STM32F038xx */  /*!< STM32F038xx Devices (STM32F038xx microcontrollers where the Flash memory is 32 Kbytes)                                              */
-  /* #define STM32F042x6 */  /*!< STM32F042x4, STM32F042x6 Devices (STM32F042xx microcontrollers where the Flash memory ranges between 16 and 32 Kbytes)              */
-  /* #define STM32F048xx */  /*!< STM32F048xx Devices (STM32F048xx microcontrollers where the Flash memory is 32 Kbytes)                                              */
-  /* #define STM32F051x8 */  /*!< STM32F051x4, STM32F051x6, STM32F051x8 Devices (STM32F051xx microcontrollers where the Flash memory ranges between 16 and 64 Kbytes) */
-  /* #define STM32F058xx */  /*!< STM32F058xx Devices (STM32F058xx microcontrollers where the Flash memory is 64 Kbytes)                                              */
-  /* #define STM32F070x6 */  /*!< STM32F070x6 Devices (STM32F070x6 microcontrollers where the Flash memory ranges between 16 and 32 Kbytes)                           */
-  /* #define STM32F070xB */  /*!< STM32F070xB Devices (STM32F070xB microcontrollers where the Flash memory ranges between 64 and 128 Kbytes)                          */
-  /* #define STM32F071xB */  /*!< STM32F071x8, STM32F071xB Devices (STM32F071xx microcontrollers where the Flash memory ranges between 64 and 128 Kbytes)             */
-  /* #define STM32F072xB */  /*!< STM32F072x8, STM32F072xB Devices (STM32F072xx microcontrollers where the Flash memory ranges between 64 and 128 Kbytes)             */
-  /* #define STM32F078xx */  /*!< STM32F078xx Devices (STM32F078xx microcontrollers where the Flash memory is 128 Kbytes)                                             */
-  /* #define STM32F030xC */  /*!< STM32F030xC Devices (STM32F030xC microcontrollers where the Flash memory is 256 Kbytes)                                             */  
-  /* #define STM32F091xC */  /*!< STM32F091xB, STM32F091xC Devices (STM32F091xx microcontrollers where the Flash memory ranges between 128 and 256 Kbytes)            */
-  /* #define STM32F098xx */  /*!< STM32F098xx Devices (STM32F098xx microcontrollers where the Flash memory is 256 Kbytes)                                             */
-#endif
-/* Legacy aliases */
-#if defined (STM32F048x6)
- #define STM32F048xx 
-#endif /* STM32F048x6 */
-
-/*  Tip: To avoid modifying this file each time you need to switch between these
-        devices, you can define the device in your toolchain compiler preprocessor.
-  */
-#if !defined  (USE_HAL_DRIVER)
-/**
- * @brief Comment the line below if you will not use the peripherals drivers.
-   In this case, these drivers will not be included and the application code will 
-   be based on direct access to peripherals registers 
-   */
-  /*#define USE_HAL_DRIVER */
-#endif /* USE_HAL_DRIVER */
-
-/**
-  * @brief CMSIS Device version number V2.3.6
-  */
-#define __STM32F0_DEVICE_VERSION_MAIN   (0x02) /*!< [31:24] main version */
-#define __STM32F0_DEVICE_VERSION_SUB1   (0x03) /*!< [23:16] sub1 version */
-#define __STM32F0_DEVICE_VERSION_SUB2   (0x06) /*!< [15:8]  sub2 version */
-#define __STM32F0_DEVICE_VERSION_RC     (0x00) /*!< [7:0]  release candidate */ 
-#define __STM32F0_DEVICE_VERSION        ((__STM32F0_DEVICE_VERSION_MAIN << 24)\
-                                        |(__STM32F0_DEVICE_VERSION_SUB1 << 16)\
-                                        |(__STM32F0_DEVICE_VERSION_SUB2 << 8 )\
-                                        |(__STM32F0_DEVICE_VERSION_RC))
-                                             
-/**
-  * @}
-  */
-
-/** @addtogroup Device_Included
-  * @{
-  */
-
-#if defined(STM32F030x6)
-  #include "stm32f030x6.h"
-#elif defined(STM32F030x8)
-  #include "stm32f030x8.h"
-#elif defined(STM32F031x6)
-  #include "stm32f031x6.h"
-#elif defined(STM32F038xx)
-  #include "stm32f038xx.h"
-#elif defined(STM32F042x6)
-  #include "stm32f042x6.h"
-#elif defined(STM32F048xx)
-  #include "stm32f048xx.h"
-#elif defined(STM32F051x8)
-  #include "stm32f051x8.h"
-#elif defined(STM32F058xx)
-  #include "stm32f058xx.h"
-#elif defined(STM32F070x6)
-  #include "stm32f070x6.h"
-#elif defined(STM32F070xB)
-  #include "stm32f070xb.h"
-#elif defined(STM32F071xB)
-  #include "stm32f071xb.h"
-#elif defined(STM32F072xB)
-  #include "stm32f072xb.h"
-#elif defined(STM32F078xx)
-  #include "stm32f078xx.h"
-#elif defined(STM32F091xC)
-  #include "stm32f091xc.h"
-#elif defined(STM32F098xx)
-  #include "stm32f098xx.h"
-#elif defined(STM32F030xC)
-  #include "stm32f030xc.h"    
-#else
- #error "Please select first the target STM32F0xx device used in your application (in stm32f0xx.h file)"
-#endif
-
-/**
-  * @}
-  */
-
-/** @addtogroup Exported_types
-  * @{
-  */ 
-typedef enum 
-{
-  RESET = 0U, 
-  SET = !RESET
-} FlagStatus, ITStatus;
-
-typedef enum 
-{
-  DISABLE = 0U, 
-  ENABLE = !DISABLE
-} FunctionalState;
-#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
-
-typedef enum 
-{
-  SUCCESS = 0U,
-  ERROR = !SUCCESS
-} ErrorStatus;
-
-/**
-  * @}
-  */
-
-
-/** @addtogroup Exported_macros
-  * @{
-  */
-#define SET_BIT(REG, BIT)     ((REG) |= (BIT))
-
-#define CLEAR_BIT(REG, BIT)   ((REG) &= ~(BIT))
-
-#define READ_BIT(REG, BIT)    ((REG) & (BIT))
-
-#define CLEAR_REG(REG)        ((REG) = (0x0))
-
-#define WRITE_REG(REG, VAL)   ((REG) = (VAL))
-
-#define READ_REG(REG)         ((REG))
-
-#define MODIFY_REG(REG, CLEARMASK, SETMASK)  WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
-
-/* Use of interrupt control for register exclusive access */
-/* Atomic 32-bit register access macro to set one or several bits */
-#define ATOMIC_SET_BIT(REG, BIT)                             \
-  do {                                                       \
-    uint32_t primask;                                        \
-    primask = __get_PRIMASK();                               \
-    __set_PRIMASK(1);                                        \
-    SET_BIT((REG), (BIT));                                   \
-    __set_PRIMASK(primask);                                  \
-  } while(0)
-
-/* Atomic 32-bit register access macro to clear one or several bits */
-#define ATOMIC_CLEAR_BIT(REG, BIT)                           \
-  do {                                                       \
-    uint32_t primask;                                        \
-    primask = __get_PRIMASK();                               \
-    __set_PRIMASK(1);                                        \
-    CLEAR_BIT((REG), (BIT));                                 \
-    __set_PRIMASK(primask);                                  \
-  } while(0)
-
-/* Atomic 32-bit register access macro to clear and set one or several bits */
-#define ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK)            \
-  do {                                                       \
-    uint32_t primask;                                        \
-    primask = __get_PRIMASK();                               \
-    __set_PRIMASK(1);                                        \
-    MODIFY_REG((REG), (CLEARMSK), (SETMASK));                \
-    __set_PRIMASK(primask);                                  \
-  } while(0)
-
-/* Atomic 16-bit register access macro to set one or several bits */
-#define ATOMIC_SETH_BIT(REG, BIT) ATOMIC_SET_BIT(REG, BIT)                                   \
-
-/* Atomic 16-bit register access macro to clear one or several bits */
-#define ATOMIC_CLEARH_BIT(REG, BIT) ATOMIC_CLEAR_BIT(REG, BIT)                               \
-
-/* Atomic 16-bit register access macro to clear and set one or several bits */
-#define ATOMIC_MODIFYH_REG(REG, CLEARMSK, SETMASK) ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK) \
-
-/**
-  * @}
-  */
-
-#if defined (USE_HAL_DRIVER)
- #include "stm32f0xx_hal.h"
-#endif /* USE_HAL_DRIVER */
-
-
-#ifdef __cplusplus
-}
-#endif /* __cplusplus */
-
-#endif /* __STM32F0xx_H */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-  
-
-
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

csl/stm32f042k6t6/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h

@@ -1,104 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    system_stm32f0xx.h
-  * @author  MCD Application Team
-  * @brief   CMSIS Cortex-M0 Device System Source File for STM32F0xx devices.  
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
-  * All rights reserved.</center></h2>
-  *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
-  *
-  ******************************************************************************
-  */
-
-/** @addtogroup CMSIS
-  * @{
-  */
-
-/** @addtogroup stm32f0xx_system
-  * @{
-  */  
-  
-/**
-  * @brief Define to prevent recursive inclusion
-  */
-#ifndef __SYSTEM_STM32F0XX_H
-#define __SYSTEM_STM32F0XX_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif 
-
-/** @addtogroup STM32F0xx_System_Includes
-  * @{
-  */
-
-/**
-  * @}
-  */
-
-
-/** @addtogroup STM32F0xx_System_Exported_types
-  * @{
-  */
-  /* This variable is updated in three ways:
-      1) by calling CMSIS function SystemCoreClockUpdate()
-      3) by calling HAL API function HAL_RCC_GetHCLKFreq()
-      3) by calling HAL API function HAL_RCC_ClockConfig()
-         Note: If you use this function to configure the system clock; then there
-               is no need to call the 2 first functions listed above, since SystemCoreClock
-               variable is updated automatically.
-  */
-extern const uint8_t AHBPrescTable[16];   /*!< AHB prescalers table values */
-extern const uint8_t APBPrescTable[8];    /*!< APB prescalers table values */
-
-/**
-  * @}
-  */
-
-/** @addtogroup STM32F0xx_System_Exported_Constants
-  * @{
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup STM32F0xx_System_Exported_Macros
-  * @{
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup STM32F0xx_System_Exported_Functions
-  * @{
-  */
-  
-extern void SystemInit(void);
-extern void SystemCoreClockUpdate(void);
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /*__SYSTEM_STM32F0XX_H */
-
-/**
-  * @}
-  */
-  
-/**
-  * @}
-  */  
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

csl/stm32f042k6t6/CMSIS/Include/cmsis_armcc.h

@@ -1,865 +0,0 @@
-/**************************************************************************//**
- * @file     cmsis_armcc.h
- * @brief    CMSIS compiler ARMCC (Arm Compiler 5) header file
- * @version  V5.0.4
- * @date     10. January 2018
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __CMSIS_ARMCC_H
-#define __CMSIS_ARMCC_H
-
-
-#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 400677)
-  #error "Please use Arm Compiler Toolchain V4.0.677 or later!"
-#endif
-
-/* CMSIS compiler control architecture macros */
-#if ((defined (__TARGET_ARCH_6_M  ) && (__TARGET_ARCH_6_M   == 1)) || \
-     (defined (__TARGET_ARCH_6S_M ) && (__TARGET_ARCH_6S_M  == 1))   )
-  #define __ARM_ARCH_6M__           1
-#endif
-
-#if (defined (__TARGET_ARCH_7_M ) && (__TARGET_ARCH_7_M  == 1))
-  #define __ARM_ARCH_7M__           1
-#endif
-
-#if (defined (__TARGET_ARCH_7E_M) && (__TARGET_ARCH_7E_M == 1))
-  #define __ARM_ARCH_7EM__          1
-#endif
-
-  /* __ARM_ARCH_8M_BASE__  not applicable */
-  /* __ARM_ARCH_8M_MAIN__  not applicable */
-
-
-/* CMSIS compiler specific defines */
-#ifndef   __ASM
-  #define __ASM                                  __asm
-#endif
-#ifndef   __INLINE
-  #define __INLINE                               __inline
-#endif
-#ifndef   __STATIC_INLINE
-  #define __STATIC_INLINE                        static __inline
-#endif
-#ifndef   __STATIC_FORCEINLINE                 
-  #define __STATIC_FORCEINLINE                   static __forceinline
-#endif           
-#ifndef   __NO_RETURN
-  #define __NO_RETURN                            __declspec(noreturn)
-#endif
-#ifndef   __USED
-  #define __USED                                 __attribute__((used))
-#endif
-#ifndef   __WEAK
-  #define __WEAK                                 __attribute__((weak))
-#endif
-#ifndef   __PACKED
-  #define __PACKED                               __attribute__((packed))
-#endif
-#ifndef   __PACKED_STRUCT
-  #define __PACKED_STRUCT                        __packed struct
-#endif
-#ifndef   __PACKED_UNION
-  #define __PACKED_UNION                         __packed union
-#endif
-#ifndef   __UNALIGNED_UINT32        /* deprecated */
-  #define __UNALIGNED_UINT32(x)                  (*((__packed uint32_t *)(x)))
-#endif
-#ifndef   __UNALIGNED_UINT16_WRITE
-  #define __UNALIGNED_UINT16_WRITE(addr, val)    ((*((__packed uint16_t *)(addr))) = (val))
-#endif
-#ifndef   __UNALIGNED_UINT16_READ
-  #define __UNALIGNED_UINT16_READ(addr)          (*((const __packed uint16_t *)(addr)))
-#endif
-#ifndef   __UNALIGNED_UINT32_WRITE
-  #define __UNALIGNED_UINT32_WRITE(addr, val)    ((*((__packed uint32_t *)(addr))) = (val))
-#endif
-#ifndef   __UNALIGNED_UINT32_READ
-  #define __UNALIGNED_UINT32_READ(addr)          (*((const __packed uint32_t *)(addr)))
-#endif
-#ifndef   __ALIGNED
-  #define __ALIGNED(x)                           __attribute__((aligned(x)))
-#endif
-#ifndef   __RESTRICT
-  #define __RESTRICT                             __restrict
-#endif
-
-/* ###########################  Core Function Access  ########################### */
-/** \ingroup  CMSIS_Core_FunctionInterface
-    \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
-  @{
- */
-
-/**
-  \brief   Enable IRQ Interrupts
-  \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
-           Can only be executed in Privileged modes.
- */
-/* intrinsic void __enable_irq();     */
-
-
-/**
-  \brief   Disable IRQ Interrupts
-  \details Disables IRQ interrupts by setting the I-bit in the CPSR.
-           Can only be executed in Privileged modes.
- */
-/* intrinsic void __disable_irq();    */
-
-/**
-  \brief   Get Control Register
-  \details Returns the content of the Control Register.
-  \return               Control Register value
- */
-__STATIC_INLINE uint32_t __get_CONTROL(void)
-{
-  register uint32_t __regControl         __ASM("control");
-  return(__regControl);
-}
-
-
-/**
-  \brief   Set Control Register
-  \details Writes the given value to the Control Register.
-  \param [in]    control  Control Register value to set
- */
-__STATIC_INLINE void __set_CONTROL(uint32_t control)
-{
-  register uint32_t __regControl         __ASM("control");
-  __regControl = control;
-}
-
-
-/**
-  \brief   Get IPSR Register
-  \details Returns the content of the IPSR Register.
-  \return               IPSR Register value
- */
-__STATIC_INLINE uint32_t __get_IPSR(void)
-{
-  register uint32_t __regIPSR          __ASM("ipsr");
-  return(__regIPSR);
-}
-
-
-/**
-  \brief   Get APSR Register
-  \details Returns the content of the APSR Register.
-  \return               APSR Register value
- */
-__STATIC_INLINE uint32_t __get_APSR(void)
-{
-  register uint32_t __regAPSR          __ASM("apsr");
-  return(__regAPSR);
-}
-
-
-/**
-  \brief   Get xPSR Register
-  \details Returns the content of the xPSR Register.
-  \return               xPSR Register value
- */
-__STATIC_INLINE uint32_t __get_xPSR(void)
-{
-  register uint32_t __regXPSR          __ASM("xpsr");
-  return(__regXPSR);
-}
-
-
-/**
-  \brief   Get Process Stack Pointer
-  \details Returns the current value of the Process Stack Pointer (PSP).
-  \return               PSP Register value
- */
-__STATIC_INLINE uint32_t __get_PSP(void)
-{
-  register uint32_t __regProcessStackPointer  __ASM("psp");
-  return(__regProcessStackPointer);
-}
-
-
-/**
-  \brief   Set Process Stack Pointer
-  \details Assigns the given value to the Process Stack Pointer (PSP).
-  \param [in]    topOfProcStack  Process Stack Pointer value to set
- */
-__STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
-{
-  register uint32_t __regProcessStackPointer  __ASM("psp");
-  __regProcessStackPointer = topOfProcStack;
-}
-
-
-/**
-  \brief   Get Main Stack Pointer
-  \details Returns the current value of the Main Stack Pointer (MSP).
-  \return               MSP Register value
- */
-__STATIC_INLINE uint32_t __get_MSP(void)
-{
-  register uint32_t __regMainStackPointer     __ASM("msp");
-  return(__regMainStackPointer);
-}
-
-
-/**
-  \brief   Set Main Stack Pointer
-  \details Assigns the given value to the Main Stack Pointer (MSP).
-  \param [in]    topOfMainStack  Main Stack Pointer value to set
- */
-__STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
-{
-  register uint32_t __regMainStackPointer     __ASM("msp");
-  __regMainStackPointer = topOfMainStack;
-}
-
-
-/**
-  \brief   Get Priority Mask
-  \details Returns the current state of the priority mask bit from the Priority Mask Register.
-  \return               Priority Mask value
- */
-__STATIC_INLINE uint32_t __get_PRIMASK(void)
-{
-  register uint32_t __regPriMask         __ASM("primask");
-  return(__regPriMask);
-}
-
-
-/**
-  \brief   Set Priority Mask
-  \details Assigns the given value to the Priority Mask Register.
-  \param [in]    priMask  Priority Mask
- */
-__STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
-{
-  register uint32_t __regPriMask         __ASM("primask");
-  __regPriMask = (priMask);
-}
-
-
-#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__  == 1)) || \
-     (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     )
-
-/**
-  \brief   Enable FIQ
-  \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
-           Can only be executed in Privileged modes.
- */
-#define __enable_fault_irq                __enable_fiq
-
-
-/**
-  \brief   Disable FIQ
-  \details Disables FIQ interrupts by setting the F-bit in the CPSR.
-           Can only be executed in Privileged modes.
- */
-#define __disable_fault_irq               __disable_fiq
-
-
-/**
-  \brief   Get Base Priority
-  \details Returns the current value of the Base Priority register.
-  \return               Base Priority register value
- */
-__STATIC_INLINE uint32_t  __get_BASEPRI(void)
-{
-  register uint32_t __regBasePri         __ASM("basepri");
-  return(__regBasePri);
-}
-
-
-/**
-  \brief   Set Base Priority
-  \details Assigns the given value to the Base Priority register.
-  \param [in]    basePri  Base Priority value to set
- */
-__STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
-{
-  register uint32_t __regBasePri         __ASM("basepri");
-  __regBasePri = (basePri & 0xFFU);
-}
-
-
-/**
-  \brief   Set Base Priority with condition
-  \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
-           or the new value increases the BASEPRI priority level.
-  \param [in]    basePri  Base Priority value to set
- */
-__STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
-{
-  register uint32_t __regBasePriMax      __ASM("basepri_max");
-  __regBasePriMax = (basePri & 0xFFU);
-}
-
-
-/**
-  \brief   Get Fault Mask
-  \details Returns the current value of the Fault Mask register.
-  \return               Fault Mask register value
- */
-__STATIC_INLINE uint32_t __get_FAULTMASK(void)
-{
-  register uint32_t __regFaultMask       __ASM("faultmask");
-  return(__regFaultMask);
-}
-
-
-/**
-  \brief   Set Fault Mask
-  \details Assigns the given value to the Fault Mask register.
-  \param [in]    faultMask  Fault Mask value to set
- */
-__STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
-{
-  register uint32_t __regFaultMask       __ASM("faultmask");
-  __regFaultMask = (faultMask & (uint32_t)1U);
-}
-
-#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__  == 1)) || \
-           (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     ) */
-
-
-/**
-  \brief   Get FPSCR
-  \details Returns the current value of the Floating Point Status/Control register.
-  \return               Floating Point Status/Control register value
- */
-__STATIC_INLINE uint32_t __get_FPSCR(void)
-{
-#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
-     (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
-  register uint32_t __regfpscr         __ASM("fpscr");
-  return(__regfpscr);
-#else
-   return(0U);
-#endif
-}
-
-
-/**
-  \brief   Set FPSCR
-  \details Assigns the given value to the Floating Point Status/Control register.
-  \param [in]    fpscr  Floating Point Status/Control value to set
- */
-__STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
-{
-#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
-     (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
-  register uint32_t __regfpscr         __ASM("fpscr");
-  __regfpscr = (fpscr);
-#else
-  (void)fpscr;
-#endif
-}
-
-
-/*@} end of CMSIS_Core_RegAccFunctions */
-
-
-/* ##########################  Core Instruction Access  ######################### */
-/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
-  Access to dedicated instructions
-  @{
-*/
-
-/**
-  \brief   No Operation
-  \details No Operation does nothing. This instruction can be used for code alignment purposes.
- */
-#define __NOP                             __nop
-
-
-/**
-  \brief   Wait For Interrupt
-  \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
- */
-#define __WFI                             __wfi
-
-
-/**
-  \brief   Wait For Event
-  \details Wait For Event is a hint instruction that permits the processor to enter
-           a low-power state until one of a number of events occurs.
- */
-#define __WFE                             __wfe
-
-
-/**
-  \brief   Send Event
-  \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
- */
-#define __SEV                             __sev
-
-
-/**
-  \brief   Instruction Synchronization Barrier
-  \details Instruction Synchronization Barrier flushes the pipeline in the processor,
-           so that all instructions following the ISB are fetched from cache or memory,
-           after the instruction has been completed.
- */
-#define __ISB() do {\
-                   __schedule_barrier();\
-                   __isb(0xF);\
-                   __schedule_barrier();\
-                } while (0U)
-
-/**
-  \brief   Data Synchronization Barrier
-  \details Acts as a special kind of Data Memory Barrier.
-           It completes when all explicit memory accesses before this instruction complete.
- */
-#define __DSB() do {\
-                   __schedule_barrier();\
-                   __dsb(0xF);\
-                   __schedule_barrier();\
-                } while (0U)
-
-/**
-  \brief   Data Memory Barrier
-  \details Ensures the apparent order of the explicit memory operations before
-           and after the instruction, without ensuring their completion.
- */
-#define __DMB() do {\
-                   __schedule_barrier();\
-                   __dmb(0xF);\
-                   __schedule_barrier();\
-                } while (0U)
-
-                  
-/**
-  \brief   Reverse byte order (32 bit)
-  \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.
-  \param [in]    value  Value to reverse
-  \return               Reversed value
- */
-#define __REV                             __rev
-
-
-/**
-  \brief   Reverse byte order (16 bit)
-  \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.
-  \param [in]    value  Value to reverse
-  \return               Reversed value
- */
-#ifndef __NO_EMBEDDED_ASM
-__attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
-{
-  rev16 r0, r0
-  bx lr
-}
-#endif
-
-
-/**
-  \brief   Reverse byte order (16 bit)
-  \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.
-  \param [in]    value  Value to reverse
-  \return               Reversed value
- */
-#ifndef __NO_EMBEDDED_ASM
-__attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int16_t __REVSH(int16_t value)
-{
-  revsh r0, r0
-  bx lr
-}
-#endif
-
-
-/**
-  \brief   Rotate Right in unsigned value (32 bit)
-  \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
-  \param [in]    op1  Value to rotate
-  \param [in]    op2  Number of Bits to rotate
-  \return               Rotated value
- */
-#define __ROR                             __ror
-
-
-/**
-  \brief   Breakpoint
-  \details Causes the processor to enter Debug state.
-           Debug tools can use this to investigate system state when the instruction at a particular address is reached.
-  \param [in]    value  is ignored by the processor.
-                 If required, a debugger can use it to store additional information about the breakpoint.
- */
-#define __BKPT(value)                       __breakpoint(value)
-
-
-/**
-  \brief   Reverse bit order of value
-  \details Reverses the bit order of the given value.
-  \param [in]    value  Value to reverse
-  \return               Reversed value
- */
-#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__  == 1)) || \
-     (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     )
-  #define __RBIT                          __rbit
-#else
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
-{
-  uint32_t result;
-  uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */
-
-  result = value;                      /* r will be reversed bits of v; first get LSB of v */
-  for (value >>= 1U; value != 0U; value >>= 1U)
-  {
-    result <<= 1U;
-    result |= value & 1U;
-    s--;
-  }
-  result <<= s;                        /* shift when v's highest bits are zero */
-  return result;
-}
-#endif
-
-
-/**
-  \brief   Count leading zeros
-  \details Counts the number of leading zeros of a data value.
-  \param [in]  value  Value to count the leading zeros
-  \return             number of leading zeros in value
- */
-#define __CLZ                             __clz
-
-
-#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__  == 1)) || \
-     (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     )
-
-/**
-  \brief   LDR Exclusive (8 bit)
-  \details Executes a exclusive LDR instruction for 8 bit value.
-  \param [in]    ptr  Pointer to data
-  \return             value of type uint8_t at (*ptr)
- */
-#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
-  #define __LDREXB(ptr)                                                        ((uint8_t ) __ldrex(ptr))
-#else
-  #define __LDREXB(ptr)          _Pragma("push") _Pragma("diag_suppress 3731") ((uint8_t ) __ldrex(ptr))  _Pragma("pop")
-#endif
-
-
-/**
-  \brief   LDR Exclusive (16 bit)
-  \details Executes a exclusive LDR instruction for 16 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint16_t at (*ptr)
- */
-#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
-  #define __LDREXH(ptr)                                                        ((uint16_t) __ldrex(ptr))
-#else
-  #define __LDREXH(ptr)          _Pragma("push") _Pragma("diag_suppress 3731") ((uint16_t) __ldrex(ptr))  _Pragma("pop")
-#endif
-
-
-/**
-  \brief   LDR Exclusive (32 bit)
-  \details Executes a exclusive LDR instruction for 32 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint32_t at (*ptr)
- */
-#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
-  #define __LDREXW(ptr)                                                        ((uint32_t ) __ldrex(ptr))
-#else
-  #define __LDREXW(ptr)          _Pragma("push") _Pragma("diag_suppress 3731") ((uint32_t ) __ldrex(ptr))  _Pragma("pop")
-#endif
-
-
-/**
-  \brief   STR Exclusive (8 bit)
-  \details Executes a exclusive STR instruction for 8 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
-  \return          0  Function succeeded
-  \return          1  Function failed
- */
-#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
-  #define __STREXB(value, ptr)                                                 __strex(value, ptr)
-#else
-  #define __STREXB(value, ptr)   _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr)        _Pragma("pop")
-#endif
-
-
-/**
-  \brief   STR Exclusive (16 bit)
-  \details Executes a exclusive STR instruction for 16 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
-  \return          0  Function succeeded
-  \return          1  Function failed
- */
-#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
-  #define __STREXH(value, ptr)                                                 __strex(value, ptr)
-#else
-  #define __STREXH(value, ptr)   _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr)        _Pragma("pop")
-#endif
-
-
-/**
-  \brief   STR Exclusive (32 bit)
-  \details Executes a exclusive STR instruction for 32 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
-  \return          0  Function succeeded
-  \return          1  Function failed
- */
-#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
-  #define __STREXW(value, ptr)                                                 __strex(value, ptr)
-#else
-  #define __STREXW(value, ptr)   _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr)        _Pragma("pop")
-#endif
-
-
-/**
-  \brief   Remove the exclusive lock
-  \details Removes the exclusive lock which is created by LDREX.
- */
-#define __CLREX                           __clrex
-
-
-/**
-  \brief   Signed Saturate
-  \details Saturates a signed value.
-  \param [in]  value  Value to be saturated
-  \param [in]    sat  Bit position to saturate to (1..32)
-  \return             Saturated value
- */
-#define __SSAT                            __ssat
-
-
-/**
-  \brief   Unsigned Saturate
-  \details Saturates an unsigned value.
-  \param [in]  value  Value to be saturated
-  \param [in]    sat  Bit position to saturate to (0..31)
-  \return             Saturated value
- */
-#define __USAT                            __usat
-
-
-/**
-  \brief   Rotate Right with Extend (32 bit)
-  \details Moves each bit of a bitstring right by one bit.
-           The carry input is shifted in at the left end of the bitstring.
-  \param [in]    value  Value to rotate
-  \return               Rotated value
- */
-#ifndef __NO_EMBEDDED_ASM
-__attribute__((section(".rrx_text"))) __STATIC_INLINE __ASM uint32_t __RRX(uint32_t value)
-{
-  rrx r0, r0
-  bx lr
-}
-#endif
-
-
-/**
-  \brief   LDRT Unprivileged (8 bit)
-  \details Executes a Unprivileged LDRT instruction for 8 bit value.
-  \param [in]    ptr  Pointer to data
-  \return             value of type uint8_t at (*ptr)
- */
-#define __LDRBT(ptr)                      ((uint8_t )  __ldrt(ptr))
-
-
-/**
-  \brief   LDRT Unprivileged (16 bit)
-  \details Executes a Unprivileged LDRT instruction for 16 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint16_t at (*ptr)
- */
-#define __LDRHT(ptr)                      ((uint16_t)  __ldrt(ptr))
-
-
-/**
-  \brief   LDRT Unprivileged (32 bit)
-  \details Executes a Unprivileged LDRT instruction for 32 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint32_t at (*ptr)
- */
-#define __LDRT(ptr)                       ((uint32_t ) __ldrt(ptr))
-
-
-/**
-  \brief   STRT Unprivileged (8 bit)
-  \details Executes a Unprivileged STRT instruction for 8 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
- */
-#define __STRBT(value, ptr)               __strt(value, ptr)
-
-
-/**
-  \brief   STRT Unprivileged (16 bit)
-  \details Executes a Unprivileged STRT instruction for 16 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
- */
-#define __STRHT(value, ptr)               __strt(value, ptr)
-
-
-/**
-  \brief   STRT Unprivileged (32 bit)
-  \details Executes a Unprivileged STRT instruction for 32 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
- */
-#define __STRT(value, ptr)                __strt(value, ptr)
-
-#else  /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__  == 1)) || \
-           (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     ) */
-
-/**
-  \brief   Signed Saturate
-  \details Saturates a signed value.
-  \param [in]  value  Value to be saturated
-  \param [in]    sat  Bit position to saturate to (1..32)
-  \return             Saturated value
- */
-__attribute__((always_inline)) __STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat)
-{
-  if ((sat >= 1U) && (sat <= 32U))
-  {
-    const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
-    const int32_t min = -1 - max ;
-    if (val > max)
-    {
-      return max;
-    }
-    else if (val < min)
-    {
-      return min;
-    }
-  }
-  return val;
-}
-
-/**
-  \brief   Unsigned Saturate
-  \details Saturates an unsigned value.
-  \param [in]  value  Value to be saturated
-  \param [in]    sat  Bit position to saturate to (0..31)
-  \return             Saturated value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat)
-{
-  if (sat <= 31U)
-  {
-    const uint32_t max = ((1U << sat) - 1U);
-    if (val > (int32_t)max)
-    {
-      return max;
-    }
-    else if (val < 0)
-    {
-      return 0U;
-    }
-  }
-  return (uint32_t)val;
-}
-
-#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__  == 1)) || \
-           (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     ) */
-
-/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
-
-
-/* ###################  Compiler specific Intrinsics  ########################### */
-/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
-  Access to dedicated SIMD instructions
-  @{
-*/
-
-#if ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     )
-
-#define __SADD8                           __sadd8
-#define __QADD8                           __qadd8
-#define __SHADD8                          __shadd8
-#define __UADD8                           __uadd8
-#define __UQADD8                          __uqadd8
-#define __UHADD8                          __uhadd8
-#define __SSUB8                           __ssub8
-#define __QSUB8                           __qsub8
-#define __SHSUB8                          __shsub8
-#define __USUB8                           __usub8
-#define __UQSUB8                          __uqsub8
-#define __UHSUB8                          __uhsub8
-#define __SADD16                          __sadd16
-#define __QADD16                          __qadd16
-#define __SHADD16                         __shadd16
-#define __UADD16                          __uadd16
-#define __UQADD16                         __uqadd16
-#define __UHADD16                         __uhadd16
-#define __SSUB16                          __ssub16
-#define __QSUB16                          __qsub16
-#define __SHSUB16                         __shsub16
-#define __USUB16                          __usub16
-#define __UQSUB16                         __uqsub16
-#define __UHSUB16                         __uhsub16
-#define __SASX                            __sasx
-#define __QASX                            __qasx
-#define __SHASX                           __shasx
-#define __UASX                            __uasx
-#define __UQASX                           __uqasx
-#define __UHASX                           __uhasx
-#define __SSAX                            __ssax
-#define __QSAX                            __qsax
-#define __SHSAX                           __shsax
-#define __USAX                            __usax
-#define __UQSAX                           __uqsax
-#define __UHSAX                           __uhsax
-#define __USAD8                           __usad8
-#define __USADA8                          __usada8
-#define __SSAT16                          __ssat16
-#define __USAT16                          __usat16
-#define __UXTB16                          __uxtb16
-#define __UXTAB16                         __uxtab16
-#define __SXTB16                          __sxtb16
-#define __SXTAB16                         __sxtab16
-#define __SMUAD                           __smuad
-#define __SMUADX                          __smuadx
-#define __SMLAD                           __smlad
-#define __SMLADX                          __smladx
-#define __SMLALD                          __smlald
-#define __SMLALDX                         __smlaldx
-#define __SMUSD                           __smusd
-#define __SMUSDX                          __smusdx
-#define __SMLSD                           __smlsd
-#define __SMLSDX                          __smlsdx
-#define __SMLSLD                          __smlsld
-#define __SMLSLDX                         __smlsldx
-#define __SEL                             __sel
-#define __QADD                            __qadd
-#define __QSUB                            __qsub
-
-#define __PKHBT(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0x0000FFFFUL) |  \
-                                           ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL)  )
-
-#define __PKHTB(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0xFFFF0000UL) |  \
-                                           ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL)  )
-
-#define __SMMLA(ARG1,ARG2,ARG3)          ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \
-                                                      ((int64_t)(ARG3) << 32U)     ) >> 32U))
-
-#endif /* ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     ) */
-/*@} end of group CMSIS_SIMD_intrinsics */
-
-
-#endif /* __CMSIS_ARMCC_H */

csl/stm32f042k6t6/CMSIS/Include/cmsis_compiler.h

@@ -1,266 +0,0 @@
-/**************************************************************************//**
- * @file     cmsis_compiler.h
- * @brief    CMSIS compiler generic header file
- * @version  V5.0.4
- * @date     10. January 2018
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __CMSIS_COMPILER_H
-#define __CMSIS_COMPILER_H
-
-#include <stdint.h>
-
-/*
- * Arm Compiler 4/5
- */
-#if   defined ( __CC_ARM )
-  #include "cmsis_armcc.h"
-
-
-/*
- * Arm Compiler 6 (armclang)
- */
-#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #include "cmsis_armclang.h"
-
-
-/*
- * GNU Compiler
- */
-#elif defined ( __GNUC__ )
-  #include "cmsis_gcc.h"
-
-
-/*
- * IAR Compiler
- */
-#elif defined ( __ICCARM__ )
-  #include <cmsis_iccarm.h>
-
-
-/*
- * TI Arm Compiler
- */
-#elif defined ( __TI_ARM__ )
-  #include <cmsis_ccs.h>
-
-  #ifndef   __ASM
-    #define __ASM                                  __asm
-  #endif
-  #ifndef   __INLINE
-    #define __INLINE                               inline
-  #endif
-  #ifndef   __STATIC_INLINE
-    #define __STATIC_INLINE                        static inline
-  #endif
-  #ifndef   __STATIC_FORCEINLINE
-    #define __STATIC_FORCEINLINE                   __STATIC_INLINE
-  #endif
-  #ifndef   __NO_RETURN
-    #define __NO_RETURN                            __attribute__((noreturn))
-  #endif
-  #ifndef   __USED
-    #define __USED                                 __attribute__((used))
-  #endif
-  #ifndef   __WEAK
-    #define __WEAK                                 __attribute__((weak))
-  #endif
-  #ifndef   __PACKED
-    #define __PACKED                               __attribute__((packed))
-  #endif
-  #ifndef   __PACKED_STRUCT
-    #define __PACKED_STRUCT                        struct __attribute__((packed))
-  #endif
-  #ifndef   __PACKED_UNION
-    #define __PACKED_UNION                         union __attribute__((packed))
-  #endif
-  #ifndef   __UNALIGNED_UINT32        /* deprecated */
-    struct __attribute__((packed)) T_UINT32 { uint32_t v; };
-    #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)
-  #endif
-  #ifndef   __UNALIGNED_UINT16_WRITE
-    __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
-    #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void*)(addr))->v) = (val))
-  #endif
-  #ifndef   __UNALIGNED_UINT16_READ
-    __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
-    #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(addr))->v)
-  #endif
-  #ifndef   __UNALIGNED_UINT32_WRITE
-    __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
-    #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
-  #endif
-  #ifndef   __UNALIGNED_UINT32_READ
-    __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
-    #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(addr))->v)
-  #endif
-  #ifndef   __ALIGNED
-    #define __ALIGNED(x)                           __attribute__((aligned(x)))
-  #endif
-  #ifndef   __RESTRICT
-    #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
-    #define __RESTRICT
-  #endif
-
-
-/*
- * TASKING Compiler
- */
-#elif defined ( __TASKING__ )
-  /*
-   * The CMSIS functions have been implemented as intrinsics in the compiler.
-   * Please use "carm -?i" to get an up to date list of all intrinsics,
-   * Including the CMSIS ones.
-   */
-
-  #ifndef   __ASM
-    #define __ASM                                  __asm
-  #endif
-  #ifndef   __INLINE
-    #define __INLINE                               inline
-  #endif
-  #ifndef   __STATIC_INLINE
-    #define __STATIC_INLINE                        static inline
-  #endif
-  #ifndef   __STATIC_FORCEINLINE
-    #define __STATIC_FORCEINLINE                   __STATIC_INLINE
-  #endif
-  #ifndef   __NO_RETURN
-    #define __NO_RETURN                            __attribute__((noreturn))
-  #endif
-  #ifndef   __USED
-    #define __USED                                 __attribute__((used))
-  #endif
-  #ifndef   __WEAK
-    #define __WEAK                                 __attribute__((weak))
-  #endif
-  #ifndef   __PACKED
-    #define __PACKED                               __packed__
-  #endif
-  #ifndef   __PACKED_STRUCT
-    #define __PACKED_STRUCT                        struct __packed__
-  #endif
-  #ifndef   __PACKED_UNION
-    #define __PACKED_UNION                         union __packed__
-  #endif
-  #ifndef   __UNALIGNED_UINT32        /* deprecated */
-    struct __packed__ T_UINT32 { uint32_t v; };
-    #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)
-  #endif
-  #ifndef   __UNALIGNED_UINT16_WRITE
-    __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
-    #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
-  #endif
-  #ifndef   __UNALIGNED_UINT16_READ
-    __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
-    #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(addr))->v)
-  #endif
-  #ifndef   __UNALIGNED_UINT32_WRITE
-    __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
-    #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
-  #endif
-  #ifndef   __UNALIGNED_UINT32_READ
-    __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
-    #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(addr))->v)
-  #endif
-  #ifndef   __ALIGNED
-    #define __ALIGNED(x)              __align(x)
-  #endif
-  #ifndef   __RESTRICT
-    #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
-    #define __RESTRICT
-  #endif
-
-
-/*
- * COSMIC Compiler
- */
-#elif defined ( __CSMC__ )
-   #include <cmsis_csm.h>
-
- #ifndef   __ASM
-    #define __ASM                                  _asm
-  #endif
-  #ifndef   __INLINE
-    #define __INLINE                               inline
-  #endif
-  #ifndef   __STATIC_INLINE
-    #define __STATIC_INLINE                        static inline
-  #endif
-  #ifndef   __STATIC_FORCEINLINE
-    #define __STATIC_FORCEINLINE                   __STATIC_INLINE
-  #endif
-  #ifndef   __NO_RETURN
-    // NO RETURN is automatically detected hence no warning here
-    #define __NO_RETURN
-  #endif
-  #ifndef   __USED
-    #warning No compiler specific solution for __USED. __USED is ignored.
-    #define __USED
-  #endif
-  #ifndef   __WEAK
-    #define __WEAK                                 __weak
-  #endif
-  #ifndef   __PACKED
-    #define __PACKED                               @packed
-  #endif
-  #ifndef   __PACKED_STRUCT
-    #define __PACKED_STRUCT                        @packed struct
-  #endif
-  #ifndef   __PACKED_UNION
-    #define __PACKED_UNION                         @packed union
-  #endif
-  #ifndef   __UNALIGNED_UINT32        /* deprecated */
-    @packed struct T_UINT32 { uint32_t v; };
-    #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)
-  #endif
-  #ifndef   __UNALIGNED_UINT16_WRITE
-    __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
-    #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
-  #endif
-  #ifndef   __UNALIGNED_UINT16_READ
-    __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
-    #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(addr))->v)
-  #endif
-  #ifndef   __UNALIGNED_UINT32_WRITE
-    __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
-    #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
-  #endif
-  #ifndef   __UNALIGNED_UINT32_READ
-    __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
-    #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(addr))->v)
-  #endif
-  #ifndef   __ALIGNED
-    #warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored.
-    #define __ALIGNED(x)
-  #endif
-  #ifndef   __RESTRICT
-    #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
-    #define __RESTRICT
-  #endif
-
-
-#else
-  #error Unknown compiler.
-#endif
-
-
-#endif /* __CMSIS_COMPILER_H */
-

csl/stm32f042k6t6/CMSIS/Include/cmsis_iccarm.h

@@ -1,935 +0,0 @@
-/**************************************************************************//**
- * @file     cmsis_iccarm.h
- * @brief    CMSIS compiler ICCARM (IAR Compiler for Arm) header file
- * @version  V5.0.7
- * @date     19. June 2018
- ******************************************************************************/
-
-//------------------------------------------------------------------------------
-//
-// Copyright (c) 2017-2018 IAR Systems
-//
-// Licensed under the Apache License, Version 2.0 (the "License")
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-//
-//------------------------------------------------------------------------------
-
-
-#ifndef __CMSIS_ICCARM_H__
-#define __CMSIS_ICCARM_H__
-
-#ifndef __ICCARM__
-  #error This file should only be compiled by ICCARM
-#endif
-
-#pragma system_include
-
-#define __IAR_FT _Pragma("inline=forced") __intrinsic
-
-#if (__VER__ >= 8000000)
-  #define __ICCARM_V8 1
-#else
-  #define __ICCARM_V8 0
-#endif
-
-#ifndef __ALIGNED
-  #if __ICCARM_V8
-    #define __ALIGNED(x) __attribute__((aligned(x)))
-  #elif (__VER__ >= 7080000)
-    /* Needs IAR language extensions */
-    #define __ALIGNED(x) __attribute__((aligned(x)))
-  #else
-    #warning No compiler specific solution for __ALIGNED.__ALIGNED is ignored.
-    #define __ALIGNED(x)
-  #endif
-#endif
-
-
-/* Define compiler macros for CPU architecture, used in CMSIS 5.
- */
-#if __ARM_ARCH_6M__ || __ARM_ARCH_7M__ || __ARM_ARCH_7EM__ || __ARM_ARCH_8M_BASE__ || __ARM_ARCH_8M_MAIN__
-/* Macros already defined */
-#else
-  #if defined(__ARM8M_MAINLINE__) || defined(__ARM8EM_MAINLINE__)
-    #define __ARM_ARCH_8M_MAIN__ 1
-  #elif defined(__ARM8M_BASELINE__)
-    #define __ARM_ARCH_8M_BASE__ 1
-  #elif defined(__ARM_ARCH_PROFILE) && __ARM_ARCH_PROFILE == 'M'
-    #if __ARM_ARCH == 6
-      #define __ARM_ARCH_6M__ 1
-    #elif __ARM_ARCH == 7
-      #if __ARM_FEATURE_DSP
-        #define __ARM_ARCH_7EM__ 1
-      #else
-        #define __ARM_ARCH_7M__ 1
-      #endif
-    #endif /* __ARM_ARCH */
-  #endif /* __ARM_ARCH_PROFILE == 'M' */
-#endif
-
-/* Alternativ core deduction for older ICCARM's */
-#if !defined(__ARM_ARCH_6M__) && !defined(__ARM_ARCH_7M__) && !defined(__ARM_ARCH_7EM__) && \
-    !defined(__ARM_ARCH_8M_BASE__) && !defined(__ARM_ARCH_8M_MAIN__)
-  #if defined(__ARM6M__) && (__CORE__ == __ARM6M__)
-    #define __ARM_ARCH_6M__ 1
-  #elif defined(__ARM7M__) && (__CORE__ == __ARM7M__)
-    #define __ARM_ARCH_7M__ 1
-  #elif defined(__ARM7EM__) && (__CORE__ == __ARM7EM__)
-    #define __ARM_ARCH_7EM__  1
-  #elif defined(__ARM8M_BASELINE__) && (__CORE == __ARM8M_BASELINE__)
-    #define __ARM_ARCH_8M_BASE__ 1
-  #elif defined(__ARM8M_MAINLINE__) && (__CORE == __ARM8M_MAINLINE__)
-    #define __ARM_ARCH_8M_MAIN__ 1
-  #elif defined(__ARM8EM_MAINLINE__) && (__CORE == __ARM8EM_MAINLINE__)
-    #define __ARM_ARCH_8M_MAIN__ 1
-  #else
-    #error "Unknown target."
-  #endif
-#endif
-
-
-
-#if defined(__ARM_ARCH_6M__) && __ARM_ARCH_6M__==1
-  #define __IAR_M0_FAMILY  1
-#elif defined(__ARM_ARCH_8M_BASE__) && __ARM_ARCH_8M_BASE__==1
-  #define __IAR_M0_FAMILY  1
-#else
-  #define __IAR_M0_FAMILY  0
-#endif
-
-
-#ifndef __ASM
-  #define __ASM __asm
-#endif
-
-#ifndef __INLINE
-  #define __INLINE inline
-#endif
-
-#ifndef   __NO_RETURN
-  #if __ICCARM_V8
-    #define __NO_RETURN __attribute__((__noreturn__))
-  #else
-    #define __NO_RETURN _Pragma("object_attribute=__noreturn")
-  #endif
-#endif
-
-#ifndef   __PACKED
-  #if __ICCARM_V8
-    #define __PACKED __attribute__((packed, aligned(1)))
-  #else
-    /* Needs IAR language extensions */
-    #define __PACKED __packed
-  #endif
-#endif
-
-#ifndef   __PACKED_STRUCT
-  #if __ICCARM_V8
-    #define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
-  #else
-    /* Needs IAR language extensions */
-    #define __PACKED_STRUCT __packed struct
-  #endif
-#endif
-
-#ifndef   __PACKED_UNION
-  #if __ICCARM_V8
-    #define __PACKED_UNION union __attribute__((packed, aligned(1)))
-  #else
-    /* Needs IAR language extensions */
-    #define __PACKED_UNION __packed union
-  #endif
-#endif
-
-#ifndef   __RESTRICT
-  #define __RESTRICT            __restrict
-#endif
-
-#ifndef   __STATIC_INLINE
-  #define __STATIC_INLINE       static inline
-#endif
-
-#ifndef   __FORCEINLINE
-  #define __FORCEINLINE         _Pragma("inline=forced")
-#endif
-
-#ifndef   __STATIC_FORCEINLINE
-  #define __STATIC_FORCEINLINE  __FORCEINLINE __STATIC_INLINE
-#endif
-
-#ifndef __UNALIGNED_UINT16_READ
-#pragma language=save
-#pragma language=extended
-__IAR_FT uint16_t __iar_uint16_read(void const *ptr)
-{
-  return *(__packed uint16_t*)(ptr);
-}
-#pragma language=restore
-#define __UNALIGNED_UINT16_READ(PTR) __iar_uint16_read(PTR)
-#endif
-
-
-#ifndef __UNALIGNED_UINT16_WRITE
-#pragma language=save
-#pragma language=extended
-__IAR_FT void __iar_uint16_write(void const *ptr, uint16_t val)
-{
-  *(__packed uint16_t*)(ptr) = val;;
-}
-#pragma language=restore
-#define __UNALIGNED_UINT16_WRITE(PTR,VAL) __iar_uint16_write(PTR,VAL)
-#endif
-
-#ifndef __UNALIGNED_UINT32_READ
-#pragma language=save
-#pragma language=extended
-__IAR_FT uint32_t __iar_uint32_read(void const *ptr)
-{
-  return *(__packed uint32_t*)(ptr);
-}
-#pragma language=restore
-#define __UNALIGNED_UINT32_READ(PTR) __iar_uint32_read(PTR)
-#endif
-
-#ifndef __UNALIGNED_UINT32_WRITE
-#pragma language=save
-#pragma language=extended
-__IAR_FT void __iar_uint32_write(void const *ptr, uint32_t val)
-{
-  *(__packed uint32_t*)(ptr) = val;;
-}
-#pragma language=restore
-#define __UNALIGNED_UINT32_WRITE(PTR,VAL) __iar_uint32_write(PTR,VAL)
-#endif
-
-#ifndef __UNALIGNED_UINT32   /* deprecated */
-#pragma language=save
-#pragma language=extended
-__packed struct  __iar_u32 { uint32_t v; };
-#pragma language=restore
-#define __UNALIGNED_UINT32(PTR) (((struct __iar_u32 *)(PTR))->v)
-#endif
-
-#ifndef   __USED
-  #if __ICCARM_V8
-    #define __USED __attribute__((used))
-  #else
-    #define __USED _Pragma("__root")
-  #endif
-#endif
-
-#ifndef   __WEAK
-  #if __ICCARM_V8
-    #define __WEAK __attribute__((weak))
-  #else
-    #define __WEAK _Pragma("__weak")
-  #endif
-#endif
-
-
-#ifndef __ICCARM_INTRINSICS_VERSION__
-  #define __ICCARM_INTRINSICS_VERSION__  0
-#endif
-
-#if __ICCARM_INTRINSICS_VERSION__ == 2
-
-  #if defined(__CLZ)
-    #undef __CLZ
-  #endif
-  #if defined(__REVSH)
-    #undef __REVSH
-  #endif
-  #if defined(__RBIT)
-    #undef __RBIT
-  #endif
-  #if defined(__SSAT)
-    #undef __SSAT
-  #endif
-  #if defined(__USAT)
-    #undef __USAT
-  #endif
-
-  #include "iccarm_builtin.h"
-
-  #define __disable_fault_irq __iar_builtin_disable_fiq
-  #define __disable_irq       __iar_builtin_disable_interrupt
-  #define __enable_fault_irq  __iar_builtin_enable_fiq
-  #define __enable_irq        __iar_builtin_enable_interrupt
-  #define __arm_rsr           __iar_builtin_rsr
-  #define __arm_wsr           __iar_builtin_wsr
-
-
-  #define __get_APSR()                (__arm_rsr("APSR"))
-  #define __get_BASEPRI()             (__arm_rsr("BASEPRI"))
-  #define __get_CONTROL()             (__arm_rsr("CONTROL"))
-  #define __get_FAULTMASK()           (__arm_rsr("FAULTMASK"))
-
-  #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
-       (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
-    #define __get_FPSCR()             (__arm_rsr("FPSCR"))
-    #define __set_FPSCR(VALUE)        (__arm_wsr("FPSCR", (VALUE)))
-  #else
-    #define __get_FPSCR()             ( 0 )
-    #define __set_FPSCR(VALUE)        ((void)VALUE)
-  #endif
-
-  #define __get_IPSR()                (__arm_rsr("IPSR"))
-  #define __get_MSP()                 (__arm_rsr("MSP"))
-  #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-       (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
-    // without main extensions, the non-secure MSPLIM is RAZ/WI
-    #define __get_MSPLIM()            (0U)
-  #else
-    #define __get_MSPLIM()            (__arm_rsr("MSPLIM"))
-  #endif
-  #define __get_PRIMASK()             (__arm_rsr("PRIMASK"))
-  #define __get_PSP()                 (__arm_rsr("PSP"))
-
-  #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-       (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
-    // without main extensions, the non-secure PSPLIM is RAZ/WI
-    #define __get_PSPLIM()            (0U)
-  #else
-    #define __get_PSPLIM()            (__arm_rsr("PSPLIM"))
-  #endif
-
-  #define __get_xPSR()                (__arm_rsr("xPSR"))
-
-  #define __set_BASEPRI(VALUE)        (__arm_wsr("BASEPRI", (VALUE)))
-  #define __set_BASEPRI_MAX(VALUE)    (__arm_wsr("BASEPRI_MAX", (VALUE)))
-  #define __set_CONTROL(VALUE)        (__arm_wsr("CONTROL", (VALUE)))
-  #define __set_FAULTMASK(VALUE)      (__arm_wsr("FAULTMASK", (VALUE)))
-  #define __set_MSP(VALUE)            (__arm_wsr("MSP", (VALUE)))
-
-  #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-       (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
-    // without main extensions, the non-secure MSPLIM is RAZ/WI
-    #define __set_MSPLIM(VALUE)       ((void)(VALUE))
-  #else
-    #define __set_MSPLIM(VALUE)       (__arm_wsr("MSPLIM", (VALUE)))
-  #endif
-  #define __set_PRIMASK(VALUE)        (__arm_wsr("PRIMASK", (VALUE)))
-  #define __set_PSP(VALUE)            (__arm_wsr("PSP", (VALUE)))
-  #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-       (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
-    // without main extensions, the non-secure PSPLIM is RAZ/WI
-    #define __set_PSPLIM(VALUE)       ((void)(VALUE))
-  #else
-    #define __set_PSPLIM(VALUE)       (__arm_wsr("PSPLIM", (VALUE)))
-  #endif
-
-  #define __TZ_get_CONTROL_NS()       (__arm_rsr("CONTROL_NS"))
-  #define __TZ_set_CONTROL_NS(VALUE)  (__arm_wsr("CONTROL_NS", (VALUE)))
-  #define __TZ_get_PSP_NS()           (__arm_rsr("PSP_NS"))
-  #define __TZ_set_PSP_NS(VALUE)      (__arm_wsr("PSP_NS", (VALUE)))
-  #define __TZ_get_MSP_NS()           (__arm_rsr("MSP_NS"))
-  #define __TZ_set_MSP_NS(VALUE)      (__arm_wsr("MSP_NS", (VALUE)))
-  #define __TZ_get_SP_NS()            (__arm_rsr("SP_NS"))
-  #define __TZ_set_SP_NS(VALUE)       (__arm_wsr("SP_NS", (VALUE)))
-  #define __TZ_get_PRIMASK_NS()       (__arm_rsr("PRIMASK_NS"))
-  #define __TZ_set_PRIMASK_NS(VALUE)  (__arm_wsr("PRIMASK_NS", (VALUE)))
-  #define __TZ_get_BASEPRI_NS()       (__arm_rsr("BASEPRI_NS"))
-  #define __TZ_set_BASEPRI_NS(VALUE)  (__arm_wsr("BASEPRI_NS", (VALUE)))
-  #define __TZ_get_FAULTMASK_NS()     (__arm_rsr("FAULTMASK_NS"))
-  #define __TZ_set_FAULTMASK_NS(VALUE)(__arm_wsr("FAULTMASK_NS", (VALUE)))
-
-  #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-       (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
-    // without main extensions, the non-secure PSPLIM is RAZ/WI
-    #define __TZ_get_PSPLIM_NS()      (0U)
-    #define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE))
-  #else
-    #define __TZ_get_PSPLIM_NS()      (__arm_rsr("PSPLIM_NS"))
-    #define __TZ_set_PSPLIM_NS(VALUE) (__arm_wsr("PSPLIM_NS", (VALUE)))
-  #endif
-
-  #define __TZ_get_MSPLIM_NS()        (__arm_rsr("MSPLIM_NS"))
-  #define __TZ_set_MSPLIM_NS(VALUE)   (__arm_wsr("MSPLIM_NS", (VALUE)))
-
-  #define __NOP     __iar_builtin_no_operation
-
-  #define __CLZ     __iar_builtin_CLZ
-  #define __CLREX   __iar_builtin_CLREX
-
-  #define __DMB     __iar_builtin_DMB
-  #define __DSB     __iar_builtin_DSB
-  #define __ISB     __iar_builtin_ISB
-
-  #define __LDREXB  __iar_builtin_LDREXB
-  #define __LDREXH  __iar_builtin_LDREXH
-  #define __LDREXW  __iar_builtin_LDREX
-
-  #define __RBIT    __iar_builtin_RBIT
-  #define __REV     __iar_builtin_REV
-  #define __REV16   __iar_builtin_REV16
-
-  __IAR_FT int16_t __REVSH(int16_t val)
-  {
-    return (int16_t) __iar_builtin_REVSH(val);
-  }
-
-  #define __ROR     __iar_builtin_ROR
-  #define __RRX     __iar_builtin_RRX
-
-  #define __SEV     __iar_builtin_SEV
-
-  #if !__IAR_M0_FAMILY
-    #define __SSAT    __iar_builtin_SSAT
-  #endif
-
-  #define __STREXB  __iar_builtin_STREXB
-  #define __STREXH  __iar_builtin_STREXH
-  #define __STREXW  __iar_builtin_STREX
-
-  #if !__IAR_M0_FAMILY
-    #define __USAT    __iar_builtin_USAT
-  #endif
-
-  #define __WFE     __iar_builtin_WFE
-  #define __WFI     __iar_builtin_WFI
-
-  #if __ARM_MEDIA__
-    #define __SADD8   __iar_builtin_SADD8
-    #define __QADD8   __iar_builtin_QADD8
-    #define __SHADD8  __iar_builtin_SHADD8
-    #define __UADD8   __iar_builtin_UADD8
-    #define __UQADD8  __iar_builtin_UQADD8
-    #define __UHADD8  __iar_builtin_UHADD8
-    #define __SSUB8   __iar_builtin_SSUB8
-    #define __QSUB8   __iar_builtin_QSUB8
-    #define __SHSUB8  __iar_builtin_SHSUB8
-    #define __USUB8   __iar_builtin_USUB8
-    #define __UQSUB8  __iar_builtin_UQSUB8
-    #define __UHSUB8  __iar_builtin_UHSUB8
-    #define __SADD16  __iar_builtin_SADD16
-    #define __QADD16  __iar_builtin_QADD16
-    #define __SHADD16 __iar_builtin_SHADD16
-    #define __UADD16  __iar_builtin_UADD16
-    #define __UQADD16 __iar_builtin_UQADD16
-    #define __UHADD16 __iar_builtin_UHADD16
-    #define __SSUB16  __iar_builtin_SSUB16
-    #define __QSUB16  __iar_builtin_QSUB16
-    #define __SHSUB16 __iar_builtin_SHSUB16
-    #define __USUB16  __iar_builtin_USUB16
-    #define __UQSUB16 __iar_builtin_UQSUB16
-    #define __UHSUB16 __iar_builtin_UHSUB16
-    #define __SASX    __iar_builtin_SASX
-    #define __QASX    __iar_builtin_QASX
-    #define __SHASX   __iar_builtin_SHASX
-    #define __UASX    __iar_builtin_UASX
-    #define __UQASX   __iar_builtin_UQASX
-    #define __UHASX   __iar_builtin_UHASX
-    #define __SSAX    __iar_builtin_SSAX
-    #define __QSAX    __iar_builtin_QSAX
-    #define __SHSAX   __iar_builtin_SHSAX
-    #define __USAX    __iar_builtin_USAX
-    #define __UQSAX   __iar_builtin_UQSAX
-    #define __UHSAX   __iar_builtin_UHSAX
-    #define __USAD8   __iar_builtin_USAD8
-    #define __USADA8  __iar_builtin_USADA8
-    #define __SSAT16  __iar_builtin_SSAT16
-    #define __USAT16  __iar_builtin_USAT16
-    #define __UXTB16  __iar_builtin_UXTB16
-    #define __UXTAB16 __iar_builtin_UXTAB16
-    #define __SXTB16  __iar_builtin_SXTB16
-    #define __SXTAB16 __iar_builtin_SXTAB16
-    #define __SMUAD   __iar_builtin_SMUAD
-    #define __SMUADX  __iar_builtin_SMUADX
-    #define __SMMLA   __iar_builtin_SMMLA
-    #define __SMLAD   __iar_builtin_SMLAD
-    #define __SMLADX  __iar_builtin_SMLADX
-    #define __SMLALD  __iar_builtin_SMLALD
-    #define __SMLALDX __iar_builtin_SMLALDX
-    #define __SMUSD   __iar_builtin_SMUSD
-    #define __SMUSDX  __iar_builtin_SMUSDX
-    #define __SMLSD   __iar_builtin_SMLSD
-    #define __SMLSDX  __iar_builtin_SMLSDX
-    #define __SMLSLD  __iar_builtin_SMLSLD
-    #define __SMLSLDX __iar_builtin_SMLSLDX
-    #define __SEL     __iar_builtin_SEL
-    #define __QADD    __iar_builtin_QADD
-    #define __QSUB    __iar_builtin_QSUB
-    #define __PKHBT   __iar_builtin_PKHBT
-    #define __PKHTB   __iar_builtin_PKHTB
-  #endif
-
-#else /* __ICCARM_INTRINSICS_VERSION__ == 2 */
-
-  #if __IAR_M0_FAMILY
-   /* Avoid clash between intrinsics.h and arm_math.h when compiling for Cortex-M0. */
-    #define __CLZ  __cmsis_iar_clz_not_active
-    #define __SSAT __cmsis_iar_ssat_not_active
-    #define __USAT __cmsis_iar_usat_not_active
-    #define __RBIT __cmsis_iar_rbit_not_active
-    #define __get_APSR  __cmsis_iar_get_APSR_not_active
-  #endif
-
-
-  #if (!((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
-         (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     ))
-    #define __get_FPSCR __cmsis_iar_get_FPSR_not_active
-    #define __set_FPSCR __cmsis_iar_set_FPSR_not_active
-  #endif
-
-  #ifdef __INTRINSICS_INCLUDED
-  #error intrinsics.h is already included previously!
-  #endif
-
-  #include <intrinsics.h>
-
-  #if __IAR_M0_FAMILY
-   /* Avoid clash between intrinsics.h and arm_math.h when compiling for Cortex-M0. */
-    #undef __CLZ
-    #undef __SSAT
-    #undef __USAT
-    #undef __RBIT
-    #undef __get_APSR
-
-    __STATIC_INLINE uint8_t __CLZ(uint32_t data)
-    {
-      if (data == 0U) { return 32U; }
-
-      uint32_t count = 0U;
-      uint32_t mask = 0x80000000U;
-
-      while ((data & mask) == 0U)
-      {
-        count += 1U;
-        mask = mask >> 1U;
-      }
-      return count;
-    }
-
-    __STATIC_INLINE uint32_t __RBIT(uint32_t v)
-    {
-      uint8_t sc = 31U;
-      uint32_t r = v;
-      for (v >>= 1U; v; v >>= 1U)
-      {
-        r <<= 1U;
-        r |= v & 1U;
-        sc--;
-      }
-      return (r << sc);
-    }
-
-    __STATIC_INLINE  uint32_t __get_APSR(void)
-    {
-      uint32_t res;
-      __asm("MRS      %0,APSR" : "=r" (res));
-      return res;
-    }
-
-  #endif
-
-  #if (!((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
-         (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     ))
-    #undef __get_FPSCR
-    #undef __set_FPSCR
-    #define __get_FPSCR()       (0)
-    #define __set_FPSCR(VALUE)  ((void)VALUE)
-  #endif
-
-  #pragma diag_suppress=Pe940
-  #pragma diag_suppress=Pe177
-
-  #define __enable_irq    __enable_interrupt
-  #define __disable_irq   __disable_interrupt
-  #define __NOP           __no_operation
-
-  #define __get_xPSR      __get_PSR
-
-  #if (!defined(__ARM_ARCH_6M__) || __ARM_ARCH_6M__==0)
-
-    __IAR_FT uint32_t __LDREXW(uint32_t volatile *ptr)
-    {
-      return __LDREX((unsigned long *)ptr);
-    }
-
-    __IAR_FT uint32_t __STREXW(uint32_t value, uint32_t volatile *ptr)
-    {
-      return __STREX(value, (unsigned long *)ptr);
-    }
-  #endif
-
-
-  /* __CORTEX_M is defined in core_cm0.h, core_cm3.h and core_cm4.h. */
-  #if (__CORTEX_M >= 0x03)
-
-    __IAR_FT uint32_t __RRX(uint32_t value)
-    {
-      uint32_t result;
-      __ASM("RRX      %0, %1" : "=r"(result) : "r" (value) : "cc");
-      return(result);
-    }
-
-    __IAR_FT void __set_BASEPRI_MAX(uint32_t value)
-    {
-      __asm volatile("MSR      BASEPRI_MAX,%0"::"r" (value));
-    }
-
-
-    #define __enable_fault_irq  __enable_fiq
-    #define __disable_fault_irq __disable_fiq
-
-
-  #endif /* (__CORTEX_M >= 0x03) */
-
-  __IAR_FT uint32_t __ROR(uint32_t op1, uint32_t op2)
-  {
-    return (op1 >> op2) | (op1 << ((sizeof(op1)*8)-op2));
-  }
-
-  #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
-       (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
-
-   __IAR_FT uint32_t __get_MSPLIM(void)
-    {
-      uint32_t res;
-    #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-         (!defined (__ARM_FEATURE_CMSE  ) || (__ARM_FEATURE_CMSE   < 3)))
-      // without main extensions, the non-secure MSPLIM is RAZ/WI
-      res = 0U;
-    #else
-      __asm volatile("MRS      %0,MSPLIM" : "=r" (res));
-    #endif
-      return res;
-    }
-
-    __IAR_FT void   __set_MSPLIM(uint32_t value)
-    {
-    #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-         (!defined (__ARM_FEATURE_CMSE  ) || (__ARM_FEATURE_CMSE   < 3)))
-      // without main extensions, the non-secure MSPLIM is RAZ/WI
-      (void)value;
-    #else
-      __asm volatile("MSR      MSPLIM,%0" :: "r" (value));
-    #endif
-    }
-
-    __IAR_FT uint32_t __get_PSPLIM(void)
-    {
-      uint32_t res;
-    #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-         (!defined (__ARM_FEATURE_CMSE  ) || (__ARM_FEATURE_CMSE   < 3)))
-      // without main extensions, the non-secure PSPLIM is RAZ/WI
-      res = 0U;
-    #else
-      __asm volatile("MRS      %0,PSPLIM" : "=r" (res));
-    #endif
-      return res;
-    }
-
-    __IAR_FT void   __set_PSPLIM(uint32_t value)
-    {
-    #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-         (!defined (__ARM_FEATURE_CMSE  ) || (__ARM_FEATURE_CMSE   < 3)))
-      // without main extensions, the non-secure PSPLIM is RAZ/WI
-      (void)value;
-    #else
-      __asm volatile("MSR      PSPLIM,%0" :: "r" (value));
-    #endif
-    }
-
-    __IAR_FT uint32_t __TZ_get_CONTROL_NS(void)
-    {
-      uint32_t res;
-      __asm volatile("MRS      %0,CONTROL_NS" : "=r" (res));
-      return res;
-    }
-
-    __IAR_FT void   __TZ_set_CONTROL_NS(uint32_t value)
-    {
-      __asm volatile("MSR      CONTROL_NS,%0" :: "r" (value));
-    }
-
-    __IAR_FT uint32_t   __TZ_get_PSP_NS(void)
-    {
-      uint32_t res;
-      __asm volatile("MRS      %0,PSP_NS" : "=r" (res));
-      return res;
-    }
-
-    __IAR_FT void   __TZ_set_PSP_NS(uint32_t value)
-    {
-      __asm volatile("MSR      PSP_NS,%0" :: "r" (value));
-    }
-
-    __IAR_FT uint32_t   __TZ_get_MSP_NS(void)
-    {
-      uint32_t res;
-      __asm volatile("MRS      %0,MSP_NS" : "=r" (res));
-      return res;
-    }
-
-    __IAR_FT void   __TZ_set_MSP_NS(uint32_t value)
-    {
-      __asm volatile("MSR      MSP_NS,%0" :: "r" (value));
-    }
-
-    __IAR_FT uint32_t   __TZ_get_SP_NS(void)
-    {
-      uint32_t res;
-      __asm volatile("MRS      %0,SP_NS" : "=r" (res));
-      return res;
-    }
-    __IAR_FT void   __TZ_set_SP_NS(uint32_t value)
-    {
-      __asm volatile("MSR      SP_NS,%0" :: "r" (value));
-    }
-
-    __IAR_FT uint32_t   __TZ_get_PRIMASK_NS(void)
-    {
-      uint32_t res;
-      __asm volatile("MRS      %0,PRIMASK_NS" : "=r" (res));
-      return res;
-    }
-
-    __IAR_FT void   __TZ_set_PRIMASK_NS(uint32_t value)
-    {
-      __asm volatile("MSR      PRIMASK_NS,%0" :: "r" (value));
-    }
-
-    __IAR_FT uint32_t   __TZ_get_BASEPRI_NS(void)
-    {
-      uint32_t res;
-      __asm volatile("MRS      %0,BASEPRI_NS" : "=r" (res));
-      return res;
-    }
-
-    __IAR_FT void   __TZ_set_BASEPRI_NS(uint32_t value)
-    {
-      __asm volatile("MSR      BASEPRI_NS,%0" :: "r" (value));
-    }
-
-    __IAR_FT uint32_t   __TZ_get_FAULTMASK_NS(void)
-    {
-      uint32_t res;
-      __asm volatile("MRS      %0,FAULTMASK_NS" : "=r" (res));
-      return res;
-    }
-
-    __IAR_FT void   __TZ_set_FAULTMASK_NS(uint32_t value)
-    {
-      __asm volatile("MSR      FAULTMASK_NS,%0" :: "r" (value));
-    }
-
-    __IAR_FT uint32_t   __TZ_get_PSPLIM_NS(void)
-    {
-      uint32_t res;
-    #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-         (!defined (__ARM_FEATURE_CMSE  ) || (__ARM_FEATURE_CMSE   < 3)))
-      // without main extensions, the non-secure PSPLIM is RAZ/WI
-      res = 0U;
-    #else
-      __asm volatile("MRS      %0,PSPLIM_NS" : "=r" (res));
-    #endif
-      return res;
-    }
-
-    __IAR_FT void   __TZ_set_PSPLIM_NS(uint32_t value)
-    {
-    #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-         (!defined (__ARM_FEATURE_CMSE  ) || (__ARM_FEATURE_CMSE   < 3)))
-      // without main extensions, the non-secure PSPLIM is RAZ/WI
-      (void)value;
-    #else
-      __asm volatile("MSR      PSPLIM_NS,%0" :: "r" (value));
-    #endif
-    }
-
-    __IAR_FT uint32_t   __TZ_get_MSPLIM_NS(void)
-    {
-      uint32_t res;
-      __asm volatile("MRS      %0,MSPLIM_NS" : "=r" (res));
-      return res;
-    }
-
-    __IAR_FT void   __TZ_set_MSPLIM_NS(uint32_t value)
-    {
-      __asm volatile("MSR      MSPLIM_NS,%0" :: "r" (value));
-    }
-
-  #endif /* __ARM_ARCH_8M_MAIN__ or __ARM_ARCH_8M_BASE__ */
-
-#endif   /* __ICCARM_INTRINSICS_VERSION__ == 2 */
-
-#define __BKPT(value)    __asm volatile ("BKPT     %0" : : "i"(value))
-
-#if __IAR_M0_FAMILY
-  __STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat)
-  {
-    if ((sat >= 1U) && (sat <= 32U))
-    {
-      const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
-      const int32_t min = -1 - max ;
-      if (val > max)
-      {
-        return max;
-      }
-      else if (val < min)
-      {
-        return min;
-      }
-    }
-    return val;
-  }
-
-  __STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat)
-  {
-    if (sat <= 31U)
-    {
-      const uint32_t max = ((1U << sat) - 1U);
-      if (val > (int32_t)max)
-      {
-        return max;
-      }
-      else if (val < 0)
-      {
-        return 0U;
-      }
-    }
-    return (uint32_t)val;
-  }
-#endif
-
-#if (__CORTEX_M >= 0x03)   /* __CORTEX_M is defined in core_cm0.h, core_cm3.h and core_cm4.h. */
-
-  __IAR_FT uint8_t __LDRBT(volatile uint8_t *addr)
-  {
-    uint32_t res;
-    __ASM("LDRBT %0, [%1]" : "=r" (res) : "r" (addr) : "memory");
-    return ((uint8_t)res);
-  }
-
-  __IAR_FT uint16_t __LDRHT(volatile uint16_t *addr)
-  {
-    uint32_t res;
-    __ASM("LDRHT %0, [%1]" : "=r" (res) : "r" (addr) : "memory");
-    return ((uint16_t)res);
-  }
-
-  __IAR_FT uint32_t __LDRT(volatile uint32_t *addr)
-  {
-    uint32_t res;
-    __ASM("LDRT %0, [%1]" : "=r" (res) : "r" (addr) : "memory");
-    return res;
-  }
-
-  __IAR_FT void __STRBT(uint8_t value, volatile uint8_t *addr)
-  {
-    __ASM("STRBT %1, [%0]" : : "r" (addr), "r" ((uint32_t)value) : "memory");
-  }
-
-  __IAR_FT void __STRHT(uint16_t value, volatile uint16_t *addr)
-  {
-    __ASM("STRHT %1, [%0]" : : "r" (addr), "r" ((uint32_t)value) : "memory");
-  }
-
-  __IAR_FT void __STRT(uint32_t value, volatile uint32_t *addr)
-  {
-    __ASM("STRT %1, [%0]" : : "r" (addr), "r" (value) : "memory");
-  }
-
-#endif /* (__CORTEX_M >= 0x03) */
-
-#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
-     (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
-
-
-  __IAR_FT uint8_t __LDAB(volatile uint8_t *ptr)
-  {
-    uint32_t res;
-    __ASM volatile ("LDAB %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
-    return ((uint8_t)res);
-  }
-
-  __IAR_FT uint16_t __LDAH(volatile uint16_t *ptr)
-  {
-    uint32_t res;
-    __ASM volatile ("LDAH %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
-    return ((uint16_t)res);
-  }
-
-  __IAR_FT uint32_t __LDA(volatile uint32_t *ptr)
-  {
-    uint32_t res;
-    __ASM volatile ("LDA %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
-    return res;
-  }
-
-  __IAR_FT void __STLB(uint8_t value, volatile uint8_t *ptr)
-  {
-    __ASM volatile ("STLB %1, [%0]" :: "r" (ptr), "r" (value) : "memory");
-  }
-
-  __IAR_FT void __STLH(uint16_t value, volatile uint16_t *ptr)
-  {
-    __ASM volatile ("STLH %1, [%0]" :: "r" (ptr), "r" (value) : "memory");
-  }
-
-  __IAR_FT void __STL(uint32_t value, volatile uint32_t *ptr)
-  {
-    __ASM volatile ("STL %1, [%0]" :: "r" (ptr), "r" (value) : "memory");
-  }
-
-  __IAR_FT uint8_t __LDAEXB(volatile uint8_t *ptr)
-  {
-    uint32_t res;
-    __ASM volatile ("LDAEXB %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
-    return ((uint8_t)res);
-  }
-
-  __IAR_FT uint16_t __LDAEXH(volatile uint16_t *ptr)
-  {
-    uint32_t res;
-    __ASM volatile ("LDAEXH %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
-    return ((uint16_t)res);
-  }
-
-  __IAR_FT uint32_t __LDAEX(volatile uint32_t *ptr)
-  {
-    uint32_t res;
-    __ASM volatile ("LDAEX %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
-    return res;
-  }
-
-  __IAR_FT uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr)
-  {
-    uint32_t res;
-    __ASM volatile ("STLEXB %0, %2, [%1]" : "=r" (res) : "r" (ptr), "r" (value) : "memory");
-    return res;
-  }
-
-  __IAR_FT uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr)
-  {
-    uint32_t res;
-    __ASM volatile ("STLEXH %0, %2, [%1]" : "=r" (res) : "r" (ptr), "r" (value) : "memory");
-    return res;
-  }
-
-  __IAR_FT uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr)
-  {
-    uint32_t res;
-    __ASM volatile ("STLEX %0, %2, [%1]" : "=r" (res) : "r" (ptr), "r" (value) : "memory");
-    return res;
-  }
-
-#endif /* __ARM_ARCH_8M_MAIN__ or __ARM_ARCH_8M_BASE__ */
-
-#undef __IAR_FT
-#undef __IAR_M0_FAMILY
-#undef __ICCARM_V8
-
-#pragma diag_default=Pe940
-#pragma diag_default=Pe177
-
-#endif /* __CMSIS_ICCARM_H__ */

csl/stm32f042k6t6/CMSIS/Include/cmsis_version.h

@@ -1,39 +0,0 @@
-/**************************************************************************//**
- * @file     cmsis_version.h
- * @brief    CMSIS Core(M) Version definitions
- * @version  V5.0.2
- * @date     19. April 2017
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2017 ARM Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#if   defined ( __ICCARM__ )
-  #pragma system_include         /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
-  #pragma clang system_header   /* treat file as system include file */
-#endif
-
-#ifndef __CMSIS_VERSION_H
-#define __CMSIS_VERSION_H
-
-/*  CMSIS Version definitions */
-#define __CM_CMSIS_VERSION_MAIN  ( 5U)                                      /*!< [31:16] CMSIS Core(M) main version */
-#define __CM_CMSIS_VERSION_SUB   ( 1U)                                      /*!< [15:0]  CMSIS Core(M) sub version */
-#define __CM_CMSIS_VERSION       ((__CM_CMSIS_VERSION_MAIN << 16U) | \
-                                   __CM_CMSIS_VERSION_SUB           )       /*!< CMSIS Core(M) version number */
-#endif

csl/stm32f042k6t6/CMSIS/Include/core_cm0.h

@@ -1,949 +0,0 @@
-/**************************************************************************//**
- * @file     core_cm0.h
- * @brief    CMSIS Cortex-M0 Core Peripheral Access Layer Header File
- * @version  V5.0.5
- * @date     28. May 2018
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#if   defined ( __ICCARM__ )
-  #pragma system_include         /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
-  #pragma clang system_header   /* treat file as system include file */
-#endif
-
-#ifndef __CORE_CM0_H_GENERIC
-#define __CORE_CM0_H_GENERIC
-
-#include <stdint.h>
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/**
-  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
-  CMSIS violates the following MISRA-C:2004 rules:
-
-   \li Required Rule 8.5, object/function definition in header file.<br>
-     Function definitions in header files are used to allow 'inlining'.
-
-   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
-     Unions are used for effective representation of core registers.
-
-   \li Advisory Rule 19.7, Function-like macro defined.<br>
-     Function-like macros are used to allow more efficient code.
- */
-
-
-/*******************************************************************************
- *                 CMSIS definitions
- ******************************************************************************/
-/**
-  \ingroup Cortex_M0
-  @{
- */
-
-#include "cmsis_version.h"
- 
-/*  CMSIS CM0 definitions */
-#define __CM0_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)              /*!< \deprecated [31:16] CMSIS HAL main version */
-#define __CM0_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)               /*!< \deprecated [15:0]  CMSIS HAL sub version */
-#define __CM0_CMSIS_VERSION       ((__CM0_CMSIS_VERSION_MAIN << 16U) | \
-                                    __CM0_CMSIS_VERSION_SUB           )  /*!< \deprecated CMSIS HAL version number */
-
-#define __CORTEX_M                (0U)                                   /*!< Cortex-M Core */
-
-/** __FPU_USED indicates whether an FPU is used or not.
-    This core does not support an FPU at all
-*/
-#define __FPU_USED       0U
-
-#if defined ( __CC_ARM )
-  #if defined __TARGET_FPU_VFP
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if defined __ARM_PCS_VFP
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __GNUC__ )
-  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __ICCARM__ )
-  #if defined __ARMVFP__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __TI_ARM__ )
-  #if defined __TI_VFP_SUPPORT__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __TASKING__ )
-  #if defined __FPU_VFP__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __CSMC__ )
-  #if ( __CSMC__ & 0x400U)
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#endif
-
-#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM0_H_GENERIC */
-
-#ifndef __CMSIS_GENERIC
-
-#ifndef __CORE_CM0_H_DEPENDANT
-#define __CORE_CM0_H_DEPENDANT
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* check device defines and use defaults */
-#if defined __CHECK_DEVICE_DEFINES
-  #ifndef __CM0_REV
-    #define __CM0_REV               0x0000U
-    #warning "__CM0_REV not defined in device header file; using default!"
-  #endif
-
-  #ifndef __NVIC_PRIO_BITS
-    #define __NVIC_PRIO_BITS          2U
-    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
-  #endif
-
-  #ifndef __Vendor_SysTickConfig
-    #define __Vendor_SysTickConfig    0U
-    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
-  #endif
-#endif
-
-/* IO definitions (access restrictions to peripheral registers) */
-/**
-    \defgroup CMSIS_glob_defs CMSIS Global Defines
-
-    <strong>IO Type Qualifiers</strong> are used
-    \li to specify the access to peripheral variables.
-    \li for automatic generation of peripheral register debug information.
-*/
-#ifdef __cplusplus
-  #define   __I     volatile             /*!< Defines 'read only' permissions */
-#else
-  #define   __I     volatile const       /*!< Defines 'read only' permissions */
-#endif
-#define     __O     volatile             /*!< Defines 'write only' permissions */
-#define     __IO    volatile             /*!< Defines 'read / write' permissions */
-
-/* following defines should be used for structure members */
-#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
-#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
-#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
-
-/*@} end of group Cortex_M0 */
-
-
-
-/*******************************************************************************
- *                 Register Abstraction
-  Core Register contain:
-  - Core Register
-  - Core NVIC Register
-  - Core SCB Register
-  - Core SysTick Register
- ******************************************************************************/
-/**
-  \defgroup CMSIS_core_register Defines and Type Definitions
-  \brief Type definitions and defines for Cortex-M processor based devices.
-*/
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_CORE  Status and Control Registers
-  \brief      Core Register type definitions.
-  @{
- */
-
-/**
-  \brief  Union type to access the Application Program Status Register (APSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t _reserved0:28;              /*!< bit:  0..27  Reserved */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} APSR_Type;
-
-/* APSR Register Definitions */
-#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
-#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
-
-#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
-#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
-
-#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
-#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
-
-#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
-#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
-
-
-/**
-  \brief  Union type to access the Interrupt Program Status Register (IPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} IPSR_Type;
-
-/* IPSR Register Definitions */
-#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
-#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
-
-
-/**
-  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:15;              /*!< bit:  9..23  Reserved */
-    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */
-    uint32_t _reserved1:3;               /*!< bit: 25..27  Reserved */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} xPSR_Type;
-
-/* xPSR Register Definitions */
-#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
-#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
-
-#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
-#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
-
-#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
-#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
-
-#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
-#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
-
-#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
-#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
-
-#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
-#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
-
-
-/**
-  \brief  Union type to access the Control Registers (CONTROL).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t _reserved0:1;               /*!< bit:      0  Reserved */
-    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used */
-    uint32_t _reserved1:30;              /*!< bit:  2..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} CONTROL_Type;
-
-/* CONTROL Register Definitions */
-#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
-#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
-
-/*@} end of group CMSIS_CORE */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
-  \brief      Type definitions for the NVIC Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
- */
-typedef struct
-{
-  __IOM uint32_t ISER[1U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
-        uint32_t RESERVED0[31U];
-  __IOM uint32_t ICER[1U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
-        uint32_t RSERVED1[31U];
-  __IOM uint32_t ISPR[1U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
-        uint32_t RESERVED2[31U];
-  __IOM uint32_t ICPR[1U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
-        uint32_t RESERVED3[31U];
-        uint32_t RESERVED4[64U];
-  __IOM uint32_t IP[8U];                 /*!< Offset: 0x300 (R/W)  Interrupt Priority Register */
-}  NVIC_Type;
-
-/*@} end of group CMSIS_NVIC */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SCB     System Control Block (SCB)
-  \brief    Type definitions for the System Control Block Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Control Block (SCB).
- */
-typedef struct
-{
-  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
-  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
-        uint32_t RESERVED0;
-  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
-  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
-  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
-        uint32_t RESERVED1;
-  __IOM uint32_t SHP[2U];                /*!< Offset: 0x01C (R/W)  System Handlers Priority Registers. [0] is RESERVED */
-  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
-} SCB_Type;
-
-/* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
-#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
-
-#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
-#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
-
-#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
-#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
-
-#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
-#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
-
-#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
-#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
-
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_NMIPENDSET_Pos            31U                                            /*!< SCB ICSR: NMIPENDSET Position */
-#define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)               /*!< SCB ICSR: NMIPENDSET Mask */
-
-#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
-#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
-
-#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
-#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
-
-#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
-#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
-
-#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
-#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
-
-#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
-#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
-
-#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
-#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
-
-#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
-#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
-
-#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
-#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
-
-/* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
-#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
-
-#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
-#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
-
-#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
-#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
-
-#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
-#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
-
-#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
-#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
-
-/* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
-#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
-
-#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
-#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
-
-#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
-#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
-
-/* SCB Configuration Control Register Definitions */
-#define SCB_CCR_STKALIGN_Pos                9U                                            /*!< SCB CCR: STKALIGN Position */
-#define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)                  /*!< SCB CCR: STKALIGN Mask */
-
-#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
-#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
-
-/* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
-#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
-
-/*@} end of group CMSIS_SCB */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
-  \brief    Type definitions for the System Timer Registers.
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Timer (SysTick).
- */
-typedef struct
-{
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
-  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
-  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
-  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
-} SysTick_Type;
-
-/* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
-#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
-
-#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
-#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
-
-#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
-#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
-
-#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
-#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
-
-/* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
-#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
-
-/* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
-#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
-
-/* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
-#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
-
-#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
-#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
-
-#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
-#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
-
-/*@} end of group CMSIS_SysTick */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
-  \brief    Cortex-M0 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor.
-            Therefore they are not covered by the Cortex-M0 header file.
-  @{
- */
-/*@} end of group CMSIS_CoreDebug */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_core_bitfield     Core register bit field macros
-  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
-  @{
- */
-
-/**
-  \brief   Mask and shift a bit field value for use in a register bit range.
-  \param[in] field  Name of the register bit field.
-  \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
-  \return           Masked and shifted value.
-*/
-#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
-
-/**
-  \brief     Mask and shift a register value to extract a bit filed value.
-  \param[in] field  Name of the register bit field.
-  \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
-  \return           Masked and shifted bit field value.
-*/
-#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
-
-/*@} end of group CMSIS_core_bitfield */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_core_base     Core Definitions
-  \brief      Definitions for base addresses, unions, and structures.
-  @{
- */
-
-/* Memory mapping of Core Hardware */
-#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address */
-#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address */
-#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address */
-#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address */
-
-#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct */
-#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct */
-#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct */
-
-
-/*@} */
-
-
-
-/*******************************************************************************
- *                Hardware Abstraction Layer
-  Core Function Interface contains:
-  - Core NVIC Functions
-  - Core SysTick Functions
-  - Core Register Access Functions
- ******************************************************************************/
-/**
-  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
-*/
-
-
-
-/* ##########################   NVIC functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
-  \brief    Functions that manage interrupts and exceptions via the NVIC.
-  @{
- */
-
-#ifdef CMSIS_NVIC_VIRTUAL
-  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
-    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
-  #endif
-  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
-#else
-  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping
-  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping
-  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
-  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
-  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
-  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
-  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
-  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
-/*#define NVIC_GetActive              __NVIC_GetActive             not available for Cortex-M0 */
-  #define NVIC_SetPriority            __NVIC_SetPriority
-  #define NVIC_GetPriority            __NVIC_GetPriority
-  #define NVIC_SystemReset            __NVIC_SystemReset
-#endif /* CMSIS_NVIC_VIRTUAL */
-
-#ifdef CMSIS_VECTAB_VIRTUAL
-  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
-    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
-  #endif
-  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
-#else
-  #define NVIC_SetVector              __NVIC_SetVector
-  #define NVIC_GetVector              __NVIC_GetVector
-#endif  /* (CMSIS_VECTAB_VIRTUAL) */
-
-#define NVIC_USER_IRQ_OFFSET          16
-
-
-/* The following EXC_RETURN values are saved the LR on exception entry */
-#define EXC_RETURN_HANDLER         (0xFFFFFFF1UL)     /* return to Handler mode, uses MSP after return                               */
-#define EXC_RETURN_THREAD_MSP      (0xFFFFFFF9UL)     /* return to Thread mode, uses MSP after return                                */
-#define EXC_RETURN_THREAD_PSP      (0xFFFFFFFDUL)     /* return to Thread mode, uses PSP after return                                */
-
-
-/* Interrupt Priorities are WORD accessible only under Armv6-M                  */
-/* The following MACROS handle generation of the register offset and byte masks */
-#define _BIT_SHIFT(IRQn)         (  ((((uint32_t)(int32_t)(IRQn))         )      &  0x03UL) * 8UL)
-#define _SHP_IDX(IRQn)           ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >>    2UL)      )
-#define _IP_IDX(IRQn)            (   (((uint32_t)(int32_t)(IRQn))                >>    2UL)      )
-
-#define __NVIC_SetPriorityGrouping(X) (void)(X)
-#define __NVIC_GetPriorityGrouping()  (0U)
-
-/**
-  \brief   Enable Interrupt
-  \details Enables a device specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Enable status
-  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt is not enabled.
-  \return             1  Interrupt is enabled.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->ISER[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Disable Interrupt
-  \details Disables a device specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-    __DSB();
-    __ISB();
-  }
-}
-
-
-/**
-  \brief   Get Pending Interrupt
-  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt status is not pending.
-  \return             1  Interrupt status is pending.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Set Pending Interrupt
-  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Clear Pending Interrupt
-  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Set Interrupt Priority
-  \details Sets the priority of a device specific interrupt or a processor exception.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]      IRQn  Interrupt number.
-  \param [in]  priority  Priority to set.
-  \note    The priority cannot be set for every processor exception.
- */
-__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->IP[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
-       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
-  }
-  else
-  {
-    SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
-       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Priority
-  \details Reads the priority of a device specific interrupt or a processor exception.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]   IRQn  Interrupt number.
-  \return             Interrupt Priority.
-                      Value is aligned automatically to the implemented priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
-{
-
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
-  }
-  else
-  {
-    return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
-  }
-}
-
-
-/**
-  \brief   Encode Priority
-  \details Encodes the priority for an interrupt with the given priority group,
-           preemptive priority value, and subpriority value.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
-  \param [in]     PriorityGroup  Used priority group.
-  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
-  \param [in]       SubPriority  Subpriority value (starting from 0).
-  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
- */
-__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
-{
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
-  uint32_t PreemptPriorityBits;
-  uint32_t SubPriorityBits;
-
-  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
-  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
-  return (
-           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
-           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
-         );
-}
-
-
-/**
-  \brief   Decode Priority
-  \details Decodes an interrupt priority value with a given priority group to
-           preemptive priority value and subpriority value.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
-  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
-  \param [in]     PriorityGroup  Used priority group.
-  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
-  \param [out]     pSubPriority  Subpriority value (starting from 0).
- */
-__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
-{
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
-  uint32_t PreemptPriorityBits;
-  uint32_t SubPriorityBits;
-
-  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
-  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
-  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
-  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);
-}
-
-
-
-/**
-  \brief   Set Interrupt Vector
-  \details Sets an interrupt vector in SRAM based interrupt vector table.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-           Address 0 must be mapped to SRAM.
-  \param [in]   IRQn      Interrupt number
-  \param [in]   vector    Address of interrupt handler function
- */
-__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
-{
-  uint32_t *vectors = (uint32_t *)0x0U;
-  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
-}
-
-
-/**
-  \brief   Get Interrupt Vector
-  \details Reads an interrupt vector from interrupt vector table.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]   IRQn      Interrupt number.
-  \return                 Address of interrupt handler function
- */
-__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
-{
-  uint32_t *vectors = (uint32_t *)0x0U;
-  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
-}
-
-
-/**
-  \brief   System Reset
-  \details Initiates a system reset request to reset the MCU.
- */
-__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
-{
-  __DSB();                                                          /* Ensure all outstanding memory accesses included
-                                                                       buffered write are completed before reset */
-  SCB->AIRCR  = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
-                 SCB_AIRCR_SYSRESETREQ_Msk);
-  __DSB();                                                          /* Ensure completion of memory access */
-
-  for(;;)                                                           /* wait until reset */
-  {
-    __NOP();
-  }
-}
-
-/*@} end of CMSIS_Core_NVICFunctions */
-
-
-/* ##########################  FPU functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_FpuFunctions FPU Functions
-  \brief    Function that provides FPU type.
-  @{
- */
-
-/**
-  \brief   get FPU type
-  \details returns the FPU type
-  \returns
-   - \b  0: No FPU
-   - \b  1: Single precision FPU
-   - \b  2: Double + Single precision FPU
- */
-__STATIC_INLINE uint32_t SCB_GetFPUType(void)
-{
-    return 0U;           /* No FPU */
-}
-
-
-/*@} end of CMSIS_Core_FpuFunctions */
-
-
-
-/* ##################################    SysTick function  ############################################ */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
-  \brief    Functions that configure the System.
-  @{
- */
-
-#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
-
-/**
-  \brief   System Tick Configuration
-  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
-           Counter is in free running mode to generate periodic interrupts.
-  \param [in]  ticks  Number of ticks between two interrupts.
-  \return          0  Function succeeded.
-  \return          1  Function failed.
-  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
-           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
-           must contain a vendor-specific implementation of this function.
- */
-__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
-{
-  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
-  {
-    return (1UL);                                                   /* Reload value impossible */
-  }
-
-  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
-  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
-  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
-  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
-                   SysTick_CTRL_TICKINT_Msk   |
-                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
-  return (0UL);                                                     /* Function successful */
-}
-
-#endif
-
-/*@} end of CMSIS_Core_SysTickFunctions */
-
-
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM0_H_DEPENDANT */
-
-#endif /* __CMSIS_GENERIC */

csl/stm32f042k6t6/CMSIS/Include/core_cm1.h

@@ -1,976 +0,0 @@
-/**************************************************************************//**
- * @file     core_cm1.h
- * @brief    CMSIS Cortex-M1 Core Peripheral Access Layer Header File
- * @version  V1.0.0
- * @date     23. July 2018
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#if   defined ( __ICCARM__ )
-  #pragma system_include         /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
-  #pragma clang system_header   /* treat file as system include file */
-#endif
-
-#ifndef __CORE_CM1_H_GENERIC
-#define __CORE_CM1_H_GENERIC
-
-#include <stdint.h>
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/**
-  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
-  CMSIS violates the following MISRA-C:2004 rules:
-
-   \li Required Rule 8.5, object/function definition in header file.<br>
-     Function definitions in header files are used to allow 'inlining'.
-
-   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
-     Unions are used for effective representation of core registers.
-
-   \li Advisory Rule 19.7, Function-like macro defined.<br>
-     Function-like macros are used to allow more efficient code.
- */
-
-
-/*******************************************************************************
- *                 CMSIS definitions
- ******************************************************************************/
-/**
-  \ingroup Cortex_M1
-  @{
- */
-
-#include "cmsis_version.h"
- 
-/*  CMSIS CM1 definitions */
-#define __CM1_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)              /*!< \deprecated [31:16] CMSIS HAL main version */
-#define __CM1_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)               /*!< \deprecated [15:0]  CMSIS HAL sub version */
-#define __CM1_CMSIS_VERSION       ((__CM1_CMSIS_VERSION_MAIN << 16U) | \
-                                    __CM1_CMSIS_VERSION_SUB           )  /*!< \deprecated CMSIS HAL version number */
-
-#define __CORTEX_M                (1U)                                   /*!< Cortex-M Core */
-
-/** __FPU_USED indicates whether an FPU is used or not.
-    This core does not support an FPU at all
-*/
-#define __FPU_USED       0U
-
-#if defined ( __CC_ARM )
-  #if defined __TARGET_FPU_VFP
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if defined __ARM_PCS_VFP
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __GNUC__ )
-  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __ICCARM__ )
-  #if defined __ARMVFP__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __TI_ARM__ )
-  #if defined __TI_VFP_SUPPORT__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __TASKING__ )
-  #if defined __FPU_VFP__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __CSMC__ )
-  #if ( __CSMC__ & 0x400U)
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#endif
-
-#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM1_H_GENERIC */
-
-#ifndef __CMSIS_GENERIC
-
-#ifndef __CORE_CM1_H_DEPENDANT
-#define __CORE_CM1_H_DEPENDANT
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* check device defines and use defaults */
-#if defined __CHECK_DEVICE_DEFINES
-  #ifndef __CM1_REV
-    #define __CM1_REV               0x0100U
-    #warning "__CM1_REV not defined in device header file; using default!"
-  #endif
-
-  #ifndef __NVIC_PRIO_BITS
-    #define __NVIC_PRIO_BITS          2U
-    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
-  #endif
-
-  #ifndef __Vendor_SysTickConfig
-    #define __Vendor_SysTickConfig    0U
-    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
-  #endif
-#endif
-
-/* IO definitions (access restrictions to peripheral registers) */
-/**
-    \defgroup CMSIS_glob_defs CMSIS Global Defines
-
-    <strong>IO Type Qualifiers</strong> are used
-    \li to specify the access to peripheral variables.
-    \li for automatic generation of peripheral register debug information.
-*/
-#ifdef __cplusplus
-  #define   __I     volatile             /*!< Defines 'read only' permissions */
-#else
-  #define   __I     volatile const       /*!< Defines 'read only' permissions */
-#endif
-#define     __O     volatile             /*!< Defines 'write only' permissions */
-#define     __IO    volatile             /*!< Defines 'read / write' permissions */
-
-/* following defines should be used for structure members */
-#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
-#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
-#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
-
-/*@} end of group Cortex_M1 */
-
-
-
-/*******************************************************************************
- *                 Register Abstraction
-  Core Register contain:
-  - Core Register
-  - Core NVIC Register
-  - Core SCB Register
-  - Core SysTick Register
- ******************************************************************************/
-/**
-  \defgroup CMSIS_core_register Defines and Type Definitions
-  \brief Type definitions and defines for Cortex-M processor based devices.
-*/
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_CORE  Status and Control Registers
-  \brief      Core Register type definitions.
-  @{
- */
-
-/**
-  \brief  Union type to access the Application Program Status Register (APSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t _reserved0:28;              /*!< bit:  0..27  Reserved */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} APSR_Type;
-
-/* APSR Register Definitions */
-#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
-#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
-
-#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
-#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
-
-#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
-#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
-
-#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
-#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
-
-
-/**
-  \brief  Union type to access the Interrupt Program Status Register (IPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} IPSR_Type;
-
-/* IPSR Register Definitions */
-#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
-#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
-
-
-/**
-  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:15;              /*!< bit:  9..23  Reserved */
-    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */
-    uint32_t _reserved1:3;               /*!< bit: 25..27  Reserved */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} xPSR_Type;
-
-/* xPSR Register Definitions */
-#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
-#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
-
-#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
-#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
-
-#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
-#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
-
-#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
-#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
-
-#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
-#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
-
-#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
-#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
-
-
-/**
-  \brief  Union type to access the Control Registers (CONTROL).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t _reserved0:1;               /*!< bit:      0  Reserved */
-    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used */
-    uint32_t _reserved1:30;              /*!< bit:  2..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} CONTROL_Type;
-
-/* CONTROL Register Definitions */
-#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
-#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
-
-/*@} end of group CMSIS_CORE */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
-  \brief      Type definitions for the NVIC Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
- */
-typedef struct
-{
-  __IOM uint32_t ISER[1U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
-        uint32_t RESERVED0[31U];
-  __IOM uint32_t ICER[1U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
-        uint32_t RSERVED1[31U];
-  __IOM uint32_t ISPR[1U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
-        uint32_t RESERVED2[31U];
-  __IOM uint32_t ICPR[1U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
-        uint32_t RESERVED3[31U];
-        uint32_t RESERVED4[64U];
-  __IOM uint32_t IP[8U];                 /*!< Offset: 0x300 (R/W)  Interrupt Priority Register */
-}  NVIC_Type;
-
-/*@} end of group CMSIS_NVIC */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SCB     System Control Block (SCB)
-  \brief    Type definitions for the System Control Block Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Control Block (SCB).
- */
-typedef struct
-{
-  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
-  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
-        uint32_t RESERVED0;
-  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
-  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
-  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
-        uint32_t RESERVED1;
-  __IOM uint32_t SHP[2U];                /*!< Offset: 0x01C (R/W)  System Handlers Priority Registers. [0] is RESERVED */
-  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
-} SCB_Type;
-
-/* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
-#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
-
-#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
-#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
-
-#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
-#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
-
-#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
-#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
-
-#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
-#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
-
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_NMIPENDSET_Pos            31U                                            /*!< SCB ICSR: NMIPENDSET Position */
-#define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)               /*!< SCB ICSR: NMIPENDSET Mask */
-
-#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
-#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
-
-#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
-#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
-
-#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
-#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
-
-#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
-#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
-
-#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
-#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
-
-#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
-#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
-
-#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
-#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
-
-#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
-#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
-
-/* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
-#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
-
-#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
-#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
-
-#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
-#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
-
-#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
-#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
-
-#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
-#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
-
-/* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
-#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
-
-#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
-#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
-
-#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
-#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
-
-/* SCB Configuration Control Register Definitions */
-#define SCB_CCR_STKALIGN_Pos                9U                                            /*!< SCB CCR: STKALIGN Position */
-#define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)                  /*!< SCB CCR: STKALIGN Mask */
-
-#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
-#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
-
-/* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
-#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
-
-/*@} end of group CMSIS_SCB */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
-  \brief    Type definitions for the System Control and ID Register not in the SCB
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Control and ID Register not in the SCB.
- */
-typedef struct
-{
-        uint32_t RESERVED0[2U];
-  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */
-} SCnSCB_Type;
-
-/* Auxiliary Control Register Definitions */
-#define SCnSCB_ACTLR_ITCMUAEN_Pos            4U                                        /*!< ACTLR: Instruction TCM Upper Alias Enable Position */
-#define SCnSCB_ACTLR_ITCMUAEN_Msk           (1UL << SCnSCB_ACTLR_ITCMUAEN_Pos)         /*!< ACTLR: Instruction TCM Upper Alias Enable Mask */
-
-#define SCnSCB_ACTLR_ITCMLAEN_Pos            3U                                        /*!< ACTLR: Instruction TCM Lower Alias Enable Position */
-#define SCnSCB_ACTLR_ITCMLAEN_Msk           (1UL << SCnSCB_ACTLR_ITCMLAEN_Pos)         /*!< ACTLR: Instruction TCM Lower Alias Enable Mask */
-
-/*@} end of group CMSIS_SCnotSCB */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
-  \brief    Type definitions for the System Timer Registers.
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Timer (SysTick).
- */
-typedef struct
-{
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
-  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
-  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
-  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
-} SysTick_Type;
-
-/* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
-#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
-
-#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
-#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
-
-#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
-#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
-
-#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
-#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
-
-/* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
-#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
-
-/* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
-#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
-
-/* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
-#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
-
-#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
-#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
-
-#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
-#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
-
-/*@} end of group CMSIS_SysTick */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
-  \brief    Cortex-M1 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor.
-            Therefore they are not covered by the Cortex-M1 header file.
-  @{
- */
-/*@} end of group CMSIS_CoreDebug */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_core_bitfield     Core register bit field macros
-  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
-  @{
- */
-
-/**
-  \brief   Mask and shift a bit field value for use in a register bit range.
-  \param[in] field  Name of the register bit field.
-  \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
-  \return           Masked and shifted value.
-*/
-#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
-
-/**
-  \brief     Mask and shift a register value to extract a bit filed value.
-  \param[in] field  Name of the register bit field.
-  \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
-  \return           Masked and shifted bit field value.
-*/
-#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
-
-/*@} end of group CMSIS_core_bitfield */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_core_base     Core Definitions
-  \brief      Definitions for base addresses, unions, and structures.
-  @{
- */
-
-/* Memory mapping of Core Hardware */
-#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address */
-#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address */
-#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address */
-#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address */
-
-#define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE      )   /*!< System control Register not in SCB */
-#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct */
-#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct */
-#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct */
-
-
-/*@} */
-
-
-
-/*******************************************************************************
- *                Hardware Abstraction Layer
-  Core Function Interface contains:
-  - Core NVIC Functions
-  - Core SysTick Functions
-  - Core Register Access Functions
- ******************************************************************************/
-/**
-  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
-*/
-
-
-
-/* ##########################   NVIC functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
-  \brief    Functions that manage interrupts and exceptions via the NVIC.
-  @{
- */
-
-#ifdef CMSIS_NVIC_VIRTUAL
-  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
-    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
-  #endif
-  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
-#else
-  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping
-  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping
-  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
-  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
-  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
-  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
-  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
-  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
-/*#define NVIC_GetActive              __NVIC_GetActive             not available for Cortex-M1 */
-  #define NVIC_SetPriority            __NVIC_SetPriority
-  #define NVIC_GetPriority            __NVIC_GetPriority
-  #define NVIC_SystemReset            __NVIC_SystemReset
-#endif /* CMSIS_NVIC_VIRTUAL */
-
-#ifdef CMSIS_VECTAB_VIRTUAL
-  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
-    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
-  #endif
-  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
-#else
-  #define NVIC_SetVector              __NVIC_SetVector
-  #define NVIC_GetVector              __NVIC_GetVector
-#endif  /* (CMSIS_VECTAB_VIRTUAL) */
-
-#define NVIC_USER_IRQ_OFFSET          16
-
-
-/* The following EXC_RETURN values are saved the LR on exception entry */
-#define EXC_RETURN_HANDLER         (0xFFFFFFF1UL)     /* return to Handler mode, uses MSP after return                               */
-#define EXC_RETURN_THREAD_MSP      (0xFFFFFFF9UL)     /* return to Thread mode, uses MSP after return                                */
-#define EXC_RETURN_THREAD_PSP      (0xFFFFFFFDUL)     /* return to Thread mode, uses PSP after return                                */
-
-
-/* Interrupt Priorities are WORD accessible only under Armv6-M                  */
-/* The following MACROS handle generation of the register offset and byte masks */
-#define _BIT_SHIFT(IRQn)         (  ((((uint32_t)(int32_t)(IRQn))         )      &  0x03UL) * 8UL)
-#define _SHP_IDX(IRQn)           ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >>    2UL)      )
-#define _IP_IDX(IRQn)            (   (((uint32_t)(int32_t)(IRQn))                >>    2UL)      )
-
-#define __NVIC_SetPriorityGrouping(X) (void)(X)
-#define __NVIC_GetPriorityGrouping()  (0U)
-
-/**
-  \brief   Enable Interrupt
-  \details Enables a device specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Enable status
-  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt is not enabled.
-  \return             1  Interrupt is enabled.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->ISER[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Disable Interrupt
-  \details Disables a device specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-    __DSB();
-    __ISB();
-  }
-}
-
-
-/**
-  \brief   Get Pending Interrupt
-  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt status is not pending.
-  \return             1  Interrupt status is pending.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Set Pending Interrupt
-  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Clear Pending Interrupt
-  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Set Interrupt Priority
-  \details Sets the priority of a device specific interrupt or a processor exception.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]      IRQn  Interrupt number.
-  \param [in]  priority  Priority to set.
-  \note    The priority cannot be set for every processor exception.
- */
-__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->IP[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
-       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
-  }
-  else
-  {
-    SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
-       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Priority
-  \details Reads the priority of a device specific interrupt or a processor exception.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]   IRQn  Interrupt number.
-  \return             Interrupt Priority.
-                      Value is aligned automatically to the implemented priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
-{
-
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
-  }
-  else
-  {
-    return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
-  }
-}
-
-
-/**
-  \brief   Encode Priority
-  \details Encodes the priority for an interrupt with the given priority group,
-           preemptive priority value, and subpriority value.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
-  \param [in]     PriorityGroup  Used priority group.
-  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
-  \param [in]       SubPriority  Subpriority value (starting from 0).
-  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
- */
-__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
-{
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
-  uint32_t PreemptPriorityBits;
-  uint32_t SubPriorityBits;
-
-  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
-  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
-  return (
-           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
-           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
-         );
-}
-
-
-/**
-  \brief   Decode Priority
-  \details Decodes an interrupt priority value with a given priority group to
-           preemptive priority value and subpriority value.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
-  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
-  \param [in]     PriorityGroup  Used priority group.
-  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
-  \param [out]     pSubPriority  Subpriority value (starting from 0).
- */
-__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
-{
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
-  uint32_t PreemptPriorityBits;
-  uint32_t SubPriorityBits;
-
-  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
-  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
-  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
-  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);
-}
-
-
-
-/**
-  \brief   Set Interrupt Vector
-  \details Sets an interrupt vector in SRAM based interrupt vector table.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-           Address 0 must be mapped to SRAM.
-  \param [in]   IRQn      Interrupt number
-  \param [in]   vector    Address of interrupt handler function
- */
-__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
-{
-  uint32_t *vectors = (uint32_t *)0x0U;
-  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
-}
-
-
-/**
-  \brief   Get Interrupt Vector
-  \details Reads an interrupt vector from interrupt vector table.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]   IRQn      Interrupt number.
-  \return                 Address of interrupt handler function
- */
-__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
-{
-  uint32_t *vectors = (uint32_t *)0x0U;
-  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
-}
-
-
-/**
-  \brief   System Reset
-  \details Initiates a system reset request to reset the MCU.
- */
-__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
-{
-  __DSB();                                                          /* Ensure all outstanding memory accesses included
-                                                                       buffered write are completed before reset */
-  SCB->AIRCR  = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
-                 SCB_AIRCR_SYSRESETREQ_Msk);
-  __DSB();                                                          /* Ensure completion of memory access */
-
-  for(;;)                                                           /* wait until reset */
-  {
-    __NOP();
-  }
-}
-
-/*@} end of CMSIS_Core_NVICFunctions */
-
-
-/* ##########################  FPU functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_FpuFunctions FPU Functions
-  \brief    Function that provides FPU type.
-  @{
- */
-
-/**
-  \brief   get FPU type
-  \details returns the FPU type
-  \returns
-   - \b  0: No FPU
-   - \b  1: Single precision FPU
-   - \b  2: Double + Single precision FPU
- */
-__STATIC_INLINE uint32_t SCB_GetFPUType(void)
-{
-    return 0U;           /* No FPU */
-}
-
-
-/*@} end of CMSIS_Core_FpuFunctions */
-
-
-
-/* ##################################    SysTick function  ############################################ */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
-  \brief    Functions that configure the System.
-  @{
- */
-
-#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
-
-/**
-  \brief   System Tick Configuration
-  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
-           Counter is in free running mode to generate periodic interrupts.
-  \param [in]  ticks  Number of ticks between two interrupts.
-  \return          0  Function succeeded.
-  \return          1  Function failed.
-  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
-           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
-           must contain a vendor-specific implementation of this function.
- */
-__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
-{
-  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
-  {
-    return (1UL);                                                   /* Reload value impossible */
-  }
-
-  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
-  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
-  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
-  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
-                   SysTick_CTRL_TICKINT_Msk   |
-                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
-  return (0UL);                                                     /* Function successful */
-}
-
-#endif
-
-/*@} end of CMSIS_Core_SysTickFunctions */
-
-
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM1_H_DEPENDANT */
-
-#endif /* __CMSIS_GENERIC */

csl/stm32f042k6t6/CMSIS/Include/mpu_armv7.h

@@ -1,270 +0,0 @@
-/******************************************************************************
- * @file     mpu_armv7.h
- * @brief    CMSIS MPU API for Armv7-M MPU
- * @version  V5.0.4
- * @date     10. January 2018
- ******************************************************************************/
-/*
- * Copyright (c) 2017-2018 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
- 
-#if   defined ( __ICCARM__ )
-  #pragma system_include         /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
-  #pragma clang system_header    /* treat file as system include file */
-#endif
- 
-#ifndef ARM_MPU_ARMV7_H
-#define ARM_MPU_ARMV7_H
-
-#define ARM_MPU_REGION_SIZE_32B      ((uint8_t)0x04U) ///!< MPU Region Size 32 Bytes
-#define ARM_MPU_REGION_SIZE_64B      ((uint8_t)0x05U) ///!< MPU Region Size 64 Bytes
-#define ARM_MPU_REGION_SIZE_128B     ((uint8_t)0x06U) ///!< MPU Region Size 128 Bytes
-#define ARM_MPU_REGION_SIZE_256B     ((uint8_t)0x07U) ///!< MPU Region Size 256 Bytes
-#define ARM_MPU_REGION_SIZE_512B     ((uint8_t)0x08U) ///!< MPU Region Size 512 Bytes
-#define ARM_MPU_REGION_SIZE_1KB      ((uint8_t)0x09U) ///!< MPU Region Size 1 KByte
-#define ARM_MPU_REGION_SIZE_2KB      ((uint8_t)0x0AU) ///!< MPU Region Size 2 KBytes
-#define ARM_MPU_REGION_SIZE_4KB      ((uint8_t)0x0BU) ///!< MPU Region Size 4 KBytes
-#define ARM_MPU_REGION_SIZE_8KB      ((uint8_t)0x0CU) ///!< MPU Region Size 8 KBytes
-#define ARM_MPU_REGION_SIZE_16KB     ((uint8_t)0x0DU) ///!< MPU Region Size 16 KBytes
-#define ARM_MPU_REGION_SIZE_32KB     ((uint8_t)0x0EU) ///!< MPU Region Size 32 KBytes
-#define ARM_MPU_REGION_SIZE_64KB     ((uint8_t)0x0FU) ///!< MPU Region Size 64 KBytes
-#define ARM_MPU_REGION_SIZE_128KB    ((uint8_t)0x10U) ///!< MPU Region Size 128 KBytes
-#define ARM_MPU_REGION_SIZE_256KB    ((uint8_t)0x11U) ///!< MPU Region Size 256 KBytes
-#define ARM_MPU_REGION_SIZE_512KB    ((uint8_t)0x12U) ///!< MPU Region Size 512 KBytes
-#define ARM_MPU_REGION_SIZE_1MB      ((uint8_t)0x13U) ///!< MPU Region Size 1 MByte
-#define ARM_MPU_REGION_SIZE_2MB      ((uint8_t)0x14U) ///!< MPU Region Size 2 MBytes
-#define ARM_MPU_REGION_SIZE_4MB      ((uint8_t)0x15U) ///!< MPU Region Size 4 MBytes
-#define ARM_MPU_REGION_SIZE_8MB      ((uint8_t)0x16U) ///!< MPU Region Size 8 MBytes
-#define ARM_MPU_REGION_SIZE_16MB     ((uint8_t)0x17U) ///!< MPU Region Size 16 MBytes
-#define ARM_MPU_REGION_SIZE_32MB     ((uint8_t)0x18U) ///!< MPU Region Size 32 MBytes
-#define ARM_MPU_REGION_SIZE_64MB     ((uint8_t)0x19U) ///!< MPU Region Size 64 MBytes
-#define ARM_MPU_REGION_SIZE_128MB    ((uint8_t)0x1AU) ///!< MPU Region Size 128 MBytes
-#define ARM_MPU_REGION_SIZE_256MB    ((uint8_t)0x1BU) ///!< MPU Region Size 256 MBytes
-#define ARM_MPU_REGION_SIZE_512MB    ((uint8_t)0x1CU) ///!< MPU Region Size 512 MBytes
-#define ARM_MPU_REGION_SIZE_1GB      ((uint8_t)0x1DU) ///!< MPU Region Size 1 GByte
-#define ARM_MPU_REGION_SIZE_2GB      ((uint8_t)0x1EU) ///!< MPU Region Size 2 GBytes
-#define ARM_MPU_REGION_SIZE_4GB      ((uint8_t)0x1FU) ///!< MPU Region Size 4 GBytes
-
-#define ARM_MPU_AP_NONE 0U ///!< MPU Access Permission no access
-#define ARM_MPU_AP_PRIV 1U ///!< MPU Access Permission privileged access only
-#define ARM_MPU_AP_URO  2U ///!< MPU Access Permission unprivileged access read-only
-#define ARM_MPU_AP_FULL 3U ///!< MPU Access Permission full access
-#define ARM_MPU_AP_PRO  5U ///!< MPU Access Permission privileged access read-only
-#define ARM_MPU_AP_RO   6U ///!< MPU Access Permission read-only access
-
-/** MPU Region Base Address Register Value
-*
-* \param Region The region to be configured, number 0 to 15.
-* \param BaseAddress The base address for the region.
-*/
-#define ARM_MPU_RBAR(Region, BaseAddress) \
-  (((BaseAddress) & MPU_RBAR_ADDR_Msk) |  \
-   ((Region) & MPU_RBAR_REGION_Msk)    |  \
-   (MPU_RBAR_VALID_Msk))
-
-/**
-* MPU Memory Access Attributes
-* 
-* \param TypeExtField      Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral.
-* \param IsShareable       Region is shareable between multiple bus masters.
-* \param IsCacheable       Region is cacheable, i.e. its value may be kept in cache.
-* \param IsBufferable      Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy.
-*/  
-#define ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable)   \
-  ((((TypeExtField ) << MPU_RASR_TEX_Pos) & MPU_RASR_TEX_Msk)                 | \
-   (((IsShareable ) << MPU_RASR_S_Pos) & MPU_RASR_S_Msk)                      | \
-   (((IsCacheable ) << MPU_RASR_C_Pos) & MPU_RASR_C_Msk)                      | \
-   (((IsBufferable ) << MPU_RASR_B_Pos) & MPU_RASR_B_Msk))
-
-/**
-* MPU Region Attribute and Size Register Value
-* 
-* \param DisableExec       Instruction access disable bit, 1= disable instruction fetches.
-* \param AccessPermission  Data access permissions, allows you to configure read/write access for User and Privileged mode.
-* \param AccessAttributes  Memory access attribution, see \ref ARM_MPU_ACCESS_.
-* \param SubRegionDisable  Sub-region disable field.
-* \param Size              Region size of the region to be configured, for example 4K, 8K.
-*/
-#define ARM_MPU_RASR_EX(DisableExec, AccessPermission, AccessAttributes, SubRegionDisable, Size)      \
-  ((((DisableExec ) << MPU_RASR_XN_Pos) & MPU_RASR_XN_Msk)                                          | \
-   (((AccessPermission) << MPU_RASR_AP_Pos) & MPU_RASR_AP_Msk)                                      | \
-   (((AccessAttributes) ) & (MPU_RASR_TEX_Msk | MPU_RASR_S_Msk | MPU_RASR_C_Msk | MPU_RASR_B_Msk)))
-  
-/**
-* MPU Region Attribute and Size Register Value
-* 
-* \param DisableExec       Instruction access disable bit, 1= disable instruction fetches.
-* \param AccessPermission  Data access permissions, allows you to configure read/write access for User and Privileged mode.
-* \param TypeExtField      Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral.
-* \param IsShareable       Region is shareable between multiple bus masters.
-* \param IsCacheable       Region is cacheable, i.e. its value may be kept in cache.
-* \param IsBufferable      Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy.
-* \param SubRegionDisable  Sub-region disable field.
-* \param Size              Region size of the region to be configured, for example 4K, 8K.
-*/                         
-#define ARM_MPU_RASR(DisableExec, AccessPermission, TypeExtField, IsShareable, IsCacheable, IsBufferable, SubRegionDisable, Size) \
-  ARM_MPU_RASR_EX(DisableExec, AccessPermission, ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable), SubRegionDisable, Size)
-
-/**
-* MPU Memory Access Attribute for strongly ordered memory.
-*  - TEX: 000b
-*  - Shareable
-*  - Non-cacheable
-*  - Non-bufferable
-*/ 
-#define ARM_MPU_ACCESS_ORDERED ARM_MPU_ACCESS_(0U, 1U, 0U, 0U)
-
-/**
-* MPU Memory Access Attribute for device memory.
-*  - TEX: 000b (if non-shareable) or 010b (if shareable)
-*  - Shareable or non-shareable
-*  - Non-cacheable
-*  - Bufferable (if shareable) or non-bufferable (if non-shareable)
-*
-* \param IsShareable Configures the device memory as shareable or non-shareable.
-*/ 
-#define ARM_MPU_ACCESS_DEVICE(IsShareable) ((IsShareable) ? ARM_MPU_ACCESS_(0U, 1U, 0U, 1U) : ARM_MPU_ACCESS_(2U, 0U, 0U, 0U))
-
-/**
-* MPU Memory Access Attribute for normal memory.
-*  - TEX: 1BBb (reflecting outer cacheability rules)
-*  - Shareable or non-shareable
-*  - Cacheable or non-cacheable (reflecting inner cacheability rules)
-*  - Bufferable or non-bufferable (reflecting inner cacheability rules)
-*
-* \param OuterCp Configures the outer cache policy.
-* \param InnerCp Configures the inner cache policy.
-* \param IsShareable Configures the memory as shareable or non-shareable.
-*/ 
-#define ARM_MPU_ACCESS_NORMAL(OuterCp, InnerCp, IsShareable) ARM_MPU_ACCESS_((4U | (OuterCp)), IsShareable, ((InnerCp) & 2U), ((InnerCp) & 1U))
-
-/**
-* MPU Memory Access Attribute non-cacheable policy.
-*/
-#define ARM_MPU_CACHEP_NOCACHE 0U
-
-/**
-* MPU Memory Access Attribute write-back, write and read allocate policy.
-*/
-#define ARM_MPU_CACHEP_WB_WRA 1U
-
-/**
-* MPU Memory Access Attribute write-through, no write allocate policy.
-*/
-#define ARM_MPU_CACHEP_WT_NWA 2U
-
-/**
-* MPU Memory Access Attribute write-back, no write allocate policy.
-*/
-#define ARM_MPU_CACHEP_WB_NWA 3U
-
-
-/**
-* Struct for a single MPU Region
-*/
-typedef struct {
-  uint32_t RBAR; //!< The region base address register value (RBAR)
-  uint32_t RASR; //!< The region attribute and size register value (RASR) \ref MPU_RASR
-} ARM_MPU_Region_t;
-    
-/** Enable the MPU.
-* \param MPU_Control Default access permissions for unconfigured regions.
-*/
-__STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)
-{
-  __DSB();
-  __ISB();
-  MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
-#ifdef SCB_SHCSR_MEMFAULTENA_Msk
-  SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
-#endif
-}
-
-/** Disable the MPU.
-*/
-__STATIC_INLINE void ARM_MPU_Disable(void)
-{
-  __DSB();
-  __ISB();
-#ifdef SCB_SHCSR_MEMFAULTENA_Msk
-  SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
-#endif
-  MPU->CTRL  &= ~MPU_CTRL_ENABLE_Msk;
-}
-
-/** Clear and disable the given MPU region.
-* \param rnr Region number to be cleared.
-*/
-__STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
-{
-  MPU->RNR = rnr;
-  MPU->RASR = 0U;
-}
-
-/** Configure an MPU region.
-* \param rbar Value for RBAR register.
-* \param rsar Value for RSAR register.
-*/   
-__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rbar, uint32_t rasr)
-{
-  MPU->RBAR = rbar;
-  MPU->RASR = rasr;
-}
-
-/** Configure the given MPU region.
-* \param rnr Region number to be configured.
-* \param rbar Value for RBAR register.
-* \param rsar Value for RSAR register.
-*/   
-__STATIC_INLINE void ARM_MPU_SetRegionEx(uint32_t rnr, uint32_t rbar, uint32_t rasr)
-{
-  MPU->RNR = rnr;
-  MPU->RBAR = rbar;
-  MPU->RASR = rasr;
-}
-
-/** Memcopy with strictly ordered memory access, e.g. for register targets.
-* \param dst Destination data is copied to.
-* \param src Source data is copied from.
-* \param len Amount of data words to be copied.
-*/
-__STATIC_INLINE void orderedCpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
-{
-  uint32_t i;
-  for (i = 0U; i < len; ++i) 
-  {
-    dst[i] = src[i];
-  }
-}
-
-/** Load the given number of MPU regions from a table.
-* \param table Pointer to the MPU configuration table.
-* \param cnt Amount of regions to be configured.
-*/
-__STATIC_INLINE void ARM_MPU_Load(ARM_MPU_Region_t const* table, uint32_t cnt) 
-{
-  const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;
-  while (cnt > MPU_TYPE_RALIASES) {
-    orderedCpy(&(MPU->RBAR), &(table->RBAR), MPU_TYPE_RALIASES*rowWordSize);
-    table += MPU_TYPE_RALIASES;
-    cnt -= MPU_TYPE_RALIASES;
-  }
-  orderedCpy(&(MPU->RBAR), &(table->RBAR), cnt*rowWordSize);
-}
-
-#endif

csl/stm32f042k6t6/CMSIS/Include/mpu_armv8.h

@@ -1,333 +0,0 @@
-/******************************************************************************
- * @file     mpu_armv8.h
- * @brief    CMSIS MPU API for Armv8-M MPU
- * @version  V5.0.4
- * @date     10. January 2018
- ******************************************************************************/
-/*
- * Copyright (c) 2017-2018 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#if   defined ( __ICCARM__ )
-  #pragma system_include         /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
-  #pragma clang system_header    /* treat file as system include file */
-#endif
-
-#ifndef ARM_MPU_ARMV8_H
-#define ARM_MPU_ARMV8_H
-
-/** \brief Attribute for device memory (outer only) */
-#define ARM_MPU_ATTR_DEVICE                           ( 0U )
-
-/** \brief Attribute for non-cacheable, normal memory */
-#define ARM_MPU_ATTR_NON_CACHEABLE                    ( 4U )
-
-/** \brief Attribute for normal memory (outer and inner)
-* \param NT Non-Transient: Set to 1 for non-transient data.
-* \param WB Write-Back: Set to 1 to use write-back update policy.
-* \param RA Read Allocation: Set to 1 to use cache allocation on read miss.
-* \param WA Write Allocation: Set to 1 to use cache allocation on write miss.
-*/
-#define ARM_MPU_ATTR_MEMORY_(NT, WB, RA, WA) \
-  (((NT & 1U) << 3U) | ((WB & 1U) << 2U) | ((RA & 1U) << 1U) | (WA & 1U))
-
-/** \brief Device memory type non Gathering, non Re-ordering, non Early Write Acknowledgement */
-#define ARM_MPU_ATTR_DEVICE_nGnRnE (0U)
-
-/** \brief Device memory type non Gathering, non Re-ordering, Early Write Acknowledgement */
-#define ARM_MPU_ATTR_DEVICE_nGnRE  (1U)
-
-/** \brief Device memory type non Gathering, Re-ordering, Early Write Acknowledgement */
-#define ARM_MPU_ATTR_DEVICE_nGRE   (2U)
-
-/** \brief Device memory type Gathering, Re-ordering, Early Write Acknowledgement */
-#define ARM_MPU_ATTR_DEVICE_GRE    (3U)
-
-/** \brief Memory Attribute
-* \param O Outer memory attributes
-* \param I O == ARM_MPU_ATTR_DEVICE: Device memory attributes, else: Inner memory attributes
-*/
-#define ARM_MPU_ATTR(O, I) (((O & 0xFU) << 4U) | (((O & 0xFU) != 0U) ? (I & 0xFU) : ((I & 0x3U) << 2U)))
-
-/** \brief Normal memory non-shareable  */
-#define ARM_MPU_SH_NON   (0U)
-
-/** \brief Normal memory outer shareable  */
-#define ARM_MPU_SH_OUTER (2U)
-
-/** \brief Normal memory inner shareable  */
-#define ARM_MPU_SH_INNER (3U)
-
-/** \brief Memory access permissions
-* \param RO Read-Only: Set to 1 for read-only memory.
-* \param NP Non-Privileged: Set to 1 for non-privileged memory.
-*/
-#define ARM_MPU_AP_(RO, NP) (((RO & 1U) << 1U) | (NP & 1U))
-
-/** \brief Region Base Address Register value
-* \param BASE The base address bits [31:5] of a memory region. The value is zero extended. Effective address gets 32 byte aligned.
-* \param SH Defines the Shareability domain for this memory region.
-* \param RO Read-Only: Set to 1 for a read-only memory region.
-* \param NP Non-Privileged: Set to 1 for a non-privileged memory region.
-* \oaram XN eXecute Never: Set to 1 for a non-executable memory region.
-*/
-#define ARM_MPU_RBAR(BASE, SH, RO, NP, XN) \
-  ((BASE & MPU_RBAR_BASE_Msk) | \
-  ((SH << MPU_RBAR_SH_Pos) & MPU_RBAR_SH_Msk) | \
-  ((ARM_MPU_AP_(RO, NP) << MPU_RBAR_AP_Pos) & MPU_RBAR_AP_Msk) | \
-  ((XN << MPU_RBAR_XN_Pos) & MPU_RBAR_XN_Msk))
-
-/** \brief Region Limit Address Register value
-* \param LIMIT The limit address bits [31:5] for this memory region. The value is one extended.
-* \param IDX The attribute index to be associated with this memory region.
-*/
-#define ARM_MPU_RLAR(LIMIT, IDX) \
-  ((LIMIT & MPU_RLAR_LIMIT_Msk) | \
-  ((IDX << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \
-  (MPU_RLAR_EN_Msk))
-
-/**
-* Struct for a single MPU Region
-*/
-typedef struct {
-  uint32_t RBAR;                   /*!< Region Base Address Register value */
-  uint32_t RLAR;                   /*!< Region Limit Address Register value */
-} ARM_MPU_Region_t;
-    
-/** Enable the MPU.
-* \param MPU_Control Default access permissions for unconfigured regions.
-*/
-__STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)
-{
-  __DSB();
-  __ISB();
-  MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
-#ifdef SCB_SHCSR_MEMFAULTENA_Msk
-  SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
-#endif
-}
-
-/** Disable the MPU.
-*/
-__STATIC_INLINE void ARM_MPU_Disable(void)
-{
-  __DSB();
-  __ISB();
-#ifdef SCB_SHCSR_MEMFAULTENA_Msk
-  SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
-#endif
-  MPU->CTRL  &= ~MPU_CTRL_ENABLE_Msk;
-}
-
-#ifdef MPU_NS
-/** Enable the Non-secure MPU.
-* \param MPU_Control Default access permissions for unconfigured regions.
-*/
-__STATIC_INLINE void ARM_MPU_Enable_NS(uint32_t MPU_Control)
-{
-  __DSB();
-  __ISB();
-  MPU_NS->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
-#ifdef SCB_SHCSR_MEMFAULTENA_Msk
-  SCB_NS->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
-#endif
-}
-
-/** Disable the Non-secure MPU.
-*/
-__STATIC_INLINE void ARM_MPU_Disable_NS(void)
-{
-  __DSB();
-  __ISB();
-#ifdef SCB_SHCSR_MEMFAULTENA_Msk
-  SCB_NS->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
-#endif
-  MPU_NS->CTRL  &= ~MPU_CTRL_ENABLE_Msk;
-}
-#endif
-
-/** Set the memory attribute encoding to the given MPU.
-* \param mpu Pointer to the MPU to be configured.
-* \param idx The attribute index to be set [0-7]
-* \param attr The attribute value to be set.
-*/
-__STATIC_INLINE void ARM_MPU_SetMemAttrEx(MPU_Type* mpu, uint8_t idx, uint8_t attr)
-{
-  const uint8_t reg = idx / 4U;
-  const uint32_t pos = ((idx % 4U) * 8U);
-  const uint32_t mask = 0xFFU << pos;
-  
-  if (reg >= (sizeof(mpu->MAIR) / sizeof(mpu->MAIR[0]))) {
-    return; // invalid index
-  }
-  
-  mpu->MAIR[reg] = ((mpu->MAIR[reg] & ~mask) | ((attr << pos) & mask));
-}
-
-/** Set the memory attribute encoding.
-* \param idx The attribute index to be set [0-7]
-* \param attr The attribute value to be set.
-*/
-__STATIC_INLINE void ARM_MPU_SetMemAttr(uint8_t idx, uint8_t attr)
-{
-  ARM_MPU_SetMemAttrEx(MPU, idx, attr);
-}
-
-#ifdef MPU_NS
-/** Set the memory attribute encoding to the Non-secure MPU.
-* \param idx The attribute index to be set [0-7]
-* \param attr The attribute value to be set.
-*/
-__STATIC_INLINE void ARM_MPU_SetMemAttr_NS(uint8_t idx, uint8_t attr)
-{
-  ARM_MPU_SetMemAttrEx(MPU_NS, idx, attr);
-}
-#endif
-
-/** Clear and disable the given MPU region of the given MPU.
-* \param mpu Pointer to MPU to be used.
-* \param rnr Region number to be cleared.
-*/
-__STATIC_INLINE void ARM_MPU_ClrRegionEx(MPU_Type* mpu, uint32_t rnr)
-{
-  mpu->RNR = rnr;
-  mpu->RLAR = 0U;
-}
-
-/** Clear and disable the given MPU region.
-* \param rnr Region number to be cleared.
-*/
-__STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
-{
-  ARM_MPU_ClrRegionEx(MPU, rnr);
-}
-
-#ifdef MPU_NS
-/** Clear and disable the given Non-secure MPU region.
-* \param rnr Region number to be cleared.
-*/
-__STATIC_INLINE void ARM_MPU_ClrRegion_NS(uint32_t rnr)
-{  
-  ARM_MPU_ClrRegionEx(MPU_NS, rnr);
-}
-#endif
-
-/** Configure the given MPU region of the given MPU.
-* \param mpu Pointer to MPU to be used.
-* \param rnr Region number to be configured.
-* \param rbar Value for RBAR register.
-* \param rlar Value for RLAR register.
-*/   
-__STATIC_INLINE void ARM_MPU_SetRegionEx(MPU_Type* mpu, uint32_t rnr, uint32_t rbar, uint32_t rlar)
-{
-  mpu->RNR = rnr;
-  mpu->RBAR = rbar;
-  mpu->RLAR = rlar;
-}
-
-/** Configure the given MPU region.
-* \param rnr Region number to be configured.
-* \param rbar Value for RBAR register.
-* \param rlar Value for RLAR register.
-*/   
-__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rnr, uint32_t rbar, uint32_t rlar)
-{
-  ARM_MPU_SetRegionEx(MPU, rnr, rbar, rlar);
-}
-
-#ifdef MPU_NS
-/** Configure the given Non-secure MPU region.
-* \param rnr Region number to be configured.
-* \param rbar Value for RBAR register.
-* \param rlar Value for RLAR register.
-*/   
-__STATIC_INLINE void ARM_MPU_SetRegion_NS(uint32_t rnr, uint32_t rbar, uint32_t rlar)
-{
-  ARM_MPU_SetRegionEx(MPU_NS, rnr, rbar, rlar);  
-}
-#endif
-
-/** Memcopy with strictly ordered memory access, e.g. for register targets.
-* \param dst Destination data is copied to.
-* \param src Source data is copied from.
-* \param len Amount of data words to be copied.
-*/
-__STATIC_INLINE void orderedCpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
-{
-  uint32_t i;
-  for (i = 0U; i < len; ++i) 
-  {
-    dst[i] = src[i];
-  }
-}
-
-/** Load the given number of MPU regions from a table to the given MPU.
-* \param mpu Pointer to the MPU registers to be used.
-* \param rnr First region number to be configured.
-* \param table Pointer to the MPU configuration table.
-* \param cnt Amount of regions to be configured.
-*/
-__STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) 
-{
-  const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;
-  if (cnt == 1U) {
-    mpu->RNR = rnr;
-    orderedCpy(&(mpu->RBAR), &(table->RBAR), rowWordSize);
-  } else {
-    uint32_t rnrBase   = rnr & ~(MPU_TYPE_RALIASES-1U);
-    uint32_t rnrOffset = rnr % MPU_TYPE_RALIASES;
-    
-    mpu->RNR = rnrBase;
-    while ((rnrOffset + cnt) > MPU_TYPE_RALIASES) {
-      uint32_t c = MPU_TYPE_RALIASES - rnrOffset;
-      orderedCpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), c*rowWordSize);
-      table += c;
-      cnt -= c;
-      rnrOffset = 0U;
-      rnrBase += MPU_TYPE_RALIASES;
-      mpu->RNR = rnrBase;
-    }
-    
-    orderedCpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), cnt*rowWordSize);
-  }
-}
-
-/** Load the given number of MPU regions from a table.
-* \param rnr First region number to be configured.
-* \param table Pointer to the MPU configuration table.
-* \param cnt Amount of regions to be configured.
-*/
-__STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) 
-{
-  ARM_MPU_LoadEx(MPU, rnr, table, cnt);
-}
-
-#ifdef MPU_NS
-/** Load the given number of MPU regions from a table to the Non-secure MPU.
-* \param rnr First region number to be configured.
-* \param table Pointer to the MPU configuration table.
-* \param cnt Amount of regions to be configured.
-*/
-__STATIC_INLINE void ARM_MPU_Load_NS(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) 
-{
-  ARM_MPU_LoadEx(MPU_NS, rnr, table, cnt);
-}
-#endif
-
-#endif
-

csl/stm32f042k6t6/CMSIS/Include/tz_context.h

@@ -1,70 +0,0 @@
-/******************************************************************************
- * @file     tz_context.h
- * @brief    Context Management for Armv8-M TrustZone
- * @version  V1.0.1
- * @date     10. January 2018
- ******************************************************************************/
-/*
- * Copyright (c) 2017-2018 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#if   defined ( __ICCARM__ )
-  #pragma system_include         /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
-  #pragma clang system_header   /* treat file as system include file */
-#endif
-
-#ifndef TZ_CONTEXT_H
-#define TZ_CONTEXT_H
- 
-#include <stdint.h>
- 
-#ifndef TZ_MODULEID_T
-#define TZ_MODULEID_T
-/// \details Data type that identifies secure software modules called by a process.
-typedef uint32_t TZ_ModuleId_t;
-#endif
- 
-/// \details TZ Memory ID identifies an allocated memory slot.
-typedef uint32_t TZ_MemoryId_t;
-  
-/// Initialize secure context memory system
-/// \return execution status (1: success, 0: error)
-uint32_t TZ_InitContextSystem_S (void);
- 
-/// Allocate context memory for calling secure software modules in TrustZone
-/// \param[in]  module   identifies software modules called from non-secure mode
-/// \return value != 0 id TrustZone memory slot identifier
-/// \return value 0    no memory available or internal error
-TZ_MemoryId_t TZ_AllocModuleContext_S (TZ_ModuleId_t module);
- 
-/// Free context memory that was previously allocated with \ref TZ_AllocModuleContext_S
-/// \param[in]  id  TrustZone memory slot identifier
-/// \return execution status (1: success, 0: error)
-uint32_t TZ_FreeModuleContext_S (TZ_MemoryId_t id);
- 
-/// Load secure context (called on RTOS thread context switch)
-/// \param[in]  id  TrustZone memory slot identifier
-/// \return execution status (1: success, 0: error)
-uint32_t TZ_LoadContext_S (TZ_MemoryId_t id);
- 
-/// Store secure context (called on RTOS thread context switch)
-/// \param[in]  id  TrustZone memory slot identifier
-/// \return execution status (1: success, 0: error)
-uint32_t TZ_StoreContext_S (TZ_MemoryId_t id);
- 
-#endif  // TZ_CONTEXT_H

csl/stm32f042k6t6/HardwareDescription/hardwareDescription.h

@@ -1,51 +0,0 @@
-/**
-**************************************************************************************************
-* @file		hardwareDescription.h
-* @author		Kerem Yollu & Edwin Koch
-* @date		19.12.2021
-* @version	1.0
-************************************************************************************************** 
-* @brief		This file contains all hardware specific definitions for STM32F042K6
-* 
-* **Detailed Description :**
-* This Header file contains all the registers and their bit manipulation options. 
-* All the extra Tables created here are to somplifly the main codes readability 
-*
-* @todo 
-*	- 19.12.2021 : implement until it runs :) 
-**************************************************************************************************
-*/
-
-#ifndef _hardwareDescription_H_
-#define _hardwareDescription_H_
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include "stm32f042x6.h"
-#include <stdint.h>
-
-#define PACKAGE_LQFP32 1
-
-#define MAX_I2S_CHANNEL_COUNT 2
-#define MAX_CAN_CHANNEL_COUNT 1
-
-
-
-/*! 
- * Enum for awailable clok sources RM Page: 95 
- * */
-typedef enum { 
-	CLK_HSI,	/*!< High speed internal */ 
-	CLK_HSE,	/*!< High speed external */
-	CLK_LSI,	/*!< Low speed internal */
-	CLK_LSE		/*!< Low speed External */
-}clkSources_t;
-
- 
-#ifdef __cplusplus
-}
-#endif
-
-#endif // _hardwareDescription_H_

csl/stm32f042k6t6/HardwareDescription/hwd_i2c.h

@@ -1,56 +0,0 @@
-/**
-**************************************************************************************************
-* @file		hwd_i2c.h		
-* @author	Kerem Yollu & Edwin Koch
-* @date		26.02.2023
-* @version	1.0
-************************************************************************************************** 
-* @brief
-* 
-* **Detailed Description :**
-*	
-**************************************************************************************************
-*/
-
-#ifndef _HWD_I2C_H_
-#define _HWD_I2C_H_
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include "hardwareDescription.h"
-
-#define MAX_I2C_CHANNEL_COUNT 1
-
-/*! Awailable I2C Channels Hadware dependent Register independent */
-typedef enum{
-	I2C_CH_1
-}i2cCh_t;
-
-
-/*! I2C Channel Base adress  Hadware dependent Register dependent*/
-static const uint32_t i2cBase_Addr_List[MAX_I2C_CHANNEL_COUNT] =  {
-	I2C1_BASE
-};
-
-/*! RCC Bus number index list connected to the I2C */
-static const uint8_t i2cBus_No[MAX_I2C_CHANNEL_COUNT] = {
-	1  /*!< I2C1 is connected to bus 1 */
-};
-
-/*! RCC I2C clock enable bit position for the given register*/
-static const uint8_t i2cBus_En_bitPos[MAX_I2C_CHANNEL_COUNT] = {
-	RCC_APB1ENR_I2C1EN_Pos
-};
-
-/*! RCC I2C reset bit position for the given register*/
-static const uint8_t i2cBus_Rst_bitPos[MAX_I2C_CHANNEL_COUNT] = {
-	RCC_APB1RSTR_I2C1RST_Pos
-};
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif // _HWD_I2C_H_

csl/stm32f042k6t6/HardwareDescription/hwd_interrupt.h

@@ -1,144 +0,0 @@
-/**
-**************************************************************************************************
-* @file		hwd_interrupt.h		
-* @author	Kerem Yollu & Edwin Koch
-* @date		26.02.2023
-* @version	1.0
-************************************************************************************************** 
-* @brief
-* 
-* **Detailed Description :**
-*	
-**************************************************************************************************
-*/
-
-#ifndef _HWD_INTERRUPT_H_
-#define _HWD_INTERRUPT_H_
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include "interrupt.h"
-#include "hardwareDescription.h"
-
-/*! interrupt types. These act as indexes for the */
-
-
-
-typedef enum {
-	PINX0_RISING_EDGE,
-	PINX0_FALLING_EDGE,
-	PINX0_BOTH_EDGE,
-	PINX1_RISING_EDGE,
-	PINX1_FALLING_EDGE,
-	PINX1_BOTH_EDGE,
-	PINX2_RISING_EDGE,
-	PINX2_FALLING_EDGE,
-	PINX2_BOTH_EDGE,
-	PINX3_RISING_EDGE,
-	PINX3_FALLING_EDGE,
-	PINX3_BOTH_EDGE,
-	PINX4_RISING_EDGE,
-	PINX4_FALLING_EDGE,
-	PINX4_BOTH_EDGE,
-	PINX5_RISING_EDGE,
-	PINX5_FALLING_EDGE,
-	PINX5_BOTH_EDGE,
-	PINX6_RISING_EDGE,
-	PINX6_FALLING_EDGE,
-	PINX6_BOTH_EDGE,
-	PINX7_RISING_EDGE,
-	PINX7_FALLING_EDGE,
-	PINX7_BOTH_EDGE,
-	PINX8_RISING_EDGE,
-	PINX8_FALLING_EDGE,
-	PINX8_BOTH_EDGE,
-	PINX9_RISING_EDGE,
-	PINX9_FALLING_EDGE,
-	PINX9_BOTH_EDGE,
-	PINX10_RISING_EDGE,
-	PINX10_FALLING_EDGE,
-	PINX10_BOTH_EDGE,
-	PINX11_RISING_EDGE,
-	PINX11_FALLING_EDGE,
-	PINX11_BOTH_EDGE,
-	PINX12_RISING_EDGE,
-	PINX12_FALLING_EDGE,
-	PINX12_BOTH_EDGE,
-	PINX13_RISING_EDGE,
-	PINX13_FALLING_EDGE,
-	PINX13_BOTH_EDGE,
-	PINX14_RISING_EDGE,
-	PINX14_FALLING_EDGE,
-	PINX14_BOTH_EDGE,
-	PINX15_RISING_EDGE,
-	PINX15_FALLING_EDGE,
-	PINX15_BOTH_EDGE,
-	TIM1_BREAK,
-	TIM1_UPDATE,
-	TIM1_TRIGGER,
-	TIM1_COMMUNICATION,
-	TIM1_COUNTERCOMPARE_1,
-	TIM1_COUNTERCOMPARE_2,
-	TIM1_COUNTERCOMPARE_3,
-	TIM1_COUNTERCOMPARE_4,
-	TIM2_UPDATE,
-	TIM2_COUNTERCOMPARE_1,
-	TIM2_COUNTERCOMPARE_2,
-	TIM2_COUNTERCOMPARE_3,
-	TIM2_COUNTERCOMPARE_4,
-	TIM2_TRIGGER,
-	TIM2_CAPTURECOMPARE_1,
-	TIM2_CAPTURECOMPARE_2,
-	TIM2_CAPTURECOMPARE_3,
-  	TIM2_CAPTURECOMAPRE_4,
-	TIM3_UPDATE,
-	TIM3_COUNTERCOMPARE_1,
-	TIM3_COUNTERCOMPARE_2,
-	TIM3_COUNTERCOMPARE_3,
-	TIM3_COUNTERCOMPARE_4,
-	TIM3_TRIGGER,
-	TIM3_CAPTURECOMPARE_1,
-	TIM3_CAPTURECOMPARE_2,
-	TIM3_CAPTURECOMPARE_3,
-  	TIM3_CAPTURECOMAPRE_4,
-	TIM14_CAPTURECOMPARE_1_OVERCAPTURE,
-	TIM14_CAPTURECOMPARE_1,
-	TIM14_UPDATE,
-	TIM16_CAPTURECOMPARE_1_OVERCAPTURE,
-	TIM16_BREAK,
-	TIM16_COMMUNICATION,
-	TIM16_CAPTURECOMPARE_1,
-	TIM16_UPDATE,
-	TIM17_CAPTURECOMPARE_1_OVERCAPTURE,
-	TIM17_BREAK,
-	TIM17_COMMUNICATION,
-	TIM17_CAPTURECOMPARE_1,
-	TIM17_UPDATE,
-	SPI1_TX_FIFO_EMPTY,
-	SPI1_TX_FIFO_1_4,
-	SPI1_TX_FIFO_1_2,
-	SPI1_TX_FIFO_FULL,
-	SPI1_RX_FIFO_EMPTY,
-	SPI1_RX_FIFO_1_4,
-	SPI1_RX_FIFO_1_2,
-	SPI1_RX_FIFO_FULL,
-	SPI1_FRAME_FORMAT_ERROR,
-	SPI1_BUSY,
-	SPI1_OVERRUN,
-	SPI1_MODE_FAULT,
-	SPI1_CRC_ERROR,
-	SPI1_UNDERRUN,
-	SPI1_CHANNEL_SIDE,
-	SPI1_TX_BUFFER_EMPTY,
-	SPI1_RX_BUFFER_NOT_EMPTY,
-	intTypeEND
-}intrType_t;
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif // _HWD_INTERRUPT_H_

csl/stm32f042k6t6/HardwareDescription/hwd_pin.h

@@ -1,138 +0,0 @@
-/**
-**************************************************************************************************
-* @file		hwd_pin.h		
-* @author	Kerem Yollu & Edwin Koch
-* @date		26.02.2023
-* @version	1.0
-************************************************************************************************** 
-* @brief
-* 
-* **Detailed Description :**
-*	
-**************************************************************************************************
-*/
-
-#ifndef _HWD_PIN_H_
-#define _HWD_PIN_H_
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include "hardwareDescription.h"
-
-#define MAX_N_PORTS_COUNT	3
-#define MAX_PORT_PINS_COUNT	16
-#define MAX_N_PIN_ALT_FUNC	8
-
-#define MAX_PORT_A_PIN_NO	15
-#define MAX_PORT_B_PIN_NO	15
-#define MAX_PORT_F_PIN_NO	1
-
-/*! Pin number typedef enum. It contains all the available pins */
-typedef enum 
-{
-//  NAME  = BASE ADDR   | PORT | PIN NO
-	pinA0 =  0x00 | 0,	/*!< Port: A Pin: 0  ->  Port A Mask | Pin Mask */
-	pinA1 =  0x00 | 1,	/*!< Port: A Pin: 1  ->  Port A Mask | Pin Mask */
-	pinA2 =  0x00 | 2,	/*!< Port: A Pin: 2  ->  Port A Mask | Pin Mask */
-	pinA3 =  0x00 | 3,	/*!< Port: A Pin: 3  ->  Port A Mask | Pin Mask */
-	pinA4 =  0x00 | 4,	/*!< Port: A Pin: 4  ->  Port A Mask | Pin Mask */
-	pinA5 =  0x00 | 5,	/*!< Port: A Pin: 5  ->  Port A Mask | Pin Mask */
-	pinA6 =  0x00 | 6,	/*!< Port: A Pin: 6  ->  Port A Mask | Pin Mask */
-	pinA7 =  0x00 | 7,	/*!< Port: A Pin: 7  ->  Port A Mask | Pin Mask */
-	pinA8 =  0x00 | 8,	/*!< Port: A Pin: 8  ->  Port A Mask | Pin Mask */
-	pinA9 =  0x00 | 9,	/*!< Port: A Pin: 9  ->  Port A Mask | Pin Mask */
-	pinA10 = 0x00 | 10,	/*!< Port: A Pin: 10 ->  Port A Mask | Pin Mask */
-	pinA11 = 0x00 | 11,	/*!< Port: A Pin: 11 ->  Port A Mask | Pin Mask */
-	pinA12 = 0x00 | 12,	/*!< Port: A Pin: 12 ->  Port A Mask | Pin Mask */
-	pinA13 = 0x00 | 13,	/*!< Port: A Pin: 13 ->  Port A Mask | Pin Mask */
-	pinA14 = 0x00 | 14,	/*!< Port: A Pin: 14 ->  Port A Mask | Pin Mask */
-	pinA15 = 0x00 | 15,	/*!< Port: A Pin: 15 ->  Port A Mask | Pin Mask */
-
-	pinB0 =  0x10 | 0,	/*!< Port: B Pin: 0  ->  Port B Mask | Pin Mask */
-	pinB1 =  0x10 | 1,	/*!< Port: B Pin: 1  ->  Port B Mask | Pin Mask */
-	pinB3 =  0x10 | 3,	/*!< Port: B Pin: 3  ->  Port B Mask | Pin Mask */
-	pinB4 =  0x10 | 4,	/*!< Port: B Pin: 4  ->  Port B Mask | Pin Mask */
-	pinB5 =  0x10 | 5,	/*!< Port: B Pin: 5  ->  Port B Mask | Pin Mask */
-	pinB6 =  0x10 | 6,	/*!< Port: B Pin: 6  ->  Port B Mask | Pin Mask */
-	pinB7 =  0x10 | 7,	/*!< Port: B Pin: 7  ->  Port B Mask | Pin Mask */
-	pinB8 =  0x10 | 8,	/*!< Port: B Pin: 8  ->  Port B Mask | Pin Mask */
-             
-	pinF0 =  0x20 | 0,	/*!< Port: F Pin: 0  ->  Port F Mask | Pin Mask */
-	pinF1 =  0x20 | 1	/*!< Port: F Pin: 1  ->  Port F Mask | Pin Mask */
-}pinNo_t;    
-
-/*!List of all possible port base addresses. This is used for the funcionality of of pin.h*/
-static const  uint32_t portBase_Addr_List[MAX_N_PORTS_COUNT] = {
-	GPIOA_BASE,	//!< Base address Port A 
-	GPIOB_BASE, //!< Base address Port B
-	GPIOF_BASE	//!< Base address Port F
-};
-
-/*! This is a bitmap list of all possible alternative functions for each pin.
- *	1means that there is an alternative function available and 0 for none. Tis is used
- *	for the functionality in pin.h
- *	*/             
-static const uint8_t altFunc_List[MAX_N_PORTS_COUNT][MAX_PORT_PINS_COUNT] = {
-	{	// PORT A
-		0b01110000, //PA0 
-		0b11110000, //PA1
-		0b01110000, //PA2
-		0b01110000, //PA3	
-		0b11111000, //PA4	
-		0b11110000, //PA5 
-		0b11110110, //PA6
-		0b11111110, //PA7
-		0b11111000, //PA8
-		0b01111100, //PA9
-		0b11111000, //PA10
-		0b11111100, //PA11
-		0b11111100, //PA12
-		0b11100000, //PA13
-		0b11000000, //PA14
-		0b11110100	//PA15
-	},
-	{	// PORT B
-		0b11110000, //PB0  
-		0b11110000, //PB1  
-		0b00010000, //PB2  
-		0b11110000, //PB3  
-		0b11110100, //PB4  
-		0b11110000, //PB5  
-		0b11110000, //PB6  
-		0b11110000, //PB7  
-		0b11111000, //PB8  
-		0b11111100, //PB9  
-		0b11110100, //PB10 
-		0b11100000, //PB11 
-		0b11100000, //PB12
-		0b10100100, //PB13
-		0b10100100, //PB14
-		0b10100000	//PB15
-	},
-	{	// PORT F
-		0b11000000, //PF0 
-		0b01000000, //PF1 
-		0b00000000, //N.A 
-		0b00000000, //N.A 
-		0b00000000, //N.A 
-		0b00000000, //N.A 
-		0b00000000, //N.A 
-		0b00000000, //N.A 
-		0b00000000, //N.A 
-		0b00000000, //N.A 
-		0b00000000, //N.A
-		0b00000000, //N.A
-		0b00000000, //N.A
-		0b00000000, //N.A
-		0b00000000, //N.A
-		0b00000000	//N.A
-	}	
-};
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif // _HWD_PIN_H_

csl/stm32f042k6t6/HardwareDescription/hwd_spi.h

@@ -1,70 +0,0 @@
-/**
-**************************************************************************************************
-* @file		hwd_spi.h		
-* @author	Kerem Yollu & Edwin Koch
-* @date		26.02.2023
-* @version	1.0
-************************************************************************************************** 
-* @brief
-* 
-* **Detailed Description :**
-*	
-**************************************************************************************************
-*/
-
-#ifndef _HWD_SPI_H_
-#define _HWD_SPI_H_
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include "hardwareDescription.h"
-
-#define MAX_SPI_CHANNEL_COUNT 2
-
-/*!
- *	RCC Bus number index list connected to the SPI 
- * */
-static const uint8_t spiBus_No[MAX_SPI_CHANNEL_COUNT] = {
-	2, /*!< SPI 1 is connected to bus 2 */
-	1  /*!< SPI 2 is connected to bus 1 */
-};
-
-/*!
- *	RCC SPI clock enable bit position for the given register
- * 
- */
-static const uint8_t spiBus_En_bitPos[MAX_SPI_CHANNEL_COUNT] = {
-	RCC_APB2ENR_SPI1EN_Pos,
-	RCC_APB1ENR_SPI2EN_Pos
-};
-
-/*!
- *	RCC SPI Reset Bit Position list
- * */
-static const uint8_t spiBus_Rst_bitPos[MAX_SPI_CHANNEL_COUNT] = {
-	RCC_APB2RSTR_SPI1RST_Pos,
-	RCC_APB1RSTR_SPI2RST_Pos
-};
-
-/**
- * Enumof available spi hardware channels
- */
-typedef enum{
-	SPI_CH_1,
-	SPI_CH_2
-} spiCH_t;
-/**
- * SPI base address list
- */
-static const uint32_t spiBase_Addr_List[MAX_SPI_CHANNEL_COUNT] =  {
-	SPI1_BASE,
-	SPI2_BASE
-};
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif // _HWD_SPI_H_

csl/stm32f042k6t6/HardwareDescription/hwd_timer.h

@@ -1,105 +0,0 @@
-/**
-**************************************************************************************************
-* @file		hwd_timer.h		
-* @author	Kerem Yollu & Edwin Koch
-* @date		26.02.2023
-* @version	1.0
-************************************************************************************************** 
-* @brief
-* 
-* **Detailed Description :**
-*	
-**************************************************************************************************
-*/
-
-#ifndef _HWD_TIMER_H_
-#define _HWD_TIMER_H_
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include "hardwareDescription.h"
-
-#define MAX_TIMER_CHANNEL_COUNT 6
-
-/*!
- * Enum for awailable timer DS Page: 12 (block diagaram) The order of the enums is very important
- * and should not be changed as it is used ofr table indexing
- * */
-typedef enum {
-	timer_1,	/*!< Advanced control 16-bit timer with PWM capability RM Page: 320 */
-	timer_2,	/*!< General purpose 32-bit timer RM Page: 393 */
-	timer_3,	/*!< General purpose 16-bit timer RM Page: 393 */
-	timer_14,	/*!< General purpose 16-bit timer RM Page: 459 */
-	timer_16,	/*!< General purpose 16-bit timer RM Page: 480 */
-	timer_17	/*!< General purpose 16-bit timer RM Page: 480 */
-} timerNo_t;
-
-
-/*!
- *	Timer base addresslist of all available timers
- * */
-static const uint32_t timerBase_Addr_List[MAX_TIMER_CHANNEL_COUNT] = {
-	TIM1_BASE,	/*!< Timer 1 Base Address */ 
-	TIM2_BASE,	/*!< Timer 2 Base Address */
-	TIM3_BASE,	/*!< Timer 3 Base Address */
-	TIM14_BASE, /*!< Timer 14 Base Address */
-	TIM16_BASE, /*!< Timer 16 Base Address */
-	TIM17_BASE	/*!< Timer 17 Base Address */
-};
-
-/*!
- *	RCC clock enable bit position for the given register
- * */
-static const uint8_t timerBus_En_bitPos[MAX_TIMER_CHANNEL_COUNT] = {
-	RCC_APB2ENR_TIM1EN_Pos,
-	RCC_APB1ENR_TIM2EN_Pos,
-	RCC_APB1ENR_TIM3EN_Pos,
-	RCC_APB1ENR_TIM14EN_Pos,
-	RCC_APB2ENR_TIM16EN_Pos,
-	RCC_APB2ENR_TIM17EN_Pos
-};
-
-/*!
- *	RCC timer Reset Bit Position list
- * */
-static const uint8_t timerBus_Rst_bitPos[MAX_TIMER_CHANNEL_COUNT] = {
-	RCC_APB2RSTR_TIM1RST_Pos,
-	RCC_APB1RSTR_TIM2RST_Pos,
-	RCC_APB1RSTR_TIM3RST_Pos,
-	RCC_APB1RSTR_TIM14RST_Pos,
-	RCC_APB2RSTR_TIM16RST_Pos,
-	RCC_APB2RSTR_TIM17RST_Pos
-};
-
-/*!
- *	RCC Bus number index list connected to the timer 
- * */
-static const uint8_t timerBus_No[MAX_TIMER_CHANNEL_COUNT] = {
-	2, /*!< timer 1 is connected to bus 2 */
-	1, /*!< timer 2 is connected to bus 1 */
-	1, /*!< timer 3 is connected to bus 1 */
-	1, /*!< timer 14 is connected to bus 1 */
-	2, /*!< timer 16 is connected to bus 2 */
-	2  /*!< timer 17 is connected to bus 2 */
-};
-
-/*! 
- * Timer Prescaler resolution list TO BE DELETED IF NOT NEEDED
- * */
-static const  uint32_t timerRes_Prescaler[MAX_TIMER_CHANNEL_COUNT] = {
-	0xFFFF, /*!< Timer 1 Prescaler Max Value */ 
-	0xFFFF, /*!< Timer 2 Prescaler Max Value */ 
-	0xFFFF, /*!< Timer 3 Prescaler Max Value */ 
-	0xFFFF, /*!< Timer 14 Prescaler Max Value */ 
-	0xFFFF, /*!< Timer 16 Prescaler Max Value */ 
-	0xFFFF, /*!< Timer 17 Prescaler Max Value */ 
-};
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif // _HWD_TIMER_H_

csl/stm32f042k6t6/HardwareDescription/hwd_usart.h

@@ -1,30 +0,0 @@
-/**
-**************************************************************************************************
-* @file		hwd_usart.h		
-* @author	Kerem Yollu & Edwin Koch
-* @date		26.02.2023
-* @version	1.0
-************************************************************************************************** 
-* @brief
-* 
-* **Detailed Description :**
-*	
-**************************************************************************************************
-*/
-
-#ifndef _HWD_USART_H_
-#define _HWD_USART_H_
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include "hardwareDescription.h"
-
-#define MAX_USART_CHANNEL_COUNT 2
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif // _HWD_USART_H_

csl/stm32f042k6t6/HardwareDescription/stm32f0xx.h

@@ -1,275 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f0xx.h
-  * @author  MCD Application Team
-  * @brief   CMSIS STM32F0xx Device Peripheral Access Layer Header File.           
-  *            
-  *          The file is the unique include file that the application programmer
-  *          is using in the C source code, usually in main.c. This file contains:
-  *           - Configuration section that allows to select:
-  *              - The STM32F0xx device used in the target application
-  *              - To use or not the peripheral’s drivers in application code(i.e. 
-  *                code will be based on direct access to peripheral’s registers 
-  *                rather than drivers API), this option is controlled by 
-  *                "#define USE_HAL_DRIVER"
-  *  
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
-  * All rights reserved.</center></h2>
-  *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
-  *
-  ******************************************************************************
-  */
-
-/** @addtogroup CMSIS
-  * @{
-  */
-
-/** @addtogroup stm32f0xx
-  * @{
-  */
-    
-#ifndef __STM32F0xx_H
-#define __STM32F0xx_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif /* __cplusplus */
-   
-/** @addtogroup Library_configuration_section
-  * @{
-  */
-  
-/**
-  * @brief STM32 Family
-  */
-#if !defined  (STM32F0)
-#define STM32F0
-#endif /* STM32F0 */
-
-/** Uncomment the line below according to the target STM32 device used in your application.
-  * stm32f0xxxx.h file contains:
-  * - All the peripheral register's definitions, bits definitions and memory mapping for STM32F0xxxx devices
-  * - IRQ channel definition
-  * - Peripheral memory mapping and physical registers address definition
-  * - Peripheral pointer declaration and driver header file inclusion
-  * - Product miscellaneous configuration: assert macros…
-  * Note: These CMSIS drivers (stm32f0xxxx.h) are always supporting features of the sub-family’s superset.
-  */
-
-#if !defined (STM32F030x6) && !defined (STM32F030x8) &&                           \
-    !defined (STM32F031x6) && !defined (STM32F038xx) &&                           \
-    !defined (STM32F042x6) && !defined (STM32F048xx) && !defined (STM32F070x6) && \
-    !defined (STM32F051x8) && !defined (STM32F058xx) &&                           \
-    !defined (STM32F071xB) && !defined (STM32F072xB) && !defined (STM32F078xx) && !defined (STM32F070xB) && \
-    !defined (STM32F091xC) && !defined (STM32F098xx) && !defined (STM32F030xC)
-  /* #define STM32F030x6 */  /*!< STM32F030x4, STM32F030x6 Devices (STM32F030xx microcontrollers where the Flash memory ranges between 16 and 32 Kbytes)              */
-  /* #define STM32F030x8 */  /*!< STM32F030x8 Devices (STM32F030xx microcontrollers where the Flash memory is 64 Kbytes)                                              */
-  /* #define STM32F031x6 */  /*!< STM32F031x4, STM32F031x6 Devices (STM32F031xx microcontrollers where the Flash memory ranges between 16 and 32 Kbytes)              */
-  /* #define STM32F038xx */  /*!< STM32F038xx Devices (STM32F038xx microcontrollers where the Flash memory is 32 Kbytes)                                              */
-  /* #define STM32F042x6 */  /*!< STM32F042x4, STM32F042x6 Devices (STM32F042xx microcontrollers where the Flash memory ranges between 16 and 32 Kbytes)              */
-  /* #define STM32F048xx */  /*!< STM32F048xx Devices (STM32F048xx microcontrollers where the Flash memory is 32 Kbytes)                                              */
-  /* #define STM32F051x8 */  /*!< STM32F051x4, STM32F051x6, STM32F051x8 Devices (STM32F051xx microcontrollers where the Flash memory ranges between 16 and 64 Kbytes) */
-  /* #define STM32F058xx */  /*!< STM32F058xx Devices (STM32F058xx microcontrollers where the Flash memory is 64 Kbytes)                                              */
-  /* #define STM32F070x6 */  /*!< STM32F070x6 Devices (STM32F070x6 microcontrollers where the Flash memory ranges between 16 and 32 Kbytes)                           */
-  /* #define STM32F070xB */  /*!< STM32F070xB Devices (STM32F070xB microcontrollers where the Flash memory ranges between 64 and 128 Kbytes)                          */
-  /* #define STM32F071xB */  /*!< STM32F071x8, STM32F071xB Devices (STM32F071xx microcontrollers where the Flash memory ranges between 64 and 128 Kbytes)             */
-  /* #define STM32F072xB */  /*!< STM32F072x8, STM32F072xB Devices (STM32F072xx microcontrollers where the Flash memory ranges between 64 and 128 Kbytes)             */
-  /* #define STM32F078xx */  /*!< STM32F078xx Devices (STM32F078xx microcontrollers where the Flash memory is 128 Kbytes)                                             */
-  /* #define STM32F030xC */  /*!< STM32F030xC Devices (STM32F030xC microcontrollers where the Flash memory is 256 Kbytes)                                             */  
-  /* #define STM32F091xC */  /*!< STM32F091xB, STM32F091xC Devices (STM32F091xx microcontrollers where the Flash memory ranges between 128 and 256 Kbytes)            */
-  /* #define STM32F098xx */  /*!< STM32F098xx Devices (STM32F098xx microcontrollers where the Flash memory is 256 Kbytes)                                             */
-#endif
-/* Legacy aliases */
-#if defined (STM32F048x6)
- #define STM32F048xx 
-#endif /* STM32F048x6 */
-
-/*  Tip: To avoid modifying this file each time you need to switch between these
-        devices, you can define the device in your toolchain compiler preprocessor.
-  */
-#if !defined  (USE_HAL_DRIVER)
-/**
- * @brief Comment the line below if you will not use the peripherals drivers.
-   In this case, these drivers will not be included and the application code will 
-   be based on direct access to peripherals registers 
-   */
-  /*#define USE_HAL_DRIVER */
-#endif /* USE_HAL_DRIVER */
-
-/**
-  * @brief CMSIS Device version number V2.3.6
-  */
-#define __STM32F0_DEVICE_VERSION_MAIN   (0x02) /*!< [31:24] main version */
-#define __STM32F0_DEVICE_VERSION_SUB1   (0x03) /*!< [23:16] sub1 version */
-#define __STM32F0_DEVICE_VERSION_SUB2   (0x06) /*!< [15:8]  sub2 version */
-#define __STM32F0_DEVICE_VERSION_RC     (0x00) /*!< [7:0]  release candidate */ 
-#define __STM32F0_DEVICE_VERSION        ((__STM32F0_DEVICE_VERSION_MAIN << 24)\
-                                        |(__STM32F0_DEVICE_VERSION_SUB1 << 16)\
-                                        |(__STM32F0_DEVICE_VERSION_SUB2 << 8 )\
-                                        |(__STM32F0_DEVICE_VERSION_RC))
-                                             
-/**
-  * @}
-  */
-
-/** @addtogroup Device_Included
-  * @{
-  */
-
-#if defined(STM32F030x6)
-  #include "stm32f030x6.h"
-#elif defined(STM32F030x8)
-  #include "stm32f030x8.h"
-#elif defined(STM32F031x6)
-  #include "stm32f031x6.h"
-#elif defined(STM32F038xx)
-  #include "stm32f038xx.h"
-#elif defined(STM32F042x6)
-  #include "stm32f042x6.h"
-#elif defined(STM32F048xx)
-  #include "stm32f048xx.h"
-#elif defined(STM32F051x8)
-  #include "stm32f051x8.h"
-#elif defined(STM32F058xx)
-  #include "stm32f058xx.h"
-#elif defined(STM32F070x6)
-  #include "stm32f070x6.h"
-#elif defined(STM32F070xB)
-  #include "stm32f070xb.h"
-#elif defined(STM32F071xB)
-  #include "stm32f071xb.h"
-#elif defined(STM32F072xB)
-  #include "stm32f072xb.h"
-#elif defined(STM32F078xx)
-  #include "stm32f078xx.h"
-#elif defined(STM32F091xC)
-  #include "stm32f091xc.h"
-#elif defined(STM32F098xx)
-  #include "stm32f098xx.h"
-#elif defined(STM32F030xC)
-  #include "stm32f030xc.h"    
-#else
- #error "Please select first the target STM32F0xx device used in your application (in stm32f0xx.h file)"
-#endif
-
-/**
-  * @}
-  */
-
-/** @addtogroup Exported_types
-  * @{
-  */ 
-typedef enum 
-{
-  RESET = 0U, 
-  SET = !RESET
-} FlagStatus, ITStatus;
-
-typedef enum 
-{
-  DISABLE = 0U, 
-  ENABLE = !DISABLE
-} FunctionalState;
-#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
-
-typedef enum 
-{
-  SUCCESS = 0U,
-  ERROR = !SUCCESS
-} ErrorStatus;
-
-/**
-  * @}
-  */
-
-
-/** @addtogroup Exported_macros
-  * @{
-  */
-#define SET_BIT(REG, BIT)     ((REG) |= (BIT))
-
-#define CLEAR_BIT(REG, BIT)   ((REG) &= ~(BIT))
-
-#define READ_BIT(REG, BIT)    ((REG) & (BIT))
-
-#define CLEAR_REG(REG)        ((REG) = (0x0))
-
-#define WRITE_REG(REG, VAL)   ((REG) = (VAL))
-
-#define READ_REG(REG)         ((REG))
-
-#define MODIFY_REG(REG, CLEARMASK, SETMASK)  WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
-
-/* Use of interrupt control for register exclusive access */
-/* Atomic 32-bit register access macro to set one or several bits */
-#define ATOMIC_SET_BIT(REG, BIT)                             \
-  do {                                                       \
-    uint32_t primask;                                        \
-    primask = __get_PRIMASK();                               \
-    __set_PRIMASK(1);                                        \
-    SET_BIT((REG), (BIT));                                   \
-    __set_PRIMASK(primask);                                  \
-  } while(0)
-
-/* Atomic 32-bit register access macro to clear one or several bits */
-#define ATOMIC_CLEAR_BIT(REG, BIT)                           \
-  do {                                                       \
-    uint32_t primask;                                        \
-    primask = __get_PRIMASK();                               \
-    __set_PRIMASK(1);                                        \
-    CLEAR_BIT((REG), (BIT));                                 \
-    __set_PRIMASK(primask);                                  \
-  } while(0)
-
-/* Atomic 32-bit register access macro to clear and set one or several bits */
-#define ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK)            \
-  do {                                                       \
-    uint32_t primask;                                        \
-    primask = __get_PRIMASK();                               \
-    __set_PRIMASK(1);                                        \
-    MODIFY_REG((REG), (CLEARMSK), (SETMASK));                \
-    __set_PRIMASK(primask);                                  \
-  } while(0)
-
-/* Atomic 16-bit register access macro to set one or several bits */
-#define ATOMIC_SETH_BIT(REG, BIT) ATOMIC_SET_BIT(REG, BIT)                                   \
-
-/* Atomic 16-bit register access macro to clear one or several bits */
-#define ATOMIC_CLEARH_BIT(REG, BIT) ATOMIC_CLEAR_BIT(REG, BIT)                               \
-
-/* Atomic 16-bit register access macro to clear and set one or several bits */
-#define ATOMIC_MODIFYH_REG(REG, CLEARMSK, SETMASK) ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK) \
-
-/**
-  * @}
-  */
-
-#if defined (USE_HAL_DRIVER)
- #include "stm32f0xx_hal.h"
-#endif /* USE_HAL_DRIVER */
-
-
-#ifdef __cplusplus
-}
-#endif /* __cplusplus */
-
-#endif /* __STM32F0xx_H */
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-  
-
-
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

csl/stm32f042k6t6/HardwareDescription/system_stm32f0xx.h

@@ -1,104 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    system_stm32f0xx.h
-  * @author  MCD Application Team
-  * @brief   CMSIS Cortex-M0 Device System Source File for STM32F0xx devices.  
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
-  * All rights reserved.</center></h2>
-  *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
-  *
-  ******************************************************************************
-  */
-
-/** @addtogroup CMSIS
-  * @{
-  */
-
-/** @addtogroup stm32f0xx_system
-  * @{
-  */  
-  
-/**
-  * @brief Define to prevent recursive inclusion
-  */
-#ifndef __SYSTEM_STM32F0XX_H
-#define __SYSTEM_STM32F0XX_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif 
-
-/** @addtogroup STM32F0xx_System_Includes
-  * @{
-  */
-
-/**
-  * @}
-  */
-
-
-/** @addtogroup STM32F0xx_System_Exported_types
-  * @{
-  */
-  /* This variable is updated in three ways:
-      1) by calling CMSIS function SystemCoreClockUpdate()
-      3) by calling HAL API function HAL_RCC_GetHCLKFreq()
-      3) by calling HAL API function HAL_RCC_ClockConfig()
-         Note: If you use this function to configure the system clock; then there
-               is no need to call the 2 first functions listed above, since SystemCoreClock
-               variable is updated automatically.
-  */
-extern const uint8_t AHBPrescTable[16];   /*!< AHB prescalers table values */
-extern const uint8_t APBPrescTable[8];    /*!< APB prescalers table values */
-
-/**
-  * @}
-  */
-
-/** @addtogroup STM32F0xx_System_Exported_Constants
-  * @{
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup STM32F0xx_System_Exported_Macros
-  * @{
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup STM32F0xx_System_Exported_Functions
-  * @{
-  */
-  
-extern void SystemInit(void);
-extern void SystemCoreClockUpdate(void);
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /*__SYSTEM_STM32F0XX_H */
-
-/**
-  * @}
-  */
-  
-/**
-  * @}
-  */  
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

csl/stm32f042k6t6/config.cmake

@@ -1,82 +0,0 @@
-####################################################################################################
-#PROJECT & LIBRARIES : defined by user and important that it comes after the VARIABLES otherwise the Set varibale will not be used. 
-####################################################################################################
-set(CMAKE_CXX_STANDARD 11)
-set(CMAKE_SYSTEM_NAME Generic)
-set(CMAKE_SYSTEM_PROCESSOR arm)
-set(CMAKE_CROSSCOMPILING TRUE)
-
-####################################################################################################
-#VARIABLES : defined by user
-####################################################################################################
-# Set the required Startup Code
-set(STARTUP_CODE ${CSL_STARTUP_DIR}/startup_stm32f042x6.s) 
-
-# Defines the linker to be used
-set(LINKER ${CSL_STARTUP_DIR}/STM32F042K6Tx_FLASH.ld)
-
-# Defines The MCU CORE
-set(CPU_MCU "-mcpu=cortex-m0")
-
-
-####################################################################################################
-# MAIN COMPILING FLAGS
-####################################################################################################
-# For flags please check https://manned.org/arm-none-eabi-gcc/34fd6095
-set(MAIN_FLAGS 
-	${CPU_MCU}
-	-mthumb				#Instruction set : https://stackoverflow.com/questions/10638130/what-is-the-arm-thumb-instruction-set 
-	##	-O1
-	-Wall				#Error : If you don't know this one please chek basical compiling 
-	-fdata-sections		#Optimization : Linker can perform optimizations to improve locality of reference in the instruction space.
-	-fdiagnostics-color=always
-	-ffunction-sections #Optimization : used with -fdata-sections
-	$<$<CONFIG:Debug>:-O -g -gdwarf-2>)
-
-####################################################################################################
-# DEFINITIONS
-####################################################################################################
-set(MAIN_DEFS 
-	-DARM_MCU #Defined by kerem to auto configure headers in main.hpp
-	-DUSE_FULL_LL_DRIVER 
-	-DSTM32F042x6 
-	-DHSE_VALUE=8000000 
-	-DHSE_STARTUP_TIMEOUT=100 
-	-DLSE_STARTUP_TIMEOUT=5000 
-	-DLSE_VALUE=32768 
-	-DHSI_VALUE=8000000 
-	-DLSI_VALUE=40000 
-	-DVDD_VALUE=3300 
-	-DPREFETCH_ENABLE=1 
-	-DINSTRUCTION_CACHE_ENABLE=0 
-	-DDATA_CACHE_ENABLE=0)
-
-####################################################################################################
-# LINKER FLAGS
-####################################################################################################
-#The order is important
-set(LINKER_FLAGS
-	${CPU_MCU}
-	-mthumb
-	-specs=nano.specs
-	-T${LINKER}
-	-lc 
-	-lm 
-	-lnosys
-	-Wl,-Map=${PROJECT_NAME}.map,--cref 
-	-Wl,--gc-sections)
-
-####################################################################################################
-# Creation of the startup library : Use only needs to chnage the definitions made at the beginning 
-####################################################################################################
-
-# Sartup can and will most propably require some extra flags
-set(STARTUP_FLAGS -x assembler-with-cpp ${MAIN_FLAGS})
-# Defines should be the same as the other sources but somes extras could be added if needed
-set(STARTUP_DEFS ${MAIN_DEFS})
-
-add_library(startup ${STARTUP_CODE})
-target_compile_options(startup PRIVATE ${STARTUP_FLAGS})
-target_compile_definitions(startup PRIVATE ${STARTUP_DEFS})
-add_library(sub::startup ALIAS startup)
-set(STARTUP_UCODE sub::startup)

csl/stm32f042k6t6/implementation/CMakeLists.txt

@@ -1 +0,0 @@
-

csl/stm32f042k6t6/implementation/imp_delay.c

@@ -1,14 +0,0 @@
-#include "delay.h"
-#include "stm32f042x6.h"
-
-
-void delayMs(uint16_t delay)
-{
-	while (delay)
-	{
-		if ((SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk) != 0U)
-		{
-			delay--;
-		}
-	}
-}

csl/stm32f042k6t6/implementation/imp_deviceSetup.c

@@ -1,102 +0,0 @@
-#include "deviceSetup.h"
-#include "stm32f042x6.h"
-
-
-#define SET_BIT(REG, BIT)     ((REG) |= (BIT))
-#define CLEAR_BIT(REG, BIT)   ((REG) &= ~(BIT))
-#define READ_BIT(REG, BIT)    ((REG) & (BIT))
-#define CLEAR_REG(REG)        ((REG) = (0x0))
-#define WRITE_REG(REG, VAL)   ((REG) = (VAL))
-#define READ_REG(REG)         ((REG))
-
-#define MODIFY_REG(REG, CLEARMASK, SETMASK)  WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
-//													FLASH->ACR = (((FLASH->ACR) & (~(FLASH_ACR_LATENCY))) | 0)					 	
-#define SYS_CLK 8000000
-
-
-void setupInit()
-{
-	setupBus();
-	setupMemory();
-	setupClock();
-	__disable_irq();
-	setupPower();
-	delayInitMs(SYS_CLK, 1000);
-}
-
-void setupClock()
-{
-	uint8_t check = 1;
-	/*Sets the clock source to internal clock*/
-	RCC->CR |= RCC_CR_HSION;
-
-	/* Wait till HSI is ready */
-	while(check)
-	{
-		if(READ_BIT(RCC->CR, RCC_CR_HSIRDY) == (RCC_CR_HSIRDY))
-		{
-			check = 0;
-		}
-	}
-
-	/**
-	  * @brief  Set HSI Calibration trimming
-	  * @note Default value is 16, which, when added to the HSICAL value,
-	  * @param  Value between Min_Data = 0x00 and Max_Data = 0x1F
-	  */
-	MODIFY_REG(RCC->CR, RCC_CR_HSITRIM_Msk, 16 << RCC_CR_HSITRIM_Pos) ;
-	MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_CFGR_HPRE_DIV1);
-	MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_CFGR_PPRE_DIV1);
-	MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, RCC_CFGR_SW_HSI);
-
-	/* Wait till System clock is ready */
-	while((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI){}
-}	
-
-void setupBus()
-{
-  volatile uint32_t tmpreg;
-  /*Bit 0 SYSCFGCOMPEN: SYSCFG & COMP clock enable*/
-  SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SYSCFGEN);
-  /* Delay after an RCC peripheral clock enabling */
-  tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SYSCFGEN);
-
-  /*Bit 28 PWREN: Power interface clock enable*/
-  SET_BIT(RCC->APB1ENR, RCC_APB1ENR_PWREN);
-  /* Delay after an RCC peripheral clock enabling */
-  tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_PWREN);
-  
-  (void)tmpreg;
-
-}	
-
-void setupPower()
-{
-
-}
-
-void setupMemory()
-{
-	/* Bits 2:0 LATENCY[2:0]: Latency
-	 * These bits represent the ratio of the SYSCLK (system clock) period to the Flash access time.
-	 * 000: Zero wait state, if SYSCLK ≤ 24 MHz
-	 * 001: One wait state, if 24 MHz < SYSCLK ≤ 48 MHz*/
-	if(SYS_CLK <= 24000000)
-	{
-		FLASH->ACR = (((FLASH->ACR) & (~(FLASH_ACR_LATENCY_Msk))) | 0);					 	
-		while( ((FLASH->ACR) & (FLASH_ACR_LATENCY_Msk)) != 0){}
-	}
-	else 
-	{
-		FLASH->ACR = (((FLASH->ACR) & (~(FLASH_ACR_LATENCY_Msk))) | 1);				 	
-		while( ((FLASH->ACR) & (FLASH_ACR_LATENCY_Msk)) != 1){}
-	}
-}
-
-void delayInitMs(uint32_t clk, uint32_t ticks)
-{
-  /* Configure the SysTick to have interrupt in 1ms time base */
-  SysTick->LOAD  = (uint32_t)((clk / ticks) - 1UL);							/* set reload register */
-  SysTick->VAL   = 0UL;														/* Load the SysTick Counter Value */
-  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk | SysTick_CTRL_ENABLE_Msk;	/* Enable the Systick Timer */
-}

csl/stm32f042k6t6/implementation/imp_i2c.c

@@ -1,335 +0,0 @@
-#include "i2c.h"
-#include "usart.h"
-#include "delay.h"
-
-
-#define I2C_BASE ((I2C_TypeDef*)i2cBase_Addr_List[i2c_dev->channelNo])
-
-void i2c_hardware_enable(i2c_t *i2c_dev)
-{
-	i2c_hardware_reset(i2c_dev);		
-
-	// Enables the i2c bus
-	RCC->APB1ENR |= (1 << i2cBus_En_bitPos[i2c_dev->channelNo]);
-	i2c_dev->hardwareState = i2c_hw_enabled;
-	
-	pinInit(pinA9);
-	pinInit(pinA10);
-	pinConfig(pinA9, alternate, openDrain, pullUp, fast);// I2C SCL 
-	pinConfig(pinA10, alternate, openDrain, pullUp, fast);// I2C CSA
-	pinSetAlternate(pinA9, 4); 
-	pinSetAlternate(pinA10, 4);
-	i2c_dev->hardwareState = i2c_hw_ready;
-}	
-
-// Resets the I2C hardware using the reset registers,
-// This will init the device to it's defualt configuration established by STM
-void i2c_hardware_reset(i2c_t *i2c_dev)
-{
-	RCC->APB1RSTR |= (1 << i2cBus_Rst_bitPos[i2c_dev->channelNo]);
-	RCC->APB1RSTR &= ~(1 << i2cBus_Rst_bitPos[i2c_dev->channelNo]); 
-	i2c_dev->hardwareState = i2c_hw_reset;
-}
-
-//enables periferal
-void i2c_periferal_enable(i2c_t *i2c_dev)
-{
-	I2C_BASE->CR1 |= I2C_CR1_PE;
-	i2c_dev->periferalState = i2c_perif_enabled;
-	//Wait untill periferal is ready for communication
-	while(!i2c_is_perif_ready(i2c_dev));
-	i2c_dev->periferalState = i2c_perif_ready;
-}	
-
-void i2c_periferal_disable(i2c_t *i2c_dev)
-{
-	I2C_BASE->CR1 &= ~I2C_CR1_PE;
-	i2c_dev->periferalState = i2c_perif_disabled;
-}
-
-
-void i2c_set_mode(i2c_t *i2c_dev, i2c_mode_t mode)
-{
-	//This device will set himself automatically to master mode
-	if(i2c_dev->mode == i2c_mode_master)
-	{
-	
-	}
-	else if(i2c_dev->mode == i2c_mode_slave)
-	{
-		// to be written. 
-	}
-}
-
-void i2c_set_address_lenght(i2c_t *i2c_dev, i2c_address_size_t size)
-{
-	if(i2c_dev->mode == i2c_mode_master)
-	{
-		if(i2c_dev->addressSize == i2c_address_size_10b)
-		{
-			I2C_BASE->CR2 |= I2C_CR2_ADD10; // 10 Bit addressing
-			I2C_BASE->CR2 &= ~I2C_CR2_HEAD10R; // 7 Bit header read turned on DEFAULT
-		}
-		else
-		{
-			I2C_BASE->CR2 &= ~I2C_CR2_ADD10; // 7 Bit addressing DEFAULT
-			I2C_BASE->CR2 |= I2C_CR2_HEAD10R; // 7 Bit header read turned off DEFAULT
-		}
-	}
-	else if(i2c_dev->mode == i2c_mode_slave)
-	{
-		// to be written. 
-	}
-}
-
-void i2c_set_clk_stretch(i2c_t *i2c_dev, i2c_clk_stretching_t stretching)
-{
-	if(i2c_dev->stretching == i2c_clk_stretching_enable)
-	{
-		I2C_BASE->CR1 &=~ I2C_CR1_NOSTRETCH; 
-	}
-	else if(i2c_dev->stretching == i2c_clk_stretching_disable)
-	{
-		I2C_BASE->CR1 |= I2C_CR1_NOSTRETCH; 
-	}
-}
-
-void i2c_set_clk_speed(i2c_t *i2c_dev, i2c_clk_speed_t speed)
-{
-	switch(speed)
-	{
-		case i2c_clk_speed_standart:
-			I2C_BASE->TIMINGR = 0x2000090E; 
-			break; 
-
-		case i2c_clk_speed_fast:
-			break; 
-
-		case i2c_clk_speed_fastPlus:
-			break; 
-			
-		case i2c_clk_speed_hightSpeed:
-			break; 
-
-		case i2c_clk_speed_ultraFast:
-			break; 
-
-		default: 
-			break;
-	}
-}
-
-void i2c_set_filter(i2c_t *i2c_dev, uint8_t enable)
-{
-	if(enable)
-	{
-		//Anlalog filter is on
-		I2C_BASE->CR1 &= ~I2C_CR1_ANFOFF; 
-	}
-	else
-	{
-		//Anlalog filter is off
-		I2C_BASE->CR1 |= I2C_CR1_ANFOFF; 	
-	}
-}	
-
-/**************************************************************************************************
-	I2C Hardware functions
-***************************************************************************************************/
-void i2c_send_start(i2c_t *i2c_dev)
-{
-	I2C_BASE->CR2 &=~ I2C_CR2_STOP; 
-	I2C_BASE->CR2 |= I2C_CR2_START; 	
-	
-	//Wait until the start condition in generated.
-	//Bit 15BUSY: Bus busy
-	//This flag indicates that a communication is in progress on the bus. It is set by hardware when a
-	//START condition is detected. It is cleared by hardware when a Stop condition is detected, or
-	//when PE=0.
-	while(!(I2C_BASE->ISR & (I2C_ISR_BUSY)));
-	
-	i2c_dev->hardwareState = i2c_hw_sent_start; 
-}
-
-void i2c_send_stop(i2c_t *i2c_dev)
-{
-	// Send stop command	
-	I2C_BASE->CR2 |= I2C_CR2_STOP; 
-	I2C_BASE->CR2 &=~ I2C_CR2_START; 
-	i2c_dev->hardwareState = i2c_hw_sent_stop; 
-}
-
-uint8_t i2c_is_perif_ready(i2c_t *i2c_dev)
-{
-	if((I2C_BASE->ISR & (I2C_ISR_BUSY))!=I2C_ISR_BUSY)
-	{
-		i2c_dev->periferalState = i2c_perif_ready;
-		return 1; 
-	}
-	return 0;
-}
-
-void i2c_set_transfer_counter(i2c_t *i2c_dev, uint8_t count)
-{
-	I2C_BASE->CR2 &= ~(0xFF << I2C_CR2_NBYTES_Pos);
-	I2C_BASE->CR2 |= (count << I2C_CR2_NBYTES_Pos);
-}
-
-uint8_t i2c_get_transfer_counter(i2c_t *i2c_dev)
-{
-	return (I2C_BASE->CR2 & I2C_CR2_NBYTES) >> I2C_CR2_NBYTES_Pos;
-}
-
-void i2c_init_write_command(i2c_t *i2c_dev)
-{
-	I2C_BASE->CR2 &= ~I2C_CR2_RD_WRN;
-	i2c_dev->hardwareState = i2c_hw_send_write;
-}
-
-void i2c_init_read_command(i2c_t *i2c_dev)
-{
-	I2C_BASE->CR2 |= I2C_CR2_RD_WRN;
-	i2c_dev->hardwareState =i2c_hw_send_read;
-}
-
-
-uint8_t i2c_send_address_for_write(i2c_t *i2c_dev, uint16_t *slaveAddress)
-{
-	//Automatic end mode (master mode) disabled Enablede as default 
-	I2C_BASE->CR2 &= ~I2C_CR2_AUTOEND; 
-
-	// On This chip this shoudl be done before the start condition
-	i2c_init_write_command(i2c_dev);
-	
-	// The Slave addrress is automatically place on the output buffer (must be done before the start condition)
-	I2C_BASE->CR2 |= (*slaveAddress & 0xff) << 1; // The bit no 0 is not taken in concideration in 7bit mode		
-
-	// This device places the salve address automaticaly in the output buffer before sending the star condition
-	i2c_send_start(i2c_dev);
-	while(i2c_is_output_buffer_full(i2c_dev)); 
-	return 1;
-}
-
-uint8_t i2c_send_address_for_read(i2c_t *i2c_dev, uint16_t *slaveAddress)
-{
-	// On This chip this shoudl be done before the start condition
-	i2c_init_read_command(i2c_dev);
-	
-	// The Slave addrress is automatically place on the output buffer (must be done before the start condition)
-	I2C_BASE->CR2 |= (*slaveAddress & 0xff) << 1; // The bit no 0 is not taken in concideration in 7bit mode		
-	// This device places the salve address automaticaly in the output buffer before sending the star condition
-	i2c_send_start(i2c_dev);
-	while(i2c_is_output_buffer_full(i2c_dev)); 		
-	return 1;
-}
-
-uint8_t i2c_is_output_buffer_full(i2c_t *i2c_dev)
-{
-	/*
-	Bit 0 TXE: Transmit data register empty (transmitters)
-	This bit is set by hardware when the I2C_TXDR register is empty. It is cleared when the next
-	data to be sent is written in the I2C_TXDR register.
-	This bit can be written to ‘1’ by software in order to flush the transmit data register I2C_TXDR.
-	Note: This bit is set by hardware when PE=0. 
-	*/
-	if(I2C_BASE->ISR & I2C_ISR_TXE)
-	{
-		i2c_dev->hardwareState = i2c_hw_out_buff_empty;
-		return 0;
-	}
-	else
-	{
-		i2c_dev->hardwareState = i2c_hw_out_buff_full;
-		return 1;
-	}
-}
-
-uint8_t i2c_is_txis(i2c_t *i2c_dev)
-{
-	if(I2C_BASE->ISR & I2C_ISR_TXIS)
-	{
-		i2c_dev->hardwareState = i2c_hw_out_buff_empty;
-		return 0;
-	}
-	else
-	{
-		i2c_dev->hardwareState = i2c_hw_out_buff_full;
-		return 1;
-	}
-}
-
-void i2c_send_reg_address(i2c_t *i2c_dev, uint8_t *registerAddress)
-{
-		I2C_BASE->TXDR = *registerAddress; 
-		i2c_dev->hardwareState = i2c_hw_out_buff_full;
-		while(i2c_is_output_buffer_full(i2c_dev));
-}
-
-void i2c_send_data(i2c_t *i2c_dev, uint8_t *data)
-{
-	I2C_BASE->TXDR = *data; 
-	i2c_dev->hardwareState = i2c_hw_out_buff_full;
-	while(i2c_is_output_buffer_full(i2c_dev));
-}
-
-uint8_t i2c_is_transfer_complete(i2c_t *i2c_dev)
-{
-	/*
-	TC: Transfer Complete (master mode)
-	This flag is set by hardware when RELOAD=0, AUTOEND=0 and NBYTES data have been
-	transferred. It is cleared by software when START bit or STOP bit is set.
-	Note: This bit is cleared by hardware when PE=0.
-	*/
-	if(I2C_BASE->ISR & I2C_ISR_TC)
-	{
-		return 1;
-	}
-	else
-	{
-		return 0;
-	}
-}
-
-uint8_t i2c_is_input_buffer_full(i2c_t *i2c_dev)
-{
-	if(I2C_BASE->ISR & I2C_ISR_RXNE)
-	{
-		i2c_dev->hardwareState = i2c_hw_in_buff_full;		
-		return 1;
-	}
-	else
-	{
-		i2c_dev->hardwareState = i2c_hw_in_buff_empty;
-		return 0;
-	}
-}
-
-void i2c_get_input_register(i2c_t *i2c_dev, uint8_t *data)
-{
-	while(!i2c_is_input_buffer_full(i2c_dev));
-	*data = I2C_BASE->RXDR;	
-	while(!i2c_is_transfer_complete(i2c_dev));
-}
-
-void i2c_send_nack(i2c_t *i2c_dev)
-{
-	if(i2c_dev->mode == i2c_mode_master)
-	{
-		//IN master mode this ic geretes NACK's otomatically
-		i2c_dev->hardwareState = i2c_hw_sent_nack;		
-	}
-	else if(i2c_dev->mode == i2c_mode_slave)
-	{
-		// to be written. 
-	}
-}
-
-uint8_t i2c_check_nack(i2c_t *i2c_dev)
-{
-	delayMs(2);
-	return(I2C_BASE->ISR & I2C_ISR_NACKF);
-}
-
-void i2c_set_address(i2c_t *i2c_dev, uint16_t address){}
-void i2c_set_address_second(i2c_t *i2c_dev, uint16_t address){}
-

csl/stm32f042k6t6/implementation/imp_interrupt.c

@@ -1,153 +0,0 @@
-#include "interrupt.h"
-#include "hwd_interrupt.h"
-#include "pin.h"
-
-volatile void (*intHandlerArray[intTypeEND])() = {NULL};
-
-
-const uint8_t interruptTypeIndexList[intTypeEND] =
-{
-	EXTI0_1_IRQn,
-	EXTI0_1_IRQn,
-	EXTI0_1_IRQn,
-	EXTI0_1_IRQn,
-	EXTI0_1_IRQn,
-	EXTI2_3_IRQn,
-	EXTI2_3_IRQn,
-	EXTI2_3_IRQn,
-	EXTI2_3_IRQn,
-	EXTI2_3_IRQn,
-	EXTI2_3_IRQn,
-	EXTI4_15_IRQn,
-	EXTI4_15_IRQn,
-	EXTI4_15_IRQn,
-	EXTI4_15_IRQn,
-	EXTI4_15_IRQn,
-	EXTI4_15_IRQn,
-	EXTI4_15_IRQn,
-	EXTI4_15_IRQn,
-	EXTI4_15_IRQn,
-	EXTI4_15_IRQn,
-	EXTI4_15_IRQn,
-	EXTI4_15_IRQn,
-	EXTI4_15_IRQn,
-	EXTI4_15_IRQn,
-	EXTI4_15_IRQn,
-	EXTI4_15_IRQn,
-	EXTI4_15_IRQn,
-	EXTI4_15_IRQn,
-	EXTI4_15_IRQn,
-	EXTI4_15_IRQn,
-	EXTI4_15_IRQn,
-	EXTI4_15_IRQn,
-	EXTI4_15_IRQn,
-	EXTI4_15_IRQn,
-	EXTI4_15_IRQn,
-	EXTI4_15_IRQn,
-	EXTI4_15_IRQn,
-	EXTI4_15_IRQn,
-	EXTI4_15_IRQn,
-	EXTI4_15_IRQn,
-	EXTI4_15_IRQn,
-	EXTI4_15_IRQn,
-	EXTI4_15_IRQn,
-	EXTI4_15_IRQn,
-	EXTI4_15_IRQn,
-	EXTI4_15_IRQn,
-	TIM1_BRK_UP_TRG_COM_IRQn,
-	TIM1_BRK_UP_TRG_COM_IRQn,
-	TIM1_BRK_UP_TRG_COM_IRQn,
-	TIM1_BRK_UP_TRG_COM_IRQn,
-	TIM1_CC_IRQn,
-	TIM1_CC_IRQn,
-	TIM1_CC_IRQn,
-	TIM1_CC_IRQn,
-	TIM2_IRQn,
-	TIM2_IRQn,
-	TIM2_IRQn,
-	TIM2_IRQn,
-	TIM2_IRQn,
-	TIM2_IRQn,
-	TIM2_IRQn,
-	TIM2_IRQn,
-	TIM2_IRQn,
-	TIM2_IRQn,
-	TIM3_IRQn,
-	TIM3_IRQn,
-	TIM3_IRQn,
-	TIM3_IRQn,
-	TIM3_IRQn,
-	TIM3_IRQn,
-	TIM3_IRQn,
-	TIM3_IRQn,
-	TIM3_IRQn,
-	TIM3_IRQn,
-	TIM14_IRQn,
-	TIM14_IRQn,
-	TIM14_IRQn,
-	TIM16_IRQn,
-	TIM16_IRQn,
-	TIM16_IRQn,
-	TIM16_IRQn,
-	TIM16_IRQn,
-	TIM17_IRQn,
-	TIM17_IRQn,
-	TIM17_IRQn,
-	TIM17_IRQn,
-	TIM17_IRQn,
-	SPI1_IRQn,
-	SPI1_IRQn,
-	SPI1_IRQn,
-	SPI1_IRQn,
-	SPI1_IRQn,
-	SPI1_IRQn,
-	SPI1_IRQn,
-	SPI1_IRQn,
-	SPI1_IRQn,
-	SPI1_IRQn,
-	SPI1_IRQn,
-	SPI1_IRQn,
-	SPI1_IRQn,
-	SPI1_IRQn,
-	SPI1_IRQn,
-	SPI1_IRQn,
-	SPI1_IRQn
-};
-
-void intInit(
-		intrType_t intType,
-		intHandler_t handler,	
-		uint8_t priority)
-{
-	// check if index is correct
-	if(intType >= intTypeEND) return;
-	
-	intDisableGlobal();
-
-	NVIC_SetPriority(interruptTypeIndexList[intType], priority);
-	intHandlerArray[intType] = handler;
-	
-}
-
-void intEnableGlobal()
-{
-	__enable_irq();
-}
-
-void intDisableGlobal()
-{
-	__disable_irq();
-}
-
-void intEnable(
-		intrType_t intType)
-{
-	NVIC_EnableIRQ(interruptTypeIndexList[intType]);
-}
-
-void intDissable(
-		intrType_t intType)
-{
-	NVIC_DisableIRQ(interruptTypeIndexList[intType]);
-}
-

csl/stm32f042k6t6/implementation/imp_pin.c

@@ -1,207 +0,0 @@
-/**
-  **************************************************************************************************
-  * @file		pin.c
-  * @author		Kerem Yollu & Edwin Koch
-  * @date		03.11.2021
-  * @version	1.01
-  ************************************************************************************************** 
-  * @brief		Implementation of pin.h for the STM32F042K6 MCU
-  * 
-  * **Detailed Description :**
-  * 
-  * This source code uses bit manipulation in order to minimise the footprint of pin initialisation 
-  * and manipulation. It's based on the CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h Header file
-  * to get the obtain the right Registers. 
-  *
-  *
-  * @todo 
-  * - 01.11.2021 : Should we add a seprate header in the cls layer containing the pinNo_t ?
-  *	- 01.11.2021 : Depending on request implment a pinLock() function
-  **************************************************************************************************
-*/
-
-#include "pin.h"
-
-#define MODER_IN		0x0UL	
-#define MODER_OUT		0x1UL		
-#define MODER_ALTERNATE	0x2UL		
-#define MODER_ANALOG	0x3UL	
-
-#define OSPEEDR_LOW		0x0UL
-#define OSPEEDR_MEDIUM	0x1UL
-#define OSPEEDR_HIGH	0x3UL
-
-#define PUPDR_NO_PULL	0x0UL
-#define PUPDR_PULL_UP	0x1UL
-#define PUPDR_PULL_DOWN	0x2UL
-
-#define OTYPER_PUSH_PULL	0x0UL
-#define OTYPER_OPEN_DRAIN	0x1UL
-
-#define PIN_NO		(pinNo & 0x0F)
-#define PIN_PORT	((pinNo & 0xF0)>>4)
-#define PIN_BASE	((GPIO_TypeDef *)portBase_Addr_List[PIN_PORT])
-
-/*! Table for binding the Pin mode_t enum index to the values that the MODER register needs */
-const uint32_t moderMode[5] = {
-	MODER_ANALOG, 
-	MODER_IN,
-	MODER_OUT, 
-	MODER_ANALOG,
-	MODER_ALTERNATE
-};
-
-/**
-* Table for binding the Pin pinNo_t's Port Offet to the PORT gesiter that needs to be activated
-*/
-const uint32_t pinPort[3] = {
-	RCC_AHBENR_GPIOAEN, 
-	RCC_AHBENR_GPIOBEN, 
-	RCC_AHBENR_GPIOFEN 
-};
-
-/**
-* Table for binding the Pin pullUpDown_t enum index to the values that the PUPDR register needs
-*/
-const uint32_t pinPullUpDown[4] = {
-	PUPDR_NO_PULL,
-	PUPDR_NO_PULL,
-	PUPDR_PULL_UP,
-	PUPDR_PULL_DOWN
-};
-
-/**
-* Table for binding the Pin speed_t enum index to the values that the OSPEEDR register needs
-*/
-const uint32_t speedList[5] = {
-	OSPEEDR_MEDIUM,
-	OSPEEDR_LOW,
-	OSPEEDR_LOW,
-	OSPEEDR_MEDIUM,
-	OSPEEDR_HIGH
-};
-
-
-/**
-* Table for binding the Pin stage_t enum index to the values that the OTYPER register needs
-*/
-const uint32_t outputStgeList[4] = 
-{
-	OTYPER_PUSH_PULL,
-	OTYPER_OPEN_DRAIN,
-	OTYPER_PUSH_PULL,
-	OTYPER_OPEN_DRAIN
-};
-
-void pinSetMode(pinNo_t pinNo, pinMode_t mode)
-{
-	//Clear entry.
-	PIN_BASE->MODER &=~ (0x3 << (PIN_NO * 2));
-	//Set to corresponding mode.
-	PIN_BASE->MODER |= (moderMode[mode] << (PIN_NO * 2));
-}
-
-void pinSetOutputStage(pinNo_t pinNo, pinStage_t stage)
-{
-	PIN_BASE->OTYPER &= ~(1 << PIN_NO);	
-	PIN_BASE->OTYPER |= (outputStgeList[stage] << PIN_NO);
-}
- 
-void pinSetPullUpDonw(pinNo_t pinNo, pinPullUpDown_t resistance)
-{
-    PIN_BASE->PUPDR &= ~(0x3 << (PIN_NO * 2));
-    PIN_BASE->PUPDR |= (pinPullUpDown[resistance] << (PIN_NO * 2));
-}
- 
-void pinSetSpeed(pinNo_t pinNo, pinSpeed_t speed)
-{
-	PIN_BASE->OSPEEDR &= (0x3 << (PIN_NO * 2));	
-	PIN_BASE->OSPEEDR |= (speedList[speed] << (PIN_NO * 2));
-}
- 
-void pinSetAlternate(pinNo_t pinNo, uint16_t alternate)
-{
-	if(!(altFunc_List[PIN_PORT][PIN_NO] & (1<<(7-alternate))))	
-	{
-		pinThrowError(UnvalidAlternate);	
-	}
-	if(alternate > 15)
-	{
-		pinThrowError(OutOfRangeAlternate);	
-	}
-
-	if(PIN_NO < 8) {
-		PIN_BASE->AFR[0] &= ~(0x0F << (PIN_NO * 4));
-		PIN_BASE->AFR[0] |= ((alternate & 0x0F) << (PIN_NO * 4));
-		return; 
-	}
-
-	PIN_BASE->AFR[1] &= ~(0x0F << ((PIN_NO-8) * 4));
-	PIN_BASE->AFR[1] |= ((alternate & 0x0F) << ((PIN_NO-8) * 4));
-}
-
-void pinConfig(pinNo_t pinNo, pinMode_t mode, pinStage_t stage, pinPullUpDown_t resistance, pinSpeed_t speed)
-{
-	pinInit(pinNo); //Very important to init first so that the corresponding bus gets his clock	
-	pinSetMode(pinNo, mode); 	
-	pinSetOutputStage(pinNo, stage); 
-	pinSetPullUpDonw(pinNo, resistance);
-	pinSetSpeed(pinNo,speed); 
-}
-
-uint8_t pinRead(pinNo_t pinNo)
-{
-	return ((PIN_BASE->IDR & (1<<PIN_NO)) >> PIN_NO);
-}
-
-void pinToggle(pinNo_t pinNo)
-{
-	if(pinRead(pinNo))
-	{
-		PIN_BASE->BSRR |= (GPIO_BSRR_BR_0 << (PIN_NO));
-		return;
-	}
-		PIN_BASE->BSRR |= (GPIO_BSRR_BS_0 << (PIN_NO));
-}
-
-void pinWrite(pinNo_t pinNo, uint8_t state)
-{
-	if(state) {
-		PIN_BASE->BSRR |= (GPIO_BSRR_BS_0 << (PIN_NO));
-		return;
-	}
-		PIN_BASE->BSRR |= (GPIO_BSRR_BR_0 << (PIN_NO));
-}
-
-//Enable the pin port's clock
-//in this family of MCU ell the cloks are on the same bus that is why we dion't need to 
-//modfify the AHBENR.
-//DS Page : 121 
-void pinInit(pinNo_t pinNo)
-{
-	RCC->AHBENR |= pinPort[PIN_PORT];
-}
-
-//in this family of MCU ell the cloks are on the same bus that is why we dion't need to 
-//modfify the AHBENR.
-//DS Page : 121 
-void pinDeInit(pinNo_t pinNo)
-{
-	RCC->AHBENR &=~(pinPort[PIN_PORT]);
-}
-
-
-void pinReset(pinNo_t pinNo)
-{
-
-}
-
-void pinHardwareInfo(pinNo_t pinNo)
-{
-	//TODO : define where to print anh woh to print	
-}
-
-void pinThrowError(pinErrors_t error)
-{
-	while(1);
-}

csl/stm32f042k6t6/implementation/imp_spi.c

@@ -1,161 +0,0 @@
-#include "spi.h"
-#include "hardwareDescription.h" 
-#include "hwd_spi.h"
-#include "interrupt.h"
-
-#define SPI_BASE	((SPI_TypeDef *)spiBase_Addr_List[spi_hw_ch])
-
-void spiReset(spiCH_t spi_hw_ch)
-{
-	if(spiBus_No[spi_hw_ch] == 1) {
-		RCC->APB1RSTR |= (1 << spiBus_Rst_bitPos[spi_hw_ch]);
-		RCC->APB1RSTR &= ~(1 << spiBus_Rst_bitPos[spi_hw_ch]);
-		return;
-	}
-		
-	RCC->APB2RSTR |= (1 << spiBus_Rst_bitPos[spi_hw_ch]);
-	RCC->APB2RSTR &= ~(1 << spiBus_Rst_bitPos[spi_hw_ch]);
-}
-
-void spiEnableBus(spiCH_t spi_hw_ch)
-{
-	if(spiBus_No[spi_hw_ch] == 1) {
-		RCC->APB1ENR |= (1 << spiBus_En_bitPos[spi_hw_ch]);
-		return;
-	}
-
-	RCC->APB2ENR |= (1 << spiBus_En_bitPos[spi_hw_ch]);
-}
-
-void spiEnable(spiCH_t spi_hw_ch)
-{
-	SPI_BASE->CR1 |= SPI_CR1_SPE;
-}
-
-void spiDissable(spiCH_t spi_hw_ch)
-{
-	// TODO: implement p.768 procedure for dissabling
-	//while(SPI_BASE->SR	
-	SPI_BASE->CR1 &= ~SPI_CR1_SPE;
-}
-
-void spiSetMode(spiCH_t spi_hw_ch, spi_mode_t mode)
-{
-	SPI_BASE->CR1 &= ~(mode << SPI_CR1_MSTR_Pos);
-	SPI_BASE->CR1 |= mode << SPI_CR1_MSTR_Pos;
-
-	// TODO: find out if this is the correct place to set the SSOE bit
-	SPI_BASE->CR2 &= ~SPI_CR2_SSOE;
-	if(mode == SPI_MASTER) {
-		SPI_BASE->CR2 |= SPI_CR2_SSOE;
-	}	
-}
-
-void spiSetPolarity(spiCH_t spi_hw_ch, spi_clkPol_t clkPol)
-{
-	// reset
-	SPI_BASE->CR1 &= ~SPI_CR1_CPOL;
-	// set
-	SPI_BASE->CR1 |= clkPol << SPI_CR1_CPOL_Pos;
-}
-
-void spiSetPhase(spiCH_t spi_hw_ch, spi_phase_t phase)
-{
-	// reset
-	SPI_BASE->CR1 &= ~(phase << SPI_CR1_CPHA_Pos);
-	// set
-	SPI_BASE->CR1 |= phase << SPI_CR1_CPHA_Pos;	
-}
-
-void spiSetBitFrameLength(spiCH_t spi_hw_ch, spi_framel_t framel)
-{
-
-	SPI_BASE->CR2 &= ~(SPI_CR2_FRXTH | SPI_CR2_DS);
-
-	// using p.974 as example
-	if(framel == SPI_FRAME_LENGTH_8BIT) {
-		// set FIFO reception threshold to 8 bit 
-		SPI_BASE->CR2 |= SPI_CR2_FRXTH;
-		// set transfer lwnght to 8 bit
-		SPI_BASE->CR2 |= SPI_CR2_DS_0 | SPI_CR2_DS_1 | SPI_CR2_DS_2;
-		return;
-	}
-	SPI_BASE->CR2 |= SPI_CR2_DS;
-}
-
-void spiSetFrameFormat(spiCH_t spi_hw_ch, spi_framef_t framef)
-{
-	// reset
-	SPI_BASE->CR1 &= ~SPI_CR1_LSBFIRST;
-	// set
-	SPI_BASE->CR1 |= framef << SPI_CR1_LSBFIRST_Pos;
-}
-
-spi_framef_t spiGetFrameFormat(spiCH_t spi_hw_ch)
-{
-	return (spi_framef_t)(SPI_BASE->CR1 & SPI_CR1_LSBFIRST) >> SPI_CR1_LSBFIRST_Pos;
-}
-
-void spiSetClockPrescaler(spiCH_t spi_hw_ch, uint32_t clkDiv)
-{
-	// reset
-	SPI_BASE->CR1 &= ~SPI_CR1_BR;
-	// set
-	SPI_BASE->CR1 |= (clkDiv << SPI_CR1_BR_Pos) & SPI_CR1_BR;
-}
-
-void spiSetComMode(spiCH_t spi_hw_ch, spi_comMode_t comMode)
-{
-	// reset
-	SPI_BASE->CR1 &= ~SPI_CR1_RXONLY;
-	// set
-	SPI_BASE->CR1 |= comMode << SPI_CR1_RXONLY_Pos;
-}
-
-void spiSetSoftwareSlaveManagement(spiCH_t spi_hw_ch, uint8_t logic)
-{
-	SPI_BASE->CR1 &= ~SPI_CR1_SSM;
-
-	if(logic){
-		SPI_BASE->CR1 |= SPI_CR1_SSM;
-	}
-}
-
-void spiSetInternalSlaveSelect(spiCH_t spi_hw_ch, uint8_t logic)
-{
-	SPI_BASE->CR1 &= ~SPI_CR1_SSI;
-	
-	if(logic) {
-		SPI_BASE->CR1 |= SPI_CR1_SSI;
-	}
-}
-
-uint8_t spiTrx8BitPolling(spiCH_t spi_hw_ch, uint8_t tx_data)
-{
-	// wait for BSY bit to Reset -> This will indicate that SPI is not busy in communication	
-	while (SPI_BASE->SR & SPI_SR_BSY);
-	
-	// from example code p.975 f
-	// this masking must be done. otherwise 16bits frame will be used
-	*(uint8_t*)&(SPI_BASE->DR) = tx_data;
-
-	// Wait for RXNE to set -> This will indicate that the Rx buffer is not empty
-	while (!(SPI_BASE->SR &SPI_SR_RXNE));  
-	
-
-	// TODO: test read!	
-	return *(uint8_t*)&(SPI_BASE->DR);
-}
-
-// Interrupt Service Routines
-
-void SPI1_IRQHandle()
-{
-	//HANDLE_INT_FLAG(SPI1->SR, );
-}
-
-void SPI2_IRQHandle()
-{
-	
-}
-

csl/stm32f042k6t6/implementation/imp_timer.c

@@ -1,380 +0,0 @@
-#include "timer.h"
-#include "interrupt.h"
-#include "hwd_interrupt.h"
-#include <stdlib.h>
-#define BASE ((TIM_TypeDef *)timerBase_Addr_List[timer])
-
-// debug notes: the makro works. what seems to not work is the indexing and calling the handler!
-
-static const uint32_t DIER_list[41] = {
-	TIM_DIER_BIE,// timer 1
-	TIM_DIER_UIE,
-	TIM_DIER_TIE,
-	TIM_DIER_COMIE,
-	TIM_DIER_CC1IE,
-	TIM_DIER_CC2IE,
-	TIM_DIER_CC3IE,
-	TIM_DIER_CC4IE,
-	TIM_DIER_UIE,// timer 2
-	TIM_DIER_CC1IE,
-	TIM_DIER_CC2IE,
-	TIM_DIER_CC3IE,
-	TIM_DIER_CC4IE,
-	TIM_DIER_TIE,
-	TIM_DIER_CC1IE,
-	TIM_DIER_CC2IE,
-	TIM_DIER_CC3IE,
-	TIM_DIER_CC4IE,
-	TIM_DIER_UIE, // timer 3
-	TIM_DIER_CC1IE,
-	TIM_DIER_CC2IE,
-	TIM_DIER_CC3IE,
-	TIM_DIER_CC4IE,
-	TIM_DIER_TIE,
-	TIM_DIER_CC1IE,
-	TIM_DIER_CC2IE,
-	TIM_DIER_CC3IE,
-	TIM_DIER_CC4IE,
-	TIM_DIER_CC1IE,// timer 14
-	TIM_DIER_CC1IE,
-	TIM_DIER_UIE,
-	TIM_DIER_CC1IE,// timer 16
-	TIM_DIER_BIE,
-	TIM_DIER_COMIE,
-	TIM_DIER_CC1IE,
-	TIM_DIER_UIE,
-	TIM_DIER_CC1IE,// timer 17
-	TIM_DIER_BIE,
-	TIM_DIER_COMIE,
-	TIM_DIER_CC1IE,
-	TIM_DIER_UIE
-};
-
-void timerReset(timerNo_t timer)
-{
-	if(timerBus_No[timer]==1)
-	{
-		RCC->APB1RSTR |= (1<<timerBus_Rst_bitPos[timer]); 	
-		RCC->APB1RSTR &=~ (1<<timerBus_Rst_bitPos[timer]); 	
-		return; 
-	}
-	RCC->APB2RSTR |= (1<<timerBus_Rst_bitPos[timer]); 	
-	RCC->APB2RSTR &=~ (1<<timerBus_Rst_bitPos[timer]); 	
-}
-
-void timerActivateBus(timerNo_t timer)
-{
-	if(timerBus_No[timer]==1)
-	{
-		RCC->APB1ENR |= (1<<timerBus_En_bitPos[timer]); 	
-		return;
-	}
-	RCC->APB2ENR |= (1<<timerBus_En_bitPos[timer]); 	
-}
- 
-void timerEnable(timerNo_t timer)
-{
-	BASE->CR1 |= TIM_CR1_CEN; //all the timers have the same CEN bit in CR1 register pos 0	
-}
-
-void timerDisable(timerNo_t timer)
-{
-	BASE->CR1 &=~ TIM_CR1_CEN; //all the timers have the same CEN bit in CR1 register pos 0	
-}
- 
-void timerSetMode(timerNo_t timer, timerMode_t mode)
-{
-	// Propably not needed	
-}
- 
-void timerSetCountDirection(timerNo_t timer, timerCountDirection_t direction)
-{
-	if(direction == upCounting)
-	{
-		BASE->CR1 &=~ TIM_CR1_DIR;	
-		return; 
-	}	 
-
-	BASE->CR1 |= TIM_CR1_DIR;	
-}
- 
-void timerSetPrescaler(timerNo_t timer, uint32_t prescaler)
-{
-	if(prescaler > timerRes_Prescaler[timer])
-	{
-		timerThrowError(prescalerOutOfRange);
-		return; // To prevent writing wrong value in to the Register
-	}
-	BASE->PSC = prescaler;
-}
- 
-void timerSetPostscaler(timerNo_t timer, uint32_t postscaler)
-{
-	timerThrowError(functionNotSupported);
-}
- 
-void timerSetAutoReload(timerNo_t timer, uint32_t reload)
-{
-	// TODO: implement error wen reload value exceeds the hardware register size (e.g. value > 16bit)
-	BASE->ARR = reload; 	
-}
- 
-void timerClearCounter(timerNo_t timer)
-{
-	BASE->CNT = 0; 	
-}
- 
-uint8_t timerGetUpdateInterrupt(timerNo_t timer)
-{
-	return (BASE->SR & 1);
-}	
-
-void timerClearUpdateInterrupt(timerNo_t timer)
-{
-	BASE->SR &= ~1;
-}	
-
-/* Second stage configuration */
-void timerInitCounter (	timerNo_t timer, 
-						uint32_t prescaler,
-						uint32_t autoReload, 
-						timerCountDirection_t direction)
-{
-	timerActivateBus(timer);
-	timerSetMode(timer, counter);
-	timerSetCountDirection(timer,direction);
-	timerSetPrescaler(timer, prescaler);
-	timerSetAutoReload(timer, autoReload);
-}
-
-void timerInitOutputCompare( timerNo_t timer, 
-						timerOutputCompareMode_t mode,
-						uint8_t timerIoChannel, 
-						pinNo_t pinNo, 
-						uint16_t altFunction,
-						uint8_t polarity,
-						uint32_t ccValue)
-{
-	timerStop(timer); 
-	pinSetMode(pinNo,alternate); 
-	pinSetAlternate(pinNo,altFunction); 
-	
-	// TODO: check for value existing register size
-	//if(ccValue)
-	//  timerThrowError(timerError_t error)
-	switch(timerIoChannel)
-	{
-		case 1: 
-			BASE->CCMR1 &= ~TIM_CCMR1_OC1M; 
-			BASE->CCMR1 |= mode << TIM_CCMR1_OC1M_Pos; 
-			BASE->CCER	|= TIM_CCER_CC1E;
-			BASE->CCER	|= (1&&polarity) << TIM_CCER_CC1P_Pos;
-			BASE->CCER	&= ~TIM_CCER_CC1NP;
-			BASE->CCR1 = (uint16_t)ccValue; 
-			break;
-		case 2: 
-			BASE->CCMR1 &= ~TIM_CCMR1_OC2M; 
-			BASE->CCMR1 |= mode << TIM_CCMR1_OC2M_Pos; 
-			BASE->CCER	|= TIM_CCER_CC2E;
-			BASE->CCER	|= (1&&polarity) << TIM_CCER_CC2P_Pos;
-			BASE->CCER	&= ~TIM_CCER_CC2NP;
-			BASE->CCR2 = (uint16_t)ccValue;
-			break;
-		case 3: 
-			BASE->CCMR2 &= ~TIM_CCMR2_OC3M; 
-			BASE->CCMR2 |= mode << TIM_CCMR2_OC3M_Pos; 
-			BASE->CCER	|= TIM_CCER_CC3E;
-			BASE->CCER	|= (1&&polarity) << TIM_CCER_CC3P_Pos;
-			BASE->CCER	&= ~TIM_CCER_CC3NP;
-			BASE->CCR3 = (uint16_t)ccValue; 
-			break;
-		case 4: 
-			BASE->CCMR2 &= ~TIM_CCMR2_OC4M; 
-			BASE->CCMR2 |= mode << TIM_CCMR2_OC4M_Pos; 
-			BASE->CCER	|= TIM_CCER_CC4E;
-			BASE->CCER	|= (1&&polarity) << TIM_CCER_CC4P_Pos;
-			BASE->CCER	&= ~TIM_CCER_CC4NP;
-			BASE->CCR4 = (uint16_t)ccValue; 
-			break;
-		default: 
-			timerThrowError(ccChannelNoOutOfRange);
-			break;
-	};	
-}
-
-void timerSetCounterCompareValue(timerNo_t timer,
-								 uint8_t timerIoChannel,
-								 uint32_t ccValue)
-{
-	switch(timerIoChannel) {
-		case 1: 
-			BASE->CCR1 = (uint16_t)ccValue; 
-			break;
-		case 2: 
-			BASE->CCR2 = (uint16_t)ccValue;
-			break;
-		case 3: 
-			BASE->CCR3 = (uint16_t)ccValue; 
-			break;
-		case 4: 
-			BASE->CCR4 = (uint16_t)ccValue; 
-			break;
-		default: 
-			timerThrowError(ccChannelNoOutOfRange);
-			break;
-	};	
-}	
-  
-
-/*			Bus Clock
- * ------------------------------ = Duty (Hz)
- *  (Prescaler-1) * (Period-1)
- */
-void timerSetHz(timerNo_t timer, uint16_t hz)
-{
-	uint32_t prescaler = 8000000;
-	uint32_t period = 0;
-	uint32_t temp = 0; 	
-	
-	do{
-		prescaler = prescaler / 10; 
-	}while(prescaler > 0xffff);
-	
-	
-	do{
-		period = period + 1; 
-		temp = 8000000/(prescaler*(period)); 
-	}while(temp >= hz);
-
-	timerSetPrescaler(timer, prescaler-1);
-	timerSetAutoReload(timer, period-1);
-	timerClearCounter(timer);
-}
- 
-void timerSetMs(timerNo_t timer, uint16_t ms)
-{
-	
-}
- 
-void timerSetNs(timerNo_t timer, uint16_t ns)
-{
-	
-}
- 
-void timerSetPs(timerNo_t timer, uint16_t ps)
-{
-	
-}
- 
-void timerStart(timerNo_t timer)
-{
-	timerEnable(timer);
-}
-
-void timerHalt(timerNo_t timer)
-{
-	timerDisable(timer);
-}
-
-void timerStop(timerNo_t timer)
-{
-	timerDisable(timer);
-	timerClearCounter(timer);
-}
-
-
-uint32_t timerGetCount(timerNo_t timer)
-{
-	return BASE->CNT;	
-}
-
-void timerEnableInterrupt(
-		timerNo_t timer,
-		intrType_t timerInterrupt)
-{
-	// check for the correct interrupt index
-	if(timerInterrupt < TIM1_BREAK) return;
-	if(timerInterrupt > TIM17_UPDATE) return;
-	// set the corresponding bit in the corresponding timers DIER register
-	BASE->DIER |= DIER_list[timerInterrupt - TIM1_BREAK];
-}
-
-void timerDissableInterrupt(
-		timerNo_t timer,
-		intrType_t timerInterrupt)
-{
-	// check for the correct interrupt index
-	if(timerInterrupt < TIM1_BREAK) return;
-	if(timerInterrupt >TIM17_UPDATE) return;
-	// set the corresponding bit in the corresponding timers DIER register
-	BASE->DIER &= ~DIER_list[timerInterrupt - TIM1_BREAK];
-}
-
-void timerThrowError(timerError_t error)
-{
-	while(1);	
-}
-// Interrupt service routines
-
-void TIM1_BRK_UP_TRG_COM_IRQHandler()
-{
-	HANDLE_INT_FLAG(TIM1->SR,TIM_SR_BIF,TIM1_BREAK);
-	HANDLE_INT_FLAG(TIM1->SR,TIM_SR_UIF,TIM1_UPDATE);
-	HANDLE_INT_FLAG(TIM1->SR,TIM_SR_TIF,TIM1_TRIGGER);
-	HANDLE_INT_FLAG(TIM1->SR,TIM_SR_COMIF,TIM1_COMMUNICATION);
-}
-
-void TIM1_CC_IRQHandler()
-{
-	HANDLE_INT_FLAG(TIM1->SR,TIM_SR_CC1IF,TIM1_COUNTERCOMPARE_1);
-	HANDLE_INT_FLAG(TIM1->SR,TIM_SR_CC2IF,TIM1_COUNTERCOMPARE_2);
-	HANDLE_INT_FLAG(TIM1->SR,TIM_SR_CC3IF,TIM1_COUNTERCOMPARE_3);
-	HANDLE_INT_FLAG(TIM1->SR,TIM_SR_CC4IF,TIM1_COUNTERCOMPARE_4);
-}
-
-void TIM2_IRQHandler()
-{
-	HANDLE_INT_FLAG(TIM2->SR,TIM_SR_UIF,TIM2_UPDATE);
-	HANDLE_INT_FLAG(TIM2->SR,TIM_SR_CC1IF,TIM2_COUNTERCOMPARE_1);
-	HANDLE_INT_FLAG(TIM2->SR,TIM_SR_CC2IF,TIM2_COUNTERCOMPARE_2);
-	HANDLE_INT_FLAG(TIM2->SR,TIM_SR_CC3IF,TIM2_COUNTERCOMPARE_3);
-	HANDLE_INT_FLAG(TIM2->SR,TIM_SR_CC4IF,TIM2_COUNTERCOMPARE_4);
-	HANDLE_INT_FLAG(TIM2->SR,TIM_SR_TIF,TIM2_TRIGGER);
-	HANDLE_INT_FLAG(TIM2->SR,TIM_SR_CC1OF,TIM2_CAPTURECOMPARE_1);
-	HANDLE_INT_FLAG(TIM2->SR,TIM_SR_CC2OF,TIM2_CAPTURECOMPARE_2);
-	HANDLE_INT_FLAG(TIM2->SR,TIM_SR_CC3OF,TIM2_CAPTURECOMPARE_3);
-	HANDLE_INT_FLAG(TIM2->SR,TIM_SR_CC4OF,TIM2_CAPTURECOMAPRE_4);
-}
-
-
-void TIM3_IRQHandler()
-{	
-	HANDLE_INT_FLAG(TIM3->SR,TIM_SR_UIF,TIM3_UPDATE);
-	HANDLE_INT_FLAG(TIM3->SR,TIM_SR_CC1IF,TIM3_COUNTERCOMPARE_1);
-	HANDLE_INT_FLAG(TIM3->SR,TIM_SR_CC2IF,TIM3_COUNTERCOMPARE_2);
-	HANDLE_INT_FLAG(TIM3->SR,TIM_SR_CC3IF,TIM3_COUNTERCOMPARE_3);
-	HANDLE_INT_FLAG(TIM3->SR,TIM_SR_CC4IF,TIM3_COUNTERCOMPARE_4);
-	HANDLE_INT_FLAG(TIM3->SR,TIM_SR_TIF,TIM3_TRIGGER);
-	HANDLE_INT_FLAG(TIM3->SR,TIM_SR_CC1OF,TIM3_CAPTURECOMPARE_1);
-	HANDLE_INT_FLAG(TIM3->SR,TIM_SR_CC2OF,TIM3_CAPTURECOMPARE_2);
-	HANDLE_INT_FLAG(TIM3->SR,TIM_SR_CC3OF,TIM3_CAPTURECOMPARE_3);
-	HANDLE_INT_FLAG(TIM3->SR,TIM_SR_CC4OF,TIM3_CAPTURECOMAPRE_4);
-}
-
-void TIM16_IRQHandler()
-{
-	HANDLE_INT_FLAG(TIM16->SR,TIM_SR_CC1OF,TIM16_CAPTURECOMPARE_1_OVERCAPTURE);
-	HANDLE_INT_FLAG(TIM16->SR,TIM_SR_BIF,TIM16_BREAK);
-	HANDLE_INT_FLAG(TIM16->SR,TIM_SR_COMIF,TIM16_COMMUNICATION);
-	HANDLE_INT_FLAG(TIM16->SR,TIM_SR_CC1IF,TIM16_CAPTURECOMPARE_1);
-	HANDLE_INT_FLAG(TIM16->SR,TIM_SR_UIF,TIM16_UPDATE);
-}
-
-void TIM17_IRQHandler()
-{
-	HANDLE_INT_FLAG(TIM17->SR,TIM_SR_CC1OF,TIM17_CAPTURECOMPARE_1_OVERCAPTURE);
-	HANDLE_INT_FLAG(TIM17->SR,TIM_SR_BIF,TIM17_BREAK);
-	HANDLE_INT_FLAG(TIM17->SR,TIM_SR_COMIF,TIM17_COMMUNICATION);
-	HANDLE_INT_FLAG(TIM17->SR,TIM_SR_CC1IF,TIM17_CAPTURECOMPARE_1);
-	HANDLE_INT_FLAG(TIM17->SR,TIM_SR_UIF,TIM17_UPDATE);
-}

csl/stm32f042k6t6/implementation/imp_usart.c

@@ -1,162 +0,0 @@
-/**
-  **************************************************************************************************
-  * @file		usart.c
-  * @author		Kerem Yollu & Edwin Koch
-  * @date		03.11.2021
-  * @version	0.4 Unstable
-  ************************************************************************************************** 
-  * @brief		Implementation of usart.h for the STM32F042K6 MCU
-  * 
-  * **Detailed Description :**
-  * 
-  * This source code uses bit manipulation in order to minimise the footprint of pin initialisation 
-  * and manipulation. It's based on the CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h Header file
-  * to get the obtain the right Registers. 
-  *
-  * @todo: 
-  *	- 04.11.21 check if the buad rate calcutation is working good for all awailable baud rates
-  *	- 04.11.21 Implment interrupts asap
-  *	- 04.11.21 Implment other functionalities as they are needed	
-  **************************************************************************************************
-*/
-
-#include "usart.h"
-#include "pin.h"
-
-
-#define SYST_CLK 8000000
-#define AF1 0x01
-
-#define USART_CHANNEL ((USART_TypeDef *)channel)
-
-
-void usartInit(	usartNo_t channel, 
-				pinNo_t pinTx, 
-				pinNo_t pinRx, 
-				uint32_t baud,
-				usartWordLength_t lenght, 
-				uint8_t parity, 
-				usartHwFlowCtrl_t flowCtrl)
-{
-	/* Configuring the pins for the uart*/ 
-	usartInitTx(pinTx);
-	usartInitRx(pinRx);
-		
-	//Enable the UART Module on the periferal bus this must be done before setting any register.
-	if(channel == usart2)
-	{
-		RCC->APB1ENR |= RCC_APB1ENR_USART2EN; 
-	}
-	else
-	{
-		RCC->APB2ENR |= RCC_APB2ENR_USART1EN; 
-	}
-
-		
-	USART_CHANNEL->CR1 = 0; // The = 0 is on purpose to set uart to default mode.    
-	USART_CHANNEL->CR2 = 0; // The = 0 is on purpose to set uart to default mode.    
-	USART_CHANNEL->CR3 = 0; // The = 0 is on purpose to set uart to default mode.   
-
-	
-	usartSetBaudRate(channel,baud);
-	usartSetWordLenght(channel, lenght);
-	usartSetHwFlowCtrl(channel, flowCtrl);
-
-	USART_CHANNEL->CR1 |= USART_CR1_TE; //Enbale trasnmit  
-	USART_CHANNEL->CR1 |= USART_CR1_RE; //Enable recieve
-	
-	//UART Enable shall allwas be at the end of configuration. 
-	USART_CHANNEL->CR1 |= USART_CR1_UE; 	
-}
-
-void usartInitTx(pinNo_t pinTx)
-{
-	//pinConfig(pinTx, alternate, def_stage, def_res, def_speed);
-	pinSetMode(pinTx,alternate); 
-	pinSetAlternate(pinTx, AF1);
-}	
-
-void usartInitRx(pinNo_t pinRx)
-{
-	//pinConfig(pinRx, alternate, def_stage, def_res, def_speed);
-	pinSetMode(pinRx,alternate); 
-	pinSetAlternate(pinRx, AF1);
-}	
-
-//this one is special as the register bist's don't follow eachother. 
-void usartSetWordLenght(usartNo_t channel, usartWordLength_t lenght)
-{
-	if(lenght == seven)
-	{
-		USART_CHANNEL->CR1 |= USART_CR1_M1; 	
-		USART_CHANNEL->CR1 &= ~USART_CR1_M0; 
-	}
-	else if (lenght == eight)
-	{
-		USART_CHANNEL->CR1 &= ~USART_CR1_M0; 
-		USART_CHANNEL->CR1 &= ~USART_CR1_M1; 	
-	}
-	else if(lenght == nine)
-	{
-		USART_CHANNEL->CR1 &= ~USART_CR1_M1; 	
-		USART_CHANNEL->CR1 |= USART_CR1_M0; 	
-	}
-}
-
-static uint16_t usartComputeBaudRate(uint32_t clk, uint32_t baud)
-{
-	//return((clk + (baud/2U))/baud);
-	return(clk/baud);
-}	
-
-void usartSetBaudRate(usartNo_t channel, uint32_t baud)	
-{
-	USART_CHANNEL->BRR = usartComputeBaudRate(SYST_CLK,baud); 
-}
-
-void usartSetHwFlowCtrl(usartNo_t channel, usartHwFlowCtrl_t flowCtrl)
-{
-	if(flowCtrl == noFlowControl)
-	{
-		USART_CHANNEL->CR3 &= ~USART_CR3_CTSE; 
-		USART_CHANNEL->CR3 &= ~USART_CR3_RTSE; 
-	}
-	else if(flowCtrl == cts)
-	{
-		USART_CHANNEL->CR3 |= USART_CR3_CTSE; 
-	}
-	else if(flowCtrl == rts)
-	{
-		USART_CHANNEL->CR3 |= USART_CR3_RTSE; 
-	}
-	else if(flowCtrl == ctsRts)
-	{
-		USART_CHANNEL->CR3 |= USART_CR3_CTSE; 
-		USART_CHANNEL->CR3 |= USART_CR3_RTSE; 
-	}
-}	
-
-void print_Usart(usartNo_t channel,char *ptr) 
-{
-	uint16_t len = 0; 
-	
-	while(ptr[len] != '\0')
-	{
-		usartSendChar(channel, ptr[len]);
-		len++;
-	}
-}
-
-void usartSendChar(usartNo_t channel, uint8_t ch)
-{
-	// Make sure that TX buffer is empty 
-	while(!(USART_CHANNEL->ISR & USART_ISR_TXE)){}
-	USART_CHANNEL->TDR = ch; 
-}
-
-uint8_t usartGetChar(usartNo_t channel)
-{
-	// Make sure that TX buffer is empty 
-	while(!(USART_CHANNEL->ISR & USART_ISR_RXNE)){}
-	return USART_CHANNEL->RDR; 
-}

csl/stm32f042k6t6/startup/STM32F042K6Tx_FLASH.ld

@@ -1,187 +0,0 @@
-/*
-******************************************************************************
-**
-
-**  File        : LinkerScript.ld
-**
-**  Author		: Auto-generated by System Workbench for STM32
-**
-**  Abstract    : Linker script for STM32F042K6Tx series
-**                32Kbytes FLASH and 6Kbytes RAM
-**
-**                Set heap size, stack size and stack location according
-**                to application requirements.
-**
-**                Set memory bank area and size if external memory is used.
-**
-**  Target      : STMicroelectronics STM32
-**
-**  Distribution: The file is distributed “as is,” without any warranty
-**                of any kind.
-**
-*****************************************************************************
-** @attention
-**
-** <h2><center>&copy; COPYRIGHT(c) 2019 STMicroelectronics</center></h2>
-**
-** Redistribution and use in source and binary forms, with or without modification,
-** are permitted provided that the following conditions are met:
-**   1. Redistributions of source code must retain the above copyright notice,
-**      this list of conditions and the following disclaimer.
-**   2. Redistributions in binary form must reproduce the above copyright notice,
-**      this list of conditions and the following disclaimer in the documentation
-**      and/or other materials provided with the distribution.
-**   3. Neither the name of STMicroelectronics nor the names of its contributors
-**      may be used to endorse or promote products derived from this software
-**      without specific prior written permission.
-**
-** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-**
-*****************************************************************************
-*/
-
-/* Entry Point */
-ENTRY(Reset_Handler)
-
-/* Highest address of the user mode stack */
-_estack = 0x20001800;    /* end of RAM */
-/* Generate a link error if heap and stack don't fit into RAM */
-_Min_Heap_Size = 0x200;      /* required amount of heap  */
-_Min_Stack_Size = 0x400; /* required amount of stack */
-
-/* Specify the memory areas */
-MEMORY
-{
-RAM (xrw)      : ORIGIN = 0x20000000, LENGTH = 6K
-FLASH (rx)      : ORIGIN = 0x8000000, LENGTH = 32K
-}
-
-/* Define output sections */
-SECTIONS
-{
-  /* The startup code goes first into FLASH */
-  .isr_vector :
-  {
-    . = ALIGN(4);
-    KEEP(*(.isr_vector)) /* Startup code */
-    . = ALIGN(4);
-  } >FLASH
-
-  /* The program code and other data goes into FLASH */
-  .text :
-  {
-    . = ALIGN(4);
-    *(.text)           /* .text sections (code) */
-    *(.text*)          /* .text* sections (code) */
-    *(.glue_7)         /* glue arm to thumb code */
-    *(.glue_7t)        /* glue thumb to arm code */
-    *(.eh_frame)
-
-    KEEP (*(.init))
-    KEEP (*(.fini))
-
-    . = ALIGN(4);
-    _etext = .;        /* define a global symbols at end of code */
-  } >FLASH
-
-  /* Constant data goes into FLASH */
-  .rodata :
-  {
-    . = ALIGN(4);
-    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
-    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
-    . = ALIGN(4);
-  } >FLASH
-
-  .ARM.extab   : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
-  .ARM : {
-    __exidx_start = .;
-    *(.ARM.exidx*)
-    __exidx_end = .;
-  } >FLASH
-
-  .preinit_array     :
-  {
-    PROVIDE_HIDDEN (__preinit_array_start = .);
-    KEEP (*(.preinit_array*))
-    PROVIDE_HIDDEN (__preinit_array_end = .);
-  } >FLASH
-  .init_array :
-  {
-    PROVIDE_HIDDEN (__init_array_start = .);
-    KEEP (*(SORT(.init_array.*)))
-    KEEP (*(.init_array*))
-    PROVIDE_HIDDEN (__init_array_end = .);
-  } >FLASH
-  .fini_array :
-  {
-    PROVIDE_HIDDEN (__fini_array_start = .);
-    KEEP (*(SORT(.fini_array.*)))
-    KEEP (*(.fini_array*))
-    PROVIDE_HIDDEN (__fini_array_end = .);
-  } >FLASH
-
-  /* used by the startup to initialize data */
-  _sidata = LOADADDR(.data);
-
-  /* Initialized data sections goes into RAM, load LMA copy after code */
-  .data : 
-  {
-    . = ALIGN(4);
-    _sdata = .;        /* create a global symbol at data start */
-    *(.data)           /* .data sections */
-    *(.data*)          /* .data* sections */
-
-    . = ALIGN(4);
-    _edata = .;        /* define a global symbol at data end */
-  } >RAM AT> FLASH
-
-  
-  /* Uninitialized data section */
-  . = ALIGN(4);
-  .bss :
-  {
-    /* This is used by the startup in order to initialize the .bss secion */
-    _sbss = .;         /* define a global symbol at bss start */
-    __bss_start__ = _sbss;
-    *(.bss)
-    *(.bss*)
-    *(COMMON)
-
-    . = ALIGN(4);
-    _ebss = .;         /* define a global symbol at bss end */
-    __bss_end__ = _ebss;
-  } >RAM
-
-  /* User_heap_stack section, used to check that there is enough RAM left */
-  ._user_heap_stack :
-  {
-    . = ALIGN(8);
-    PROVIDE ( end = . );
-    PROVIDE ( _end = . );
-    . = . + _Min_Heap_Size;
-    . = . + _Min_Stack_Size;
-    . = ALIGN(8);
-  } >RAM
-
-  
-
-  /* Remove information from the standard libraries */
-  /DISCARD/ :
-  {
-    libc.a ( * )
-    libm.a ( * )
-    libgcc.a ( * )
-  }
-
-  .ARM.attributes 0 : { *(.ARM.attributes) }
-}

csl/stm32f042k6t6/startup/startup_stm32f042x6.s

@@ -1,309 +0,0 @@
-/**
-  ******************************************************************************
-  * @file      startup_stm32f042x6.s
-  * @author    MCD Application Team
-  * @brief     STM32F042x4/STM32F042x6 devices vector table for GCC toolchain.
-  *            This module performs:
-  *                - Set the initial SP
-  *                - Set the initial PC == Reset_Handler,
-  *                - Set the vector table entries with the exceptions ISR address
-  *                - Branches to main in the C library (which eventually
-  *                  calls main()).
-  *            After Reset the Cortex-M0 processor is in Thread mode,
-  *            priority is Privileged, and the Stack is set to Main.
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
-  * All rights reserved.</center></h2>
-  *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
-  *
-  ******************************************************************************
-  */
-
-  .syntax unified
-  .cpu cortex-m0
-  .fpu softvfp
-  .thumb
-
-.global g_pfnVectors
-.global Default_Handler
-
-/* start address for the initialization values of the .data section.
-defined in linker script */
-.word _sidata
-/* start address for the .data section. defined in linker script */
-.word _sdata
-/* end address for the .data section. defined in linker script */
-.word _edata
-/* start address for the .bss section. defined in linker script */
-.word _sbss
-/* end address for the .bss section. defined in linker script */
-.word _ebss
-
-/**
- * @brief  This is the code that gets called when the processor first
- *          starts execution following a reset event. Only the absolutely
- *          necessary set is performed, after which the application
- *          supplied main() routine is called.
- * @param  None
- * @retval : None
-*/
-
-  .section .text.Reset_Handler
-  .weak Reset_Handler
-  .type Reset_Handler, %function
-Reset_Handler:
-  ldr   r0, =_estack
-  mov   sp, r0          /* set stack pointer */
-
-/*Check if boot space corresponds to test memory*/
- 
-    LDR R0,=0x00000004
-    LDR R1, [R0]
-    LSRS R1, R1, #24
-    LDR R2,=0x1F
-    CMP R1, R2
-    BNE ApplicationStart
-
- /*SYSCFG clock enable*/
-
-    LDR R0,=0x40021018
-    LDR R1,=0x00000001
-    STR R1, [R0]
-
-/*Set CFGR1 register with flash memory remap at address 0*/
-    LDR R0,=0x40010000
-    LDR R1,=0x00000000
-    STR R1, [R0]
-
-ApplicationStart:
-/* Copy the data segment initializers from flash to SRAM */
-  ldr r0, =_sdata
-  ldr r1, =_edata
-  ldr r2, =_sidata
-  movs r3, #0
-  b LoopCopyDataInit
-
-CopyDataInit:
-  ldr r4, [r2, r3]
-  str r4, [r0, r3]
-  adds r3, r3, #4
-
-LoopCopyDataInit:
-  adds r4, r0, r3
-  cmp r4, r1
-  bcc CopyDataInit
-  
-/* Zero fill the bss segment. */
-  ldr r2, =_sbss
-  ldr r4, =_ebss
-  movs r3, #0
-  b LoopFillZerobss
-
-FillZerobss:
-  str  r3, [r2]
-  adds r2, r2, #4
-
-LoopFillZerobss:
-  cmp r2, r4
-  bcc FillZerobss
-
-/* Call the clock system intitialization function.*/
-  bl  setupInit
-/* Call static constructors */
-  bl __libc_init_array
-/* Call the application's entry point.*/
-  bl main
-
-LoopForever:
-    b LoopForever
-
-
-.size Reset_Handler, .-Reset_Handler
-
-/**
- * @brief  This is the code that gets called when the processor receives an
- *         unexpected interrupt.  This simply enters an infinite loop, preserving
- *         the system state for examination by a debugger.
- *
- * @param  None
- * @retval : None
-*/
-    .section .text.Default_Handler,"ax",%progbits
-Default_Handler:
-Infinite_Loop:
-  b Infinite_Loop
-  .size Default_Handler, .-Default_Handler
-/******************************************************************************
-*
-* The minimal vector table for a Cortex M0.  Note that the proper constructs
-* must be placed on this to ensure that it ends up at physical address
-* 0x0000.0000.
-*
-******************************************************************************/
-   .section .isr_vector,"a",%progbits
-  .type g_pfnVectors, %object
-  .size g_pfnVectors, .-g_pfnVectors
-
-
-g_pfnVectors:
-  .word  _estack
-  .word  Reset_Handler
-  .word  NMI_Handler
-  .word  HardFault_Handler
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  0
-  .word  SVC_Handler
-  .word  0
-  .word  0
-  .word  PendSV_Handler
-  .word  SysTick_Handler
-  .word  WWDG_IRQHandler                   /* Window WatchDog              */
-  .word  PVD_VDDIO2_IRQHandler             /* PVD and VDDIO2 through EXTI Line detect */
-  .word  RTC_IRQHandler                    /* RTC through the EXTI line    */
-  .word  FLASH_IRQHandler                  /* FLASH                        */
-  .word  RCC_CRS_IRQHandler                /* RCC and CRS                  */
-  .word  EXTI0_1_IRQHandler                /* EXTI Line 0 and 1            */
-  .word  EXTI2_3_IRQHandler                /* EXTI Line 2 and 3            */
-  .word  EXTI4_15_IRQHandler               /* EXTI Line 4 to 15            */
-  .word  TSC_IRQHandler                    /* TSC                          */
-  .word  DMA1_Channel1_IRQHandler          /* DMA1 Channel 1               */
-  .word  DMA1_Channel2_3_IRQHandler        /* DMA1 Channel 2 and Channel 3 */
-  .word  DMA1_Channel4_5_IRQHandler        /* DMA1 Channel 4 and Channel 5 */
-  .word  ADC1_IRQHandler                   /* ADC1                         */
-  .word  TIM1_BRK_UP_TRG_COM_IRQHandler    /* TIM1 Break, Update, Trigger and Commutation */
-  .word  TIM1_CC_IRQHandler                /* TIM1 Capture Compare         */
-  .word  TIM2_IRQHandler                   /* TIM2                         */
-  .word  TIM3_IRQHandler                   /* TIM3                         */
-  .word  0                                 /* Reserved                     */
-  .word  0                                 /* Reserved                     */
-  .word  TIM14_IRQHandler                  /* TIM14                        */
-  .word  0                                 /* Reserved                     */
-  .word  TIM16_IRQHandler                  /* TIM16                        */
-  .word  TIM17_IRQHandler                  /* TIM17                        */
-  .word  I2C1_IRQHandler                   /* I2C1                         */
-  .word  0                                 /* Reserved                     */
-  .word  SPI1_IRQHandler                   /* SPI1                         */
-  .word  SPI2_IRQHandler                   /* SPI2                         */
-  .word  USART1_IRQHandler                 /* USART1                       */
-  .word  USART2_IRQHandler                 /* USART2                       */
-  .word  0                                 /* Reserved                     */
-  .word  CEC_CAN_IRQHandler                /* CEC and CAN                  */
-  .word  USB_IRQHandler                    /* USB                          */
-
-/*******************************************************************************
-*
-* Provide weak aliases for each Exception handler to the Default_Handler.
-* As they are weak aliases, any function with the same name will override
-* this definition.
-*
-*******************************************************************************/
-
-  .weak      NMI_Handler
-  .thumb_set NMI_Handler,Default_Handler
-
-  .weak      HardFault_Handler
-  .thumb_set HardFault_Handler,Default_Handler
-
-  .weak      SVC_Handler
-  .thumb_set SVC_Handler,Default_Handler
-
-  .weak      PendSV_Handler
-  .thumb_set PendSV_Handler,Default_Handler
-
-  .weak      SysTick_Handler
-  .thumb_set SysTick_Handler,Default_Handler
-
-  .weak      WWDG_IRQHandler
-  .thumb_set WWDG_IRQHandler,Default_Handler
-
-  .weak      PVD_VDDIO2_IRQHandler
-  .thumb_set PVD_VDDIO2_IRQHandler,Default_Handler
-
-  .weak      RTC_IRQHandler
-  .thumb_set RTC_IRQHandler,Default_Handler
-
-  .weak      FLASH_IRQHandler
-  .thumb_set FLASH_IRQHandler,Default_Handler
-
-  .weak      RCC_CRS_IRQHandler
-  .thumb_set RCC_CRS_IRQHandler,Default_Handler
-
-  .weak      EXTI0_1_IRQHandler
-  .thumb_set EXTI0_1_IRQHandler,Default_Handler
-
-  .weak      EXTI2_3_IRQHandler
-  .thumb_set EXTI2_3_IRQHandler,Default_Handler
-
-  .weak      EXTI4_15_IRQHandler
-  .thumb_set EXTI4_15_IRQHandler,Default_Handler
-
-  .weak      TSC_IRQHandler
-  .thumb_set TSC_IRQHandler,Default_Handler
-
-  .weak      DMA1_Channel1_IRQHandler
-  .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
-
-  .weak      DMA1_Channel2_3_IRQHandler
-  .thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler
-
-  .weak      DMA1_Channel4_5_IRQHandler
-  .thumb_set DMA1_Channel4_5_IRQHandler,Default_Handler
-
-  .weak      ADC1_IRQHandler
-  .thumb_set ADC1_IRQHandler,Default_Handler
-
-  .weak      TIM1_BRK_UP_TRG_COM_IRQHandler
-  .thumb_set TIM1_BRK_UP_TRG_COM_IRQHandler,Default_Handler
-
-  .weak      TIM1_CC_IRQHandler
-  .thumb_set TIM1_CC_IRQHandler,Default_Handler
-
-  .weak      TIM2_IRQHandler
-  .thumb_set TIM2_IRQHandler,Default_Handler
-
-  .weak      TIM3_IRQHandler
-  .thumb_set TIM3_IRQHandler,Default_Handler
-
-  .weak      TIM14_IRQHandler
-  .thumb_set TIM14_IRQHandler,Default_Handler
-
-  .weak      TIM16_IRQHandler
-  .thumb_set TIM16_IRQHandler,Default_Handler
-
-  .weak      TIM17_IRQHandler
-  .thumb_set TIM17_IRQHandler,Default_Handler
-
-  .weak      I2C1_IRQHandler
-  .thumb_set I2C1_IRQHandler,Default_Handler
-
-  .weak      SPI1_IRQHandler
-  .thumb_set SPI1_IRQHandler,Default_Handler
-
-  .weak      SPI2_IRQHandler
-  .thumb_set SPI2_IRQHandler,Default_Handler
-
-  .weak      USART1_IRQHandler
-  .thumb_set USART1_IRQHandler,Default_Handler
-
-  .weak      USART2_IRQHandler
-  .thumb_set USART2_IRQHandler,Default_Handler
-
-  .weak      CEC_CAN_IRQHandler
-  .thumb_set CEC_CAN_IRQHandler,Default_Handler
-
-  .weak      USB_IRQHandler
-  .thumb_set USB_IRQHandler,Default_Handler
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-

drivers/CMakeLists.txt

@@ -1 +0,0 @@
-set(DRIVERS_LIST lcd_oled max7219 max31865 ssd1306_i2c)

drivers/MCP4725/mcp4725.hpp

@@ -1,121 +0,0 @@
-#ifndef _MCP4725_HPP_
-#define _MCP4725_HPP_
-#include <stdint.h>
-#include <unistd.h>
-#include <functional>
-#include "../../interfaces/i2c.hpp"
-
-template <typename T>
-class MCP4725
-{
-	public:
-		//typedef std::function<void(uint8_t,uint8_t*,uint8_t)> i2c_write_n_t;
-		//typedef std::function<void(const uint8_t&,const uint8_t*,const uint8_t&)> i2c_write_n_t;
-		//typedef void(*i2c_write_n_t)(const uint8_t&, const uint8_t*, const uint8_t&);
-	
-		//typedef std::function<void(int)>i2c_write_n_t;
-		// address list
-		enum i2c_addr
-		{
-			addr_0x60 = 0b01100000,
-			addr_0x61 = addr_0x60 + 1,
-			addr_0x62 = addr_0x60 + 2,
-			addr_0x63 = addr_0x60 + 3,
-			addr_0x64 = addr_0x60 + 4,
-			addr_0x65 = addr_0x60 + 5,
-			addr_0x66 = addr_0x60 + 6,
-			addr_0x67 = addr_0x60 + 7
-		};
-
-		// power down impedance  modes
-		enum pwrd_md
-		{
-			normal = 0x04,
-			ohm_1k = 0x01,
-			ohm_100k = 0x02,
-			ohm_500k = 0x03
-		};
-
-		//using std::functional<uint8_t(uint8_t, uint8_t)> i2c_read_n_t;
-		//using i2c_write_n_t = std::functional<void(uint8_t, uint8_t*,uint8_t)>;
-		
-		/**
-		 * @brief Constructor of mcp4725 dac
-		 * 
-		 * @param power_down_mode pwrd_md power down mode
-		 * @param address i2c_addr i2c address of the dac
-		 * @param i2c_write i2c_write_n_t callback for i2c writ
-		 */
-
-		MCP4725(I2C<T>& i2c) :
-            power_down_mode(pwrd_md::normal),
-			address(addr_0x60),
-			i2c(i2c),
-			dac_value(0),
-			eeprom_value(0)
-        {
-            uint8_t temp[3];
-            this->dac_value = dac_value;
-            
-            temp[0] = cmd_write_dac | (power_down_mode << 1);
-            temp[1] = static_cast<uint8_t>(dac_value >> 4);
-            temp[2] = static_cast<uint8_t>(dac_value << 4);
-
-
-            i2c.writeBuffer(address, temp, 3);
-        }
-
-	//	~MCP4725();
-	
-
-
-		void operator=(uint16_t dac_value)
-        {
-            uint8_t temp[3];
-            this->dac_value = dac_value;
-            
-            temp[0] = cmd_write_dac | (power_down_mode << 1);
-            temp[1] = static_cast<uint8_t>(dac_value >> 4);
-            temp[2] = static_cast<uint8_t>(dac_value << 4);
-
-            i2c.writeBuffer(address, temp, 3);
-        }
-
-		void operator==(uint16_t dac_and_eeprom_value)
-        {
-            uint8_t temp[6];
-            dac_value = dac_and_eeprom_value;
-            eeprom_value = dac_value;
-
-            temp[0] = cmd_write_dac_and_eeprom | (power_down_mode << 1); 
-            temp[1] = static_cast<uint8_t>(dac_and_eeprom_value >> 4);
-            temp[2] = static_cast<uint8_t>(dac_and_eeprom_value << 4);
-            temp[3] = temp[0];
-            temp[4] = temp[1];
-            temp[5] = temp[2];
-            
-            i2c.writeBuffer(address, temp, 6);
-        }
-
-		//void set_power
-		
-
-	private:
-
-		enum commands_t
-		{
-			cmd_fast_mode = 0x00,
-			cmd_write_dac = 0x40,
-			cmd_write_dac_and_eeprom = 0x60
-		};
-
-		I2C<T>& i2c;
-
-		i2c_addr address;
-		pwrd_md power_down_mode;
-		uint16_t dac_value;
-		uint16_t eeprom_value;
-
-};
-
-#endif // _MCP4725_HPP_

drivers/README.md

@@ -1,96 +0,0 @@
-# Drivers
-## Description
-Drivers are the higher level of code provided by *KED*. It comes on top of the [Peripherals](https://git.keydev.me/kerem/KED/src/branch/master/peripherals) and alows the usage of comercially awailable IC's or moludes.
-
----
-## Please follow this guide to find out about the :  
-- [Structure](#structure)
-- [Usage](#usage)
-- [Creation](#creation)
-- [Modification](#modification)
-- [Credits](#credits)
-- [License](#license)
----
-
-## Structure
-##### The __driver__ folder has multiple elements inside :
- + CMakeLists.txt
-	+ where the DRIVERS_LIST is defined
- + Folders named after the driver that they respresent. Inside you will find:
-	+ Source file of the driver
-	+ Header file of the driver
- + This Readme file
----
-
-## Usage
-In the *CMakeLists.txt* you will find the decalarion of __DRIVERS_LIST__ list which contains the dirvers that are to be compiled.
-The *name* of the declared *driver* also defines the name of the driver's *folder*, *souce* file and *header* file.
-Once the driver is implemented correctly you can call the header of the driver from any soure of header file. 
-> exmaple for *ssd1306_i2c*
-~~~ C
-#include "ssd1306_i2c.h"
-~~~
-
-CMake will the automatically find the driver, compile it and implement it to the main projet as a submodule. 
-
----
-## Creation
-### Let's implement a driver named *ssd1306_i2c*
-#### First let's add *ssd1306_i2c* to the __DRIVERS_LIST__. 
-Open *CMakeLists.txt* with your favorite *text editor* and modifiy the line wehre __DRIVERS_LIST__ is defined.
-In which order the drivers are added to the list has no importance. 
-
-> Before adding *ssd1306_i2c*
-
-~~~ CMAKE 
-set(DRIVERS_LIST lcd_oled max7219 max31865) 
-~~~
-
-> After adding *ssd1306_i2c* the declaration of __DRIVERS_LIST__ should look like this
-
-~~~ CMAKE 
-set(DRIVERS_LIST lcd_oled max7219 max31865 ssd1306_i2c) 
-~~~
-
-#### Than we can create a folder with the same name
-~~~ bash 
-mkdir ssd1306_i2c
-~~~
-
-#### Inside the newly created folder add the *source* and *header* file with the same name as the driver
-In our case that means __ssd1306_i2c.c__ and __ssd1306_i2c.h__
-
-~~~ bash 
-touch ssd1306_i2c.c ssd1306_i2c.h
-~~~
-
-#### The final structure should look like this
-As you can see this folder also contains the datashhed for this driver. If you have any additional documentation like a datasheet or calculation sheet, feel free to add them here.
-
-~~~ bash
-└── ssd1306_i2c
-    ├── ssd1306_i2c.c
-    ├── ssd1306_i2c.h
-    └── SSD1306.pdf
-~~~
----
-## Modification
-You can modify each driver to your convinience but it can't be pushed again so please be careful during GIT transactions.
-You can also remove any driver from the complation by simply removing his declaration from the __DRIVERS_LIST__
-> Like so : 
-set(DRIVERS_LIST lcd_oled max7219 max31865 ~~ssd1306_i2c~~) 
-## How to Contribute
-Do you want to become a contibutor ? :
-How is Ked organised :
-Rules to write a Driver :
-
-## Credits
-
-Edwin Koch
-Kerem Yollu
-
-## License
-
-The last section of a high-quality README file is the license. This lets other developers know what they can and cannot do with your project. If you need help choosing a license, refer to [https://choosealicense.com/](https://choosealicense.com/).
-
----

drivers/lcd_oled/lcd_oled.c

@@ -1,357 +0,0 @@
-#include "lcd_oled.h"
-#include "ssd1306_i2c.h"
-
-i2c_t i2c_device =  {	I2C_CH_1,					/*!< The harware channel to be used	*/	
-						i2c_mode_master,			/*!< Master Mode */
-						0x00,						/*!< First and Main address of the device */ 
-						0x00,						/*!< Second address if dual addresse mode is configured	*/
-						i2c_address_count_single,	/*!< Single address */ 
-						i2c_address_size_7b,		/*!< 10 or 7 bit address size */
-						i2c_clk_speed_standart,		/*!< Bus Speed: standart */  
-						i2c_clk_stretching_disable,	/*!< Clock Streching disabeled */
-						i2c_wake_disabled};			/*!< Wake up condition : None */
-	
-
-#define pgm_read_byte(addr) (*(const uint8_t *)(addr))
-#define ssd1306_swap(a, b) { int16_t t = a; a = b; b = t; }
-#define ROTATION 0 // TODO: This shoudl be initiated at the function 
-
-uint8_t display_buffer[LCD_OLED_SIZE_X * LCD_OLED_SIZE_Y / 8] = {
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80,
-	0x80, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x80, 0x80, 0xC0, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x80, 0xC0, 0xE0, 0xF0, 0xF8, 0xFC, 0xF8, 0xE0, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x80, 0x80,
-	0x80, 0x80, 0x00, 0x80, 0x80, 0x00, 0x00, 0x00, 0x00, 0x80, 0x80, 0x80, 0x80, 0x80, 0x00, 0xFF,
-	0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, 0x80, 0x80, 0x00, 0x00,
-	0x80, 0xFF, 0xFF, 0x80, 0x80, 0x00, 0x80, 0x80, 0x00, 0x80, 0x80, 0x80, 0x80, 0x00, 0x80, 0x80,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x80, 0x00, 0x00, 0x8C, 0x8E, 0x84, 0x00, 0x00, 0x80, 0xF8,
-	0xF8, 0xF8, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0xF0, 0xF0, 0xF0, 0xF0, 0xF0, 0xF0, 0xF0, 0xF0, 0xF0, 0xF0, 0xF0, 0xF0, 0xE0, 0xE0, 0xC0, 0x80,
-	0x00, 0xE0, 0xFC, 0xFE, 0xFF, 0xFF, 0xFF, 0x7F, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFE, 0xFF, 0xC7, 0x01, 0x01,
-	0x01, 0x01, 0x83, 0xFF, 0xFF, 0x00, 0x00, 0x7C, 0xFE, 0xC7, 0x01, 0x01, 0x01, 0x01, 0x83, 0xFF,
-	0xFF, 0xFF, 0x00, 0x38, 0xFE, 0xC7, 0x83, 0x01, 0x01, 0x01, 0x83, 0xC7, 0xFF, 0xFF, 0x00, 0x00,
-	0x01, 0xFF, 0xFF, 0x01, 0x01, 0x00, 0xFF, 0xFF, 0x07, 0x01, 0x01, 0x01, 0x00, 0x00, 0x7F, 0xFF,
-	0x80, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x7F, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x01, 0xFF,
-	0xFF, 0xFF, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x03, 0x0F, 0x3F, 0x7F, 0x7F, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xE7, 0xC7, 0xC7, 0x8F,
-	0x8F, 0x9F, 0xBF, 0xFF, 0xFF, 0xC3, 0xC0, 0xF0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFC, 0xFC, 0xFC,
-	0xFC, 0xFC, 0xFC, 0xFC, 0xFC, 0xF8, 0xF8, 0xF0, 0xF0, 0xE0, 0xC0, 0x00, 0x01, 0x03, 0x03, 0x03,
-	0x03, 0x03, 0x01, 0x03, 0x03, 0x00, 0x00, 0x00, 0x00, 0x01, 0x03, 0x03, 0x03, 0x03, 0x01, 0x01,
-	0x03, 0x01, 0x00, 0x00, 0x00, 0x01, 0x03, 0x03, 0x03, 0x03, 0x01, 0x01, 0x03, 0x03, 0x00, 0x00,
-	0x00, 0x03, 0x03, 0x00, 0x00, 0x00, 0x03, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01,
-	0x03, 0x03, 0x03, 0x03, 0x03, 0x01, 0x00, 0x00, 0x00, 0x01, 0x03, 0x01, 0x00, 0x00, 0x00, 0x03,
-	0x03, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x80, 0xC0, 0xE0, 0xF0, 0xF9, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x3F, 0x1F, 0x0F,
-	0x87, 0xC7, 0xF7, 0xFF, 0xFF, 0x1F, 0x1F, 0x3D, 0xFC, 0xF8, 0xF8, 0xF8, 0xF8, 0x7C, 0x7D, 0xFF,
-	0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x7F, 0x3F, 0x0F, 0x07, 0x00, 0x30, 0x30, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0xFE, 0xFE, 0xFC, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE0, 0xC0, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x30, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0xC0, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x7F, 0x7F, 0x3F, 0x1F,
-	0x0F, 0x07, 0x1F, 0x7F, 0xFF, 0xFF, 0xF8, 0xF8, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFE, 0xF8, 0xE0,
-	0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFE, 0xFE, 0x00, 0x00,
-	0x00, 0xFC, 0xFE, 0xFC, 0x0C, 0x06, 0x06, 0x0E, 0xFC, 0xF8, 0x00, 0x00, 0xF0, 0xF8, 0x1C, 0x0E,
-	0x06, 0x06, 0x06, 0x0C, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0xFE, 0xFE, 0x00, 0x00, 0x00, 0x00, 0xFC,
-	0xFE, 0xFC, 0x00, 0x18, 0x3C, 0x7E, 0x66, 0xE6, 0xCE, 0x84, 0x00, 0x00, 0x06, 0xFF, 0xFF, 0x06,
-	0x06, 0xFC, 0xFE, 0xFC, 0x0C, 0x06, 0x06, 0x06, 0x00, 0x00, 0xFE, 0xFE, 0x00, 0x00, 0xC0, 0xF8,
-	0xFC, 0x4E, 0x46, 0x46, 0x46, 0x4E, 0x7C, 0x78, 0x40, 0x18, 0x3C, 0x76, 0xE6, 0xCE, 0xCC, 0x80,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x01, 0x07, 0x0F, 0x1F, 0x1F, 0x3F, 0x3F, 0x3F, 0x3F, 0x1F, 0x0F, 0x03,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x00, 0x00,
-	0x00, 0x0F, 0x0F, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x00, 0x00, 0x03, 0x07, 0x0E, 0x0C,
-	0x18, 0x18, 0x0C, 0x06, 0x0F, 0x0F, 0x0F, 0x00, 0x00, 0x01, 0x0F, 0x0E, 0x0C, 0x18, 0x0C, 0x0F,
-	0x07, 0x01, 0x00, 0x04, 0x0E, 0x0C, 0x18, 0x0C, 0x0F, 0x07, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x00,
-	0x00, 0x0F, 0x0F, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0F, 0x0F, 0x00, 0x00, 0x00, 0x07,
-	0x07, 0x0C, 0x0C, 0x18, 0x1C, 0x0C, 0x06, 0x06, 0x00, 0x04, 0x0E, 0x0C, 0x18, 0x0C, 0x0F, 0x07,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-};
-
-void lcd_oled_init(i2c_t *i2c_dev, uint8_t address) 
-{
-	
-	i2c_init(&i2c_device);
-	ssd1306_i2c_set_display_off(i2c_dev);
-	ssd1306_i2c_set_display_clkDiv_oscFreq(i2c_dev, 0, 15); // Working but to be refined
-	ssd1306_i2c_set_multiplex_ratio(i2c_dev, LCD_OLED_SIZE_Y - 1); // Pages start at 0 and ends at 63
-	ssd1306_i2c_set_display_offset(i2c_dev, 0x00);  // No Offset
-	ssd1306_i2c_set_display_start_line(i2c_dev, 0); // Start line 0 
-	ssd1306_i2c_set_chage_pump(i2c_dev, SSD1306_SWITCHCAPVCC);
-	ssd1306_i2c_set_memory_addressing_mode(i2c_dev, SSD1306_MEMORY_MODE_HORIZONTAL);
-	ssd1306_i2c_set_segment_remap(i2c_dev, 1);
-	ssd1306_i2c_set_com_scan_direction(i2c_dev, 0); //Decremental TODO : Make a define for it
-	ssd1306_i2c_set_com_pins(i2c_dev, SSD1306_COM_SEQ_LR_REMAP_ON);
-	ssd1306_i2c_set_contrast(i2c_dev,0x9F);
-	ssd1306_i2c_set_prechage_period(i2c_dev, 0xF0); // TODO : I don't know what he exxect is
-	ssd1306_i2c_set_com_deselect_level(i2c_dev, 0x40); // TODO : PLeanty of things can influance this capacitor value being the most importnat one
-	ssd1306_i2c_set_display_entire_on(i2c_dev, SSD1306_DISPLAYALLON_RESUME);
-	ssd1306_i2c_set_display_invert_pixel(i2c_dev, 0); // Normal pilex printing. Warning this hurts the eye
-	ssd1306_i2c_set_scroll(i2c_dev, 0);// Turn scrolling off
-	ssd1306_i2c_set_display_on(i2c_dev);
-}
-
-uint8_t lcd_oled_clear()
-{
-	memset(display_buffer, 0,(LCD_OLED_SIZE_X * LCD_OLED_SIZE_Y / 8) * sizeof(uint8_t));
-	return 1;
-}
-
-uint8_t lcd_oled_display()
-{
-	ssd1306_i2c_send_command(&i2c_device,SSD1306_COLUMNADDR);
-	ssd1306_i2c_send_command(&i2c_device,0);	// Column start address (0 = reset)
-	ssd1306_i2c_send_command(&i2c_device,LCD_OLED_SIZE_X - 1);	// Column end address (127 
-	// = reset)
-
-	ssd1306_i2c_send_command(&i2c_device,SSD1306_PAGEADDR);
-	ssd1306_i2c_send_command(&i2c_device,0);	// Page start address (0 = reset)
-	ssd1306_i2c_send_command(&i2c_device,7);	// Page end address
-
-	uint8_t i2cDataLenght = 1;	// Co = 0, D/C = 0
-	uint16_t address = SSD1306_I2C_ADDRESS;   	// Co = 0, D/C = 0
-	uint8_t reg = 0x40;	
-	// I2C
-	int16_t i;
-	for (i = 0; i < (LCD_OLED_SIZE_X * SSD1306_LCDHEIGHT / 8); i++) {
-		i2c_write(&i2c_device, &address, &reg, &display_buffer[i], &i2cDataLenght);
-		//This sends byte by byte. 
-		//Better to send all buffer
-		//Should be optimized
-	}
-/*
-	uint16_t i2cDataLenght = (LCD_OLED_SIZE_X * SSD1306_LCDHEIGHT / 8) -1 ;	// Co = 0, D/C = 0
-	uint16_t address = SSD1306_I2C_ADDRESS;   	// Co = 0, D/C = 0
-	uint8_t reg = 0x40;	
-	i2c_write(&i2c_device, &address, &reg, &display_buffer, &i2cDataLenght);
-	*/
-	return 1;
-}
-
-void lcd_oled_print_char(uint16_t x, uint16_t y, uint8_t c, uint8_t color)
-{
-	uint8_t size = 1; 
-	if ((x >= WIDTH) ||	// Clip right
-	    (y >= HEIGHT) ||	// Clip bottom
-	    ((x + 6 * size - 1) < 0) ||	// Clip left
-	    ((y + 8 * size - 1) < 0))	// Clip top
-		return;
-	int16_t i;
-	int16_t j;
-	for (i = 0; i < 6; i++) {
-		int16_t line;
-		if (i == 5)
-			line = 0x0;
-		else
-			line = (*(const uint8_t *)(font + (c * 5) + i));
-		for (j = 0; j < 8; j++) {
-			if (line & 0x1) {
-				if (size == 1)	// default size
-					lcd_oled_draw_pixel(x + i, y + j, color);
-				else {	// big size To implement
-					//ssd1306_fillRect(x + (i * size),
-					//		 y + (j * size), size,
-					//		 size, color);
-				}
-			}
-			line >>= 1;
-		}
-	}
-}
-
-void lcd_oled_draw_pixel(uint16_t x, uint16_t y, uint8_t color)
-{
-	if ((x < 0) || (x >= LCD_OLED_SIZE_X) || (y < 0) || (y >= LCD_OLED_SIZE_Y))
-		return;
-
-	// check rotation, move pixel around if necessary
-	switch (ROTATION) {
-	case 1:
-		ssd1306_swap(x, y);
-		x = LCD_OLED_SIZE_X - x - 1;
-		break;
-	case 2:
-		x = LCD_OLED_SIZE_X - x - 1;
-		y = LCD_OLED_SIZE_Y - y - 1;
-		break;
-	case 3:
-		ssd1306_swap(x, y);
-		y = LCD_OLED_SIZE_Y - y - 1;
-		break;
-	}
-
-	// x is which column
-	switch (color) {
-	case WHITE:
-		display_buffer[x + (y / 8) * LCD_OLED_SIZE_X] |= (1 << (y & 7));
-		break;
-	case BLACK:
-		display_buffer[x + (y / 8) * LCD_OLED_SIZE_X] &= ~(1 << (y & 7));
-		break;
-	case INVERSE:
-		display_buffer[x + (y / 8) * LCD_OLED_SIZE_X] ^= (1 << (y & 7));
-		break;
-	}
-}
-
-void lcd_oled_print_text(uint16_t x, uint16_t y, uint8_t *text, uint16_t length, uint8_t color)
-{
-	uint8_t pos, i = 0;
-	for (i = 0; i < length; i++)
-	{
-		pos = x + (i * 6);
-		lcd_oled_print_char(pos,y,text[i],color);
-	}
-}
-
-void lcd_oled_draw_line(uint16_t x, uint16_t y, uint16_t angle, uint16_t lenght, uint8_t color)
-{
-	int16_t i = 0; 
-
-	switch(angle)
-	{
-		case 0: 
-		case 360: 
-			for(i = 0; i < lenght; i++)
-			{
-				lcd_oled_draw_pixel(x+i,y,color);
-			}
-			break; 
-		case 45:
-			for(i = 0; i < lenght; i++)
-			{
-				lcd_oled_draw_pixel(x+i,y-i,color);
-			}
-			break; 
-		case 90:
-			for(i = 0; i < lenght; i++)
-			{
-				lcd_oled_draw_pixel(x,y-i,color);
-			}
-			break; 
-		case 135:
-			for(i = 0; i < lenght; i++)
-			{
-				lcd_oled_draw_pixel(x-i,y-i,color);
-			}
-			break; 
-		case 180:
-			for(i = 0; i < lenght; i++)
-			{
-				lcd_oled_draw_pixel(x-i,y,color);
-			}
-			break; 
-		case 225:
-			for(i = 0; i < lenght; i++)
-			{
-				lcd_oled_draw_pixel(x-i,y+i,color);
-			}
-			break; 
-		case 270:
-			for(i = 0; i < lenght; i++)
-			{
-				lcd_oled_draw_pixel(x,y+i,color);
-			}
-			break; 
-		case 315:
-			for(i = 0; i < lenght; i++)
-			{
-				lcd_oled_draw_pixel(x+i,y+i,color);
-			}
-			break; 
-	}
-}
-
-void lcd_oled_draw_circle(uint16_t x, uint16_t y, uint16_t radius, uint8_t fill, uint8_t color)
-{
-	uint8_t i = 0; 
-	int16_t x_cicle, y_circle, d = 0;
-	if(fill == 0)
-	{
-		x_cicle = 0;
-		y_circle = radius;
-		d = 3 - 2 * radius;
-		lcd_oled_draw_circle_bresenham(x, y, x_cicle, y_circle, color);
-		while (y_circle >= x_cicle)
-		{
-			x_cicle++;
-			if (d > 0)
-			{
-				y_circle--;
-				d = d + 4 * (x_cicle - y_circle) + 10;
-			}
-			else
-				d = d + 4 * x_cicle + 6;
-			lcd_oled_draw_circle_bresenham(x, y, x_cicle, y_circle, color);
-		}
-	}
-	else // To be optimized
-	{
-		for(i=radius; i > 0; i--)
-		{
-			x_cicle = 0; 
-			y_circle = i;
-			d = 3 - 2 * i;
-			lcd_oled_draw_circle_bresenham(x, y, x_cicle, y_circle, color);
-			while (y_circle >= x_cicle)
-			{
-				x_cicle++;
-				if (d > 0)
-				{
-					y_circle--;
-					d = d + 4 * (x_cicle - y_circle) + 10;
-				}
-				else
-					d = d + 4 * x_cicle + 6;
-				lcd_oled_draw_circle_bresenham(x, y, x_cicle, y_circle, color);
-			}
-		}
-	}
-}
-
-void lcd_oled_draw_circle_bresenham(int16_t xc, int16_t yc, uint8_t x, uint8_t y, uint8_t color)
-{
-    lcd_oled_draw_pixel(xc+x, yc+y, color);
-    lcd_oled_draw_pixel(xc-x, yc+y, color);
-    lcd_oled_draw_pixel(xc+x, yc-y, color);
-    lcd_oled_draw_pixel(xc-x, yc-y, color);
-    lcd_oled_draw_pixel(xc+y, yc+x, color);
-    lcd_oled_draw_pixel(xc-y, yc+x, color);
-    lcd_oled_draw_pixel(xc+y, yc-x, color);
-    lcd_oled_draw_pixel(xc-y, yc-x, color);
-}
-
-
-void lcd_oled_draw_rectangle(uint16_t x, uint16_t y, uint16_t length, uint16_t width, uint8_t fill, uint8_t color)
-{
-	uint16_t i = 0;
-	if(fill == EMPTY)
-	{
-		lcd_oled_draw_line(x, y, 0, length, color);
-		lcd_oled_draw_line(x, y+width-1, 0, length, color);
-		lcd_oled_draw_line(x, y, 270, width, color);
-		lcd_oled_draw_line(x+length-1, y, 270, width, color);
-	}
-	else
-	{
-		for(i=0 ; i < width; i++)
-		{
-			lcd_oled_draw_line(x, y+i, 0, length, color);
-		}
-	}
-}

drivers/lcd_oled/lcd_oled.h

@@ -1,78 +0,0 @@
-#ifndef _LCD_OLED_H_
-#define _LCD_OLED_H_
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include <stdint.h>
-#include <string.h>
-#include "oled_fonts.h"
-
-#define FILLED 1
-#define EMPTY 0
-
-#define LCD_OLED_I2C
-
-#define LCD_OLED_SIZE_X 128
-#define LCD_OLED_SIZE_Y 64
-
-#if defined LCD_OLED_I2C
-#include "i2c.h"
-void lcd_oled_init(i2c_t *i2c_dev, uint8_t address); 
-
-#elif defined LCD_OLED_SPI
-#include "spi.h"
-void lcd_oled_init(spi_t *spi_dev, pinNo_t pinNo, uint8_t address); 
-
-#else
-	#error "Please Define The communication Methode in ked/drivers/lcd_oled/lcd_oled.h"
-#endif
-
-
-
-void lcd_oled_enable();
-void lcd_oled_disable();
-
-void lcd_oled_reset_hard();
-void lcd_oled_reset_soft();
-
-uint8_t lcd_oled_is_ready();
-
-void lcd_oled_sleep();
-void lcd_oled_wake();
-
-void lcd_oled_draw_pixel(uint16_t x, uint16_t y, uint8_t color); 
-void lcd_oled_draw_line(uint16_t x, uint16_t y, uint16_t angle, uint16_t lenght, uint8_t color); 
-void lcd_oled_draw_rectangle(uint16_t x, uint16_t y, uint16_t length, uint16_t width, uint8_t fill, uint8_t color);
-void lcd_oled_draw_circle(uint16_t x, uint16_t y, uint16_t radius, uint8_t fill, uint8_t color); 
-void lcd_oled_draw_circle_bresenham(int16_t xc, int16_t yc, uint8_t x, uint8_t y, uint8_t color);
-
-void lcd_oled_scroll_right(uint16_t start, uint16_t stop);
-void lcd_oled_scroll_left(uint16_t start, uint16_t stop);
-
-void lcd_oled_scroll_up(uint16_t start, uint16_t stop);
-void lcd_oled_scroll_down(uint16_t start, uint16_t stop);
-
-void lcd_oled_set_font(uint8_t *font, uint8_t size, uint8_t spacing); 
-void lcd_oled_print_char(uint16_t x, uint16_t y, uint8_t c, uint8_t color); 
-void lcd_oled_print_text(uint16_t x, uint16_t y, uint8_t *text, uint16_t length, uint8_t color);
-void lcd_oled_print_cursor(uint8_t blink); 
-
-void lcd_oled_goto_pos(uint16_t x, uint16_t y);
-
-uint8_t lcd_oled_display();
-uint8_t lcd_oled_clear();
-
-void lcd_oled_change_brightness(uint8_t brightness); 
-void lcd_oled_change_contrast(uint8_t contrast); 
-
-void lcd_oled_rotate(uint8_t angle); 
-void lcd_oled_inverse(uint8_t yseNo); 
-void lcd_oled_invert(uint8_t yseNo); 
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* _LCD_OLED_H_ */

drivers/max31865/max31865.c

@@ -1,217 +0,0 @@
-/*
-MIT License
-
-Copyright (c) 2019 Edwin Koch
-
-Permission is hereby granted, free of charge, to any person obtaining a copy
-of this software and associated documentation files (the "Software"), to deal
-in the Software without restriction, including without limitation the rights
-to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
-copies of the Software, and to permit persons to whom the Software is
-furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice shall be included in all
-copies or substantial portions of the Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
-AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
-LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
-OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
-SOFTWARE.
-*/ 
-
-#include "max31865.h"
-
-enum REG{
-    REG_READ_CONFIGURATION = 0x00,
-    REG_READ_RTD_MSB,
-    REG_READ_RTD_LSB,
-    REG_READ_HIGH_FAULT_TH_MSB,
-    REG_READ_HIGH_FAULT_TH_LSB,
-    REG_READ_LOW_FAULT_TH_MSB,
-    REG_READ_LOW_FAULT_TH_LSB,
-    REG_READ_FAULT_STATUS,
-    REG_WRITE_CONFIGURATION = 0x80,
-    REG_WRITE_HIGH_FAULT_TH_MSB = 0x83,
-    REG_WRITE_HIGH_FAULT_TH_LSB,
-    REG_WRITE_LOW_FAULT_TH_MSB,
-    REG_WRITE_LOW_FAULT_TH_LSB
-};
-
-enum {
-    D0 = 0x01,
-    D1 = 0x02,
-    D2 = 0x04,
-    D3 = 0x08,
-    D4 = 0x10,
-    D5 = 0x20,
-    D6 = 0x40,
-    D7 = 0x80
-};
-
-// temperature curve polynomial approximation coefficients
-static const float a1 = 2.55865721669;
-static const float a2 = 0.000967360412;
-static const float a3 = 0.000000731467;
-static const float a4 = 0.000000000691; 
-static const float a5 = 7.31888555389e-13;
-
-void _handle_threshold_fault(const max31865_t* device);
-
-
-void max31865_init(
-		max31865_t*  device,
-        spi_ch_t *spi_ch,          
-        fptr_t charged_time_delay_cb,
-        fptr_t conversion_timer_deay_cb,
-        fptr_t highFaultThreshold_callback,
-        fptr_t lowFaultThreshold_callback,
-        uint16_t rtd_ohm,
-        uint16_t rref_ohm,
-        uint16_t lowerFaulThreshold,
-        uint16_t higherFaultThreshold,
-        uint8_t logic_wire_3,
-        uint8_t logic_filter_50Hz)
-{
-    uint8_t buff[4];
-    uint8_t temp = 0;
-    uint16_t temp_1 = 0;
-
-    // object setup
-    device->spiCH = spi_ch;
-	device->charged_time_delay = charged_time_delay_cb;
-    device->conversion_timer_deay = conversion_timer_deay_cb;
-    device->highFaultThreshold_cb =  highFaultThreshold_callback;
-    device->lowFaultThreshold_cb = lowFaultThreshold_callback;
-    device->rtd = rtd_ohm;
-    device->rref = rref_ohm;
-    device->lowFaultThreshold = lowerFaulThreshold << 1;
-    device->highFaultThreshold = higherFaultThreshold << 1;
-    // settup configurations + set a fault status
-    device->configReg = (uint8_t)((logic_wire_3) ? (1 << 4):(0) |
-				(logic_filter_50Hz) ? (0x01) : (0));
-
-    // low and high fault threshold setup
-    temp_1 = device->highFaultThreshold;
-    buff[0] = (uint8_t)(temp_1 >> 8);
-    buff[1] = (uint8_t)(temp_1);
-    temp_1 = device->lowFaultThreshold;
-    buff[2] = (uint8_t)(temp_1 >> 8);
-    buff[3] = (uint8_t)(temp_1);
-
-    temp = device->configReg;
-	spiWriteReg(device->spiCH,REG_WRITE_CONFIGURATION, temp);
-	spiWriteBlock(device->spiCH, REG_WRITE_HIGH_FAULT_TH_MSB, buff,4);
-}
-
-uint16_t max31865_readADC(const max31865_t* device)
-{
-    uint8_t buff[2] = {0,0};
-    uint8_t temp = 0;
-    // turn on vbias
-    temp = device->configReg | D7;
-    spiWriteReg(device->spiCH, REG_WRITE_CONFIGURATION,temp);
-
-    device->charged_time_delay();
-
-    // initiate 1-shot conversion + vbias
-    temp = device->configReg | 0xA0;
-	spiWriteReg(device->spiCH, REG_WRITE_CONFIGURATION,temp);
-
-    device->conversion_timer_deay();
-
-	spiAutoReadBlock(device->spiCH, REG_READ_RTD_MSB, buff, 2);
-
-    // turn off vbias
-	spiWriteReg(device->spiCH, REG_WRITE_CONFIGURATION, device->configReg);
-
-
-    if(buff[1] & 0x01)  {
-        _handle_threshold_fault(device);
-    }
-
-    return ((uint16_t)((buff[0]<<8) | (buff[1] >> 1)) );
-}
-
-float max31865_readRTD_ohm(const max31865_t* device)
-{
-    return (((float)(max31865_readADC(device)) * (float)(device->rref))  / 32768.0);
-}
-
-float max31865_readCelsius(const max31865_t* device)
-{
-    float x = (float)(device->rtd) - max31865_readRTD_ohm(device);
-    // return celsius calculated with the help of the horners method
-    // reduces needed multiplications and additions
-    return -(x * (a1 + x * (a2 + x * (a3 + x * (a4 + x * a5)))));
-}
-
-float max31865_readKelvin(const max31865_t* device)
-{
-    return max31865_readCelsius(device) + 273.15;
-}
-
-void max31865_setHighFaultThreshold(max31865_t* device,
-                                    uint16_t    threshold)
-{
-    uint8_t buff[2];
-
-    device->highFaultThreshold = threshold;
-    threshold = threshold << 1;
-    buff[0] = (uint8_t)(threshold >> 8);
-    buff[1] = (uint8_t)(threshold);
-	spiWriteBlock(device->spiCH, REG_WRITE_HIGH_FAULT_TH_MSB,buff,2);
-}
-
-void max31865_setLowFaultThreshold(max31865_t*  device,
-                                   uint16_t     threshold)
-{
-    uint8_t buff[2];
-
-    device->lowFaultThreshold = threshold;
-    threshold = threshold << 1;
-    buff[0] = (uint8_t)(threshold >> 8);
-    buff[1] = (uint8_t)(threshold);
-	spiWriteBlock(device->spiCH, REG_WRITE_LOW_FAULT_TH_MSB,buff,2);
-}
-
-int8_t max31865_checkThresholdFault(const max31865_t* device)
-{
-    uint8_t buff;
-	buff = spiReadReg(device->spiCH, REG_READ_FAULT_STATUS);
-
-    if(buff & max31865_err_RTD_HIGH_THRESHOLD) return 1;
-    if(buff & max31865_err_RTD_LOW_THRESHOLD) return -1;
-
-    // no fault
-    return 0;
-}
-
-uint8_t max31865_readFault(const max31865_t* device)
-{
-    return spiReadReg(device->spiCH, REG_READ_FAULT_STATUS);
-}
-
-void max31865_clearFault(const max31865_t* device)
-{
-    uint8_t temp = (device->configReg | D1);
-    spiWriteReg(device->spiCH, REG_WRITE_CONFIGURATION, temp);
-}
-
-void _handle_threshold_fault(const max31865_t* device)
-{
-    switch(max31865_readFault(device))
-    {
-    case max31865_err_RTD_HIGH_THRESHOLD:
-        device->highFaultThreshold_cb();
-        break;
-    case max31865_err_RTD_LOW_THRESHOLD:
-        device->lowFaultThreshold_cb();
-        break;
-    default:
-        break;
-    }
-    max31865_clearFault(device);
-}

drivers/max31865/max31865.h

@@ -1,97 +0,0 @@
-/*
-MIT License
-
-Copyright (c) 2019 Edwin Koch
-
-Permission is hereby granted, free of charge, to any person obtaining a copy
-of this software and associated documentation files (the "Software"), to deal
-in the Software without restriction, including without limitation the rights
-to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
-copies of the Software, and to permit persons to whom the Software is
-furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice shall be included in all
-copies or substantial portions of the Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
-AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
-LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
-OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
-SOFTWARE.
-*/
-
-#ifndef MAX31865_H_
-#define MAX31865_H_
-
-#include <stdint.h>
-#include "pin.h"
-#include "spi.h"
-
-typedef void (*fptr_t)(void);
-typedef uint8_t (*u8_fptr_u8_t)(uint8_t);
-
-typedef enum{
-    max31865_err_VOLTAGE_FAULT = 0x04,
-    max31865_err_VRTDIN_TO_LOW = 0x08,
-    max31865_err_VREFIN_TO_LOW = 0x10,
-    max31865_err_VREFIN_TO_HIGH = 0x20,
-    max31865_err_RTD_LOW_THRESHOLD = 0x40,
-    max31865_err_RTD_HIGH_THRESHOLD = 0x80
-}max31865_err_t;
-
-typedef struct{
-    spi_ch_t *spiCH;
-	fptr_t charged_time_delay;
-    fptr_t conversion_timer_deay;
-    fptr_t highFaultThreshold_cb;
-    fptr_t lowFaultThreshold_cb;
-    uint16_t rtd;
-    uint16_t rref;
-    uint16_t lowFaultThreshold;
-    uint16_t highFaultThreshold;
-    uint8_t configReg;
-}max31865_t;
-
-void max31865_init(
-		max31865_t*  device,
-        spi_ch_t *spi_ch,          
-        fptr_t charged_time_delay_cb,
-        fptr_t conversion_timer_deay_cb,
-        fptr_t highFaultThreshold_callback,
-        fptr_t lowFaultThreshold_callback,
-        uint16_t rtd_ohm,
-        uint16_t rref_ohm,
-        uint16_t lowerFaulThreshold,
-        uint16_t higherFaultThreshold,
-        uint8_t logic_wire_3,
-        uint8_t logic_filter_50Hz);
-
-uint16_t max31865_readADC(
-		const max31865_t *device);
-
-float max31865_readRTD_ohm(
-		const max31865_t *device);
-
-float max31865_readCelsius(
-		const max31865_t *device);
-
-void max31865_setHighFaultThreshold(
-		max31865_t *device,
-        uint16_t hreshold);
-
-void max31865_setLowFaultThreshold(
-		max31865_t *device,
-        uint16_t threshold);
-
-int8_t max31865_checkThresholdFault(
-		const max31865_t *device);
-
-uint8_t max31865_readFault(
-		const max31865_t *device);
-
-void max31865_clearFault(
-		const max31865_t *device);
-
-#endif /* MAX31865_H_ */

drivers/max7219/max7219.c

@@ -1,124 +0,0 @@
-#include "max7219.h"
-
-void max7219_init(
-		max7219_t *display,
-		spi_ch_t *spi_ch)
-{
-	display->spiCH = spi_ch;
-}
-
-void max7219_testDisplay(
-		max7219_t *display,
-		uint8_t logic)
-{
-	spiWriteReg(display->spiCH,0x0F, (logic) ? 0x01 : 0x00);
-}
-
-void max7219_shutdownDiaply(
-		max7219_t *display,
-		uint8_t logic)
-{
-	spiWriteReg(display->spiCH,0x0C, (logic) ? 0x00 : 0x01);
-}
-
-void max7219_setDecodeMode(
-		max7219_t *display,
-		max7219_decodeMode_t dmode)
-{
-	spiWriteReg(display->spiCH,0x09,(uint8_t) dmode);
-}
-
-void max7219_setIntensity(
-		max7219_t *display,
-		uint8_t intensity)
-{
-	spiWriteReg(display->spiCH, 0x0A, intensity & 0x0F);
-}
-		
-void max7219_setScanLimit(
-		max7219_t *display,
-		max7219_scanLimit_t slimit)
-{
-	spiWriteReg(display->spiCH, 0x0B, ((uint8_t) slimit) & 0x0F);
-}
-
-void max7219_setAllLEDsOff(
-		max7219_t *display)
-{
-	uint8_t i;
-	for(i = 0; i < 9; i++) {
-		spiWriteReg(display->spiCH, i, 0x00);
-	}
-}
-
-void max7219_ledMatrixSetLED(
-		max7219_t *display,
-		uint8_t row,
-		uint8_t col)
-{
-
-	//uint8_t val = 0xAE; // Unused variable warning commented by KeY
-
-	row = (row & 0x07) + 1;
-	col = 1 << (col & 0x07);
-
-	spiWriteReg(display->spiCH, row,col);
-}
-
-void max7219_rawWrite(
-		max7219_t *display,
-		uint8_t reg,
-		uint8_t data)
-{
-	spiWriteReg(display->spiCH, reg, data);
-}
-
-void max7219_printLedMatrix(
-		max7219_t *display,
-		uint8_t matrix[])
-{
-	uint8_t i = 0;
-
-	for(i = 0; i < 8; i ++) {
-		spiWriteReg(display->spiCH, i+1, matrix[i]);
-	}
-}
-
-void max7219_ledMatrixUnsetLED(
-		max7219_t *display,
-		uint8_t row,
-		uint8_t col)
-{
-	row = (row & 0x07) + 1;
-	col = 1 << (col & 0x07);
-	// TODO: find out how to turn off LED
-	spiWriteReg(display->spiCH, row,col+1);
-}
-
-#if 0
-
-// daysichained matrix
-typedef struct{
-	spi_ch_t *spiCH;
-	uint8_t nDevices;
-}max7219_dm_t;
-
-
-void max7219_dm_write(
-		max7219_dm_t *matrix,
-		uint8_t **data)
-{
-	uint8_t i = 0;
-	uint8_t j = 0;
-	// TODO: Test it out
-	for(i = 0; i < 8; i++) {
-		pinWrite(matrix->spiCH->pin, 0);
-		for(j = 0; j < matrix->nDevices; j++) {
-			spiTrx8BitPolling(matrix->spiCH->spi, i+1); // reg
-			spiTrx8BitPolling(matrix->spiCH->spi, data[j][i]);
-		}
-		pinWrite(matrix->spiCH->pin, 1);
-	}
-}
-#endif
-

drivers/max7219/max7219.h

@@ -1,111 +0,0 @@
-/**
-  **************************************************************************************************
-  * @file		max7219.h
-  * @author		Kerem Yollu & Edwin Koch
-  * @date		25.08.2022
-  * @version	1.0
-  ************************************************************************************************** 
-  * @brief	
-  *				
-  * **Detailed Description :**
-  *
-  * @todo 
-  **************************************************************************************************
-*/
-
-#ifndef _MAX7219_H_
-#define _MAX7219_H_
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include <stdint.h>
-#include "spi.h"
-#include "pin.h"
-
-typedef enum{
-	NO_DECODE_DIGIT_7_TO_0 = 0x00,
-	CODE_B_DECODE_ONLY_DIGIT_0 = 0x01,
-	CODE_B_DECODE_ONLY_DIGIT_3_TO_0 = 0x0F,
-	CODE_B_DECOD_DIGIT_7_TO_0 = 0xFF
-}max7219_decodeMode_t;
-
-typedef enum{
-	DISPLAY_DIGIT_0 = 0x00,
-	DISPLAY_DIGIT_1_TO_0 = 0x01,
-	DSIPLAX_DIGIT_2_TO_0 = 0x02,
-	DSIPLAX_DIGIT_3_TO_0 = 0x03,
-	DSIPLAX_DIGIT_4_TO_0 = 0x04,
-	DSIPLAX_DIGIT_5_TO_0 = 0x05,
-	DSIPLAX_DIGIT_6_TO_0 = 0x06,
-	DSIPLAX_DIGIT_7_TO_0 = 0x07
-}max7219_scanLimit_t;
-
-typedef struct{
-	spi_ch_t *spiCH;
-}max7219_t;
-
-void max7219_init(
-		max7219_t *display,
-		spi_ch_t *spi_ch);
-
-void max7219_testDisplay(
-		max7219_t *display,
-		uint8_t logic);
-
-void max7219_shutdownDiaply(
-		max7219_t *display,
-		uint8_t logic);
-
-void max7219_setDecodeMode(
-		max7219_t *display,
-		max7219_decodeMode_t dmode);
-
-void max7219_setIntensity(
-		max7219_t *display,
-		uint8_t intensity);
-		
-void max7219_setScanLimit(
-		max7219_t *display,
-		max7219_scanLimit_t slimit);
-
-void max7219_setAllLEDsOff(
-		max7219_t *display);
-
-void max7219_ledMatrixSetLED(
-		max7219_t *display,
-		uint8_t row,
-		uint8_t col);
-
-void max7219_rawWrite(
-		max7219_t *display,
-		uint8_t reg,
-		uint8_t data);
-
-void max7219_printLedMatrix(
-		max7219_t *display,
-		uint8_t matrix[]);
-
-void max7219_ledMatrixUnsetLED(
-		max7219_t *display,
-		uint8_t row,
-		uint8_t col);
-#if 0
-// daysichained matrix
-typedef struct{
-	spi_ch_t *spiCH;
-	uint8_t nDevices;
-}max7219_dm_t;
-
-
-void max7219_dm_write(
-		max7219_dm_t *matrix,
-		uint8_t **data);
-#endif
-
-#ifdef _cplusplus
-}
-#endif
-
-#endif // _MAX7219_H_

drivers/max7219/new_max7219.c

@@ -1,126 +0,0 @@
-#include "max7219.h"
-
-void max7219_init(
-		max7219_t *display,
-		spi_ch_t *spi_ch)
-{
-	display->spiCH = spi_ch;
-}
-
-void h
-
-void max7219_testDisplay(
-		max7219_t *display,
-		uint8_t logic)
-{
-	spiWriteReg(display->spiCH,0x0F, (logic) ? 0x01 : 0x00);
-}
-
-void max7219_shutdownDiaply(
-		max7219_t *display,
-		uint8_t logic)
-{
-	spiWriteReg(display->spiCH,0x0C, (logic) ? 0x00 : 0x01);
-}
-
-void max7219_setDecodeMode(
-		max7219_t *display,
-		max7219_decodeMode_t dmode)
-{
-	spiWriteReg(display->spiCH,0x09,(uint8_t) dmode);
-}
-
-void max7219_setIntensity(
-		max7219_t *display,
-		uint8_t intensity)
-{
-	spiWriteReg(display->spiCH, 0x0A, intensity & 0x0F);
-}
-		
-void max7219_setScanLimit(
-		max7219_t *display,
-		max7219_scanLimit_t slimit)
-{
-	spiWriteReg(display->spiCH, 0x0B, ((uint8_t) slimit) & 0x0F);
-}
-
-void max7219_setAllLEDsOff(
-		max7219_t *display)
-{
-	uint8_t i;
-	for(i = 0; i < 9; i++) {
-		spiWriteReg(display->spiCH, i, 0x00);
-	}
-}
-
-void max7219_ledMatrixSetLED(
-		max7219_t *display,
-		uint8_t row,
-		uint8_t col)
-{
-
-	uint8_t val = 0xAE;
-
-	row = (row & 0x07) + 1;
-	col = 1 << (col & 0x07);
-
-	spiWriteReg(display->spiCH, row,col);
-}
-
-void max7219_rawWrite(
-		max7219_t *display,
-		uint8_t reg,
-		uint8_t data)
-{
-	spiWriteReg(display->spiCH, reg, data);
-}
-
-void max7219_printLedMatrix(
-		max7219_t *display,
-		uint8_t matrix[])
-{
-	uint8_t i = 0;
-
-	for(i = 0; i < 8; i ++) {
-		spiWriteReg(display->spiCH, i+1, matrix[i]);
-	}
-}
-
-void max7219_ledMatrixUnsetLED(
-		max7219_t *display,
-		uint8_t row,
-		uint8_t col)
-{
-	row = (row & 0x07) + 1;
-	col = 1 << (col & 0x07);
-	// TODO: find out how to turn off LED
-	spiWriteReg(display->spiCH, row,col+1);
-}
-
-#if 0
-
-// daysichained matrix
-typedef struct{
-	spi_ch_t *spiCH;
-	uint8_t nDevices;
-}max7219_dm_t;
-
-
-void max7219_dm_write(
-		max7219_dm_t *matrix,
-		uint8_t **data)
-{
-	uint8_t i = 0;
-	uint8_t j = 0;
-	// TODO: Test it out
-	for(i = 0; i < 8; i++) {
-		pinWrite(matrix->spiCH->pin, 0);
-		for(j = 0; j < matrix->nDevices; j++) {
-			spiTrx8BitPolling(matrix->spiCH->spi, i+1); // reg
-			spiTrx8BitPolling(matrix->spiCH->spi, data[j][i]);
-		}
-		pinWrite(matrix->spiCH->pin, 1);
-	}
-}
-#endif
-

drivers/max7219/new_max7219.h

@@ -1,160 +0,0 @@
-/**
-  **************************************************************************************************
-  * @file		max7219.h
-  * @author		Kerem Yollu & Edwin Koch
-  * @date		25.08.2022
-  * @version	1.0
-  ************************************************************************************************** 
-  * @brief	
-  *				
-  * **Detailed Description :**
-  *
-  * @todo 
-  **************************************************************************************************
-*/
-
-#ifndef _MAX7219_H_
-#define _MAX7219_H_
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include <stdint.h>
-#include "spi.h"
-#include "pin.h"
-
-typedef enum{
-	NO_DECODE_DIGIT_7_TO_0 = 0x00,
-	CODE_B_DECODE_ONLY_DIGIT_0 = 0x01,
-	CODE_B_DECODE_ONLY_DIGIT_3_TO_0 = 0x0F,
-	CODE_B_DECOD_DIGIT_7_TO_0 = 0xFF
-}max7219_decodeMode_t;
-
-typedef enum{
-	DISPLAY_DIGIT_0 = 0x00,
-	DISPLAY_DIGIT_1_TO_0 = 0x01,
-	DSIPLAX_DIGIT_2_TO_0 = 0x02,
-	DSIPLAX_DIGIT_3_TO_0 = 0x03,
-	DSIPLAX_DIGIT_4_TO_0 = 0x04,
-	DSIPLAX_DIGIT_5_TO_0 = 0x05,
-	DSIPLAX_DIGIT_6_TO_0 = 0x06,
-	DSIPLAX_DIGIT_7_TO_0 = 0x07
-}max7219_scanLimit_t;
-
-/**
- * @brief max7219 matrix class
- *
- * The matrix can be ccomposed of only one ore many devices daysichained 
- * together.
- * @var *spiCH Pointer to spi channel object
- * @var nDevicesChained Ammount of devices hoocked up together
- * @var brightness brightness of the matrix
- * @var buf Array of matrix content. Each n to n + 7 (n can be 0, 8, 16, etc) represents the
- *			content of one individual max7219 device.
- */
-typedef struct{
-	spi_ch_t *spiCH;
-	uint8_t nDevicesChained;
-	uint8_t brightness;
-	uint8_t buf[];
-}max7219_mx_t;
-
-void max7219_t_mx_init(
-		max7219_mx_t *matrix,
-		spi_ch_t *spiChannel,
-		uint8_t *pBuf,
-		uint8_t bufLen);
-
-void max7219_mx_setPixel(
-		max7219_mx_t *matrix,
-		uint8_t row,
-		uint8_t col,
-		uint8_t logic);
-
-void max7219_mx_print(
-		max7219_mx_t *matrix,
-		char *text,
-		uint8_t len);
-
-void max7219_mx_show(
-		max7219_mx_t *matrix);
-
-void max7219_mx_shutdown(
-		max7219_mx_t *matrix);
-
-void max7219_mx_test(
-		max7219_mx_t *matrix);
-
-void max7219_mx_mapMatrix(
-		max7219_mx_t *matrix,
-		uint8_t *map);
-
-
-
-/*
-
-
-void max7219_init(
-		max7219_t *display,
-		spi_ch_t *spi_ch);
-
-void max7219_testDisplay(
-		max7219_t *display,
-		uint8_t logic);
-
-void max7219_shutdownDiaply(
-		max7219_t *display,
-		uint8_t logic);
-
-void max7219_setDecodeMode(
-		max7219_t *display,
-		max7219_decodeMode_t dmode);
-
-void max7219_setIntensity(
-		max7219_t *display,
-		uint8_t intensity);
-		
-void max7219_setScanLimit(
-		max7219_t *display,
-		max7219_scanLimit_t slimit);
-
-void max7219_setAllLEDsOff(
-		max7219_t *display);
-
-void max7219_ledMatrixSetLED(
-		max7219_t *display,
-		uint8_t row,
-		uint8_t col);
-
-void max7219_rawWrite(
-		max7219_t *display,
-		uint8_t reg,
-		uint8_t data);
-
-void max7219_printLedMatrix(
-		max7219_t *display,
-		uint8_t matrix[]);
-
-void max7219_ledMatrixUnsetLED(
-		max7219_t *display,
-		uint8_t row,
-		uint8_t col);
-#if 0
-// daysichained matrix
-typedef struct{
-	spi_ch_t *spiCH;
-	uint8_t nDevices;
-}max7219_dm_t;
-
-
-void max7219_dm_write(
-		max7219_dm_t *matrix,
-		uint8_t **data);
-#endif
-*/
-#ifdef _cplusplus
-}
-#endif
-
-#endif // _MAX7219_H_

drivers/ssd1306_i2c/ssd1306_i2c.c

@@ -1,287 +0,0 @@
-/*********************************************************************
-SSD1306 I2C Library for Raspberry Pi.
-Based on Adafruit SSD1306 Arduino library. Some functions came from Adafruit GFX lib
-
-Modified by Ilia Penev
-Tested on Raspberry Pi 2 with 0.96 Yellow/Blue OLED
-*********************************************************************/
-
-/*********************************************************************
-This is a library for our Monochrome OLEDs based on SSD1306 drivers
-
-  Pick one up today in the adafruit shop!
-  ------> http://www.adafruit.com/category/63_98
-
-These displays use SPI to communicate, 4 or 5 pins are required to
-interface
-
-Adafruit invests time and resources providing this open source code,
-please support Adafruit and open-source hardware by purchasing
-products from Adafruit!
-
-Written by Limor Fried/Ladyada  for Adafruit Industries.
-BSD license, check license.txt for more information
-All text above, and the splash screen below must be included in any redistribution
-*********************************************************************/
-
-#include <stdint.h>
-#include <string.h>
-
-#include "ssd1306_i2c.h"
-#include "oled_fonts.h"
-#include "lcd_oled.h"
-
-#define true 1
-#define false 0
-
-#define rotation 0
-
-int8_t cursor_y = 0;
-int8_t cursor_x = 0;
-
-int16_t i2cd;
-
-#define ssd1306_swap(a, b) { int16_t t = a; a = b; b = t; }
-
-//Section : 10.1.12 Set Display ON/OFF (AEh/AFh) | Page 37
-void ssd1306_i2c_set_display_off(i2c_t *i2c_dev)
-{
-	ssd1306_i2c_send_command(i2c_dev,SSD1306_DISPLAYOFF);
-}
-
-//Section : 10.1.12 Set Display ON/OFF (AEh/AFh) | Page 37
-void ssd1306_i2c_set_display_on(i2c_t *i2c_dev)
-{
-	ssd1306_i2c_send_command(i2c_dev,SSD1306_DISPLAYON);
-}
-
-// TODO: Find a ferq Calculator
-// Section : 10.1.16 Set Display Clock Divide Ratio/ Oscillator Frequency (D5h) | Page : 40
-void ssd1306_i2c_set_display_clkDiv_oscFreq(i2c_t *i2c_dev, uint8_t clockDivider, uint8_t oscillatorFreq)
-{
-	
-	uint8_t value = 0;
-
-	if(oscillatorFreq <= 15)
-	{
-		if(clockDivider <= 16)
-		{
-			value = (oscillatorFreq << 4) | clockDivider;
-		}
-	}
-
-	ssd1306_i2c_send_command(i2c_dev,SSD1306_SETDISPLAYCLOCKDIV);	// 0xD5
-	ssd1306_i2c_send_command(i2c_dev,value);	// the suggested ratio 0x80
-}
-
-// Section : 10.1.11 Set Multiplex Ratio (A8h) | Page : 37 
-void ssd1306_i2c_set_multiplex_ratio(i2c_t *i2c_dev, uint8_t ratio)
-{
-	ssd1306_i2c_send_command(i2c_dev,SSD1306_SETMULTIPLEX);	// 0xA8
-	ssd1306_i2c_send_command(i2c_dev,ratio);
-}
-
-// Section : 10.1.15 Set Display Offset (D3h) | Page : 37 
-void ssd1306_i2c_set_display_offset(i2c_t *i2c_dev, uint8_t offset)
-{
-	ssd1306_i2c_send_command(i2c_dev,SSD1306_SETDISPLAYOFFSET);	// 0xD3
-	ssd1306_i2c_send_command(i2c_dev,offset);	
-}
-// Section : 10.1.13 Set Page Start Address for Page Addressing Mode (B0h~B7h) | Page : 37
-void ssd1306_i2c_set_display_start_line(i2c_t *i2c_dev, uint8_t start)
-{
-	if(start <= 7)
-	{
-		ssd1306_i2c_send_command(i2c_dev,SSD1306_SETSTARTLINE | start);
-	}
-}
-
-// TODO : Some things are not clear What does 0x10 do ? 
-// Section : 2.1 Command Table for Charge Bump Setting | Page : 60
-void ssd1306_i2c_set_chage_pump(i2c_t *i2c_dev, uint8_t voltageSource)
-{
-	ssd1306_i2c_send_command(i2c_dev,SSD1306_CHARGEPUMP);	// 0x8D
-	if (voltageSource == SSD1306_EXTERNALVCC) {
-		ssd1306_i2c_send_command(i2c_dev,0x10);
-	} else {
-		ssd1306_i2c_send_command(i2c_dev,SSD1306_ENABLE_CHAGE_PUMP);
-	}
-}
-
-// Section :10.1.3 Set Memory Addressing Mode (20h) | Page : 34
-void ssd1306_i2c_set_memory_addressing_mode(i2c_t *i2c_dev, uint8_t mode)
-{
-	ssd1306_i2c_send_command(i2c_dev,SSD1306_MEMORYMODE);	
-	ssd1306_i2c_send_command(i2c_dev,mode);
-}
-
-// TODO : Not very clear what this functionality does :S
-// Section : 10.1.8 Set Segment Re-map (A0h/A1h)
-void ssd1306_i2c_set_segment_remap(i2c_t *i2c_dev, uint8_t enable)
-{
-	if(enable)
-	{	
-		ssd1306_i2c_send_command(i2c_dev,SSD1306_SEGREMAP | 0x1);
-	}
-	else
-	{
-		ssd1306_i2c_send_command(i2c_dev,SSD1306_SEGREMAP | 0x0);
-	}
-}
-// Section : 10.1.14 Set COM Output Scan Direction (C0h/C8h) | Page 37 
-void ssd1306_i2c_set_com_scan_direction(i2c_t *i2c_dev, uint8_t incremental)
-{
-	if(incremental)
-	{
-		ssd1306_i2c_send_command(i2c_dev,SSD1306_COMSCANINC);
-	}
-	else
-	{
-		ssd1306_i2c_send_command(i2c_dev,SSD1306_COMSCANDEC);
-	}
-}
-
-// Section : 10.1.18 Set COM Pins Hardware Configuration (DAh) | Page : 40 
-void ssd1306_i2c_set_com_pins(i2c_t *i2c_dev, uint8_t alignment)
-{
-	ssd1306_i2c_send_command(i2c_dev,SSD1306_SETCOMPINS);
-	ssd1306_i2c_send_command(i2c_dev,alignment);
-}
-
-void ssd1306_i2c_set_contrast(i2c_t *i2c_dev, uint8_t contrast)
-{
-	ssd1306_i2c_send_command(i2c_dev,SSD1306_SETCONTRAST);	// 0x81
-	ssd1306_i2c_send_command(i2c_dev,contrast);	
-}
-
-void ssd1306_i2c_set_prechage_period(i2c_t *i2c_dev, uint8_t period)
-{
-	ssd1306_i2c_send_command(i2c_dev,SSD1306_SETPRECHARGE);	// 0xd9
-	ssd1306_i2c_send_command(i2c_dev,period);
-}
-
-void ssd1306_i2c_set_com_deselect_level(i2c_t *i2c_dev, uint8_t voltageLevel)
-{
-	ssd1306_i2c_send_command(i2c_dev,SSD1306_SETVCOMDETECT);	// 0xDB
-	ssd1306_i2c_send_command(i2c_dev,voltageLevel);
-}
-
-void ssd1306_i2c_set_display_entire_on(i2c_t *i2c_dev, uint8_t resumeOrForce)
-{
-	if(resumeOrForce == SSD1306_DISPLAYALLON_RESUME)
-	{
-		ssd1306_i2c_send_command(i2c_dev,SSD1306_DISPLAYALLON_RESUME);	// 0xA4
-	}
-	else 
-	{
-		ssd1306_i2c_send_command(i2c_dev,SSD1306_DISPLAYALLON);	// 0xA4
-	}
-
-}
-
-void ssd1306_i2c_set_display_invert_pixel(i2c_t *i2c_dev, uint8_t inverted)
-{
-	if(inverted)
-	{
-		ssd1306_i2c_send_command(i2c_dev,SSD1306_INVERTDISPLAY);	// 0xA6
-	}
-	else 
-	{
-		ssd1306_i2c_send_command(i2c_dev,SSD1306_NORMALDISPLAY);	// 0xA6
-	}
-}
-
-void ssd1306_i2c_set_scroll(i2c_t *i2c_dev, uint8_t onOff)
-{
-	if(onOff)
-	{
-		ssd1306_i2c_send_command(i2c_dev,SSD1306_ACTIVATE_SCROLL);
-	}
-	else
-	{
-		ssd1306_i2c_send_command(i2c_dev,SSD1306_DEACTIVATE_SCROLL);
-	}
-}
-
-
-void ssd1306_i2c_send_command(i2c_t *i2c_dev,uint8_t c)
-{
-	// I2C
-	uint8_t control = 0x00;	// Co = 0, D/C = 0
-	uint8_t i2cDataLenght = 1;	// Co = 0, D/C = 0
-	uint16_t address = SSD1306_I2C_ADDRESS;   	// Co = 0, D/C = 0
-	i2c_write(i2c_dev, &address, &control, &c, &i2cDataLenght);
-}
-
-
-// startscrollright
-// Activate a right handed scroll for rows start through stop
-// Hint, the display is 16 rows tall. To scroll the whole display, run:
-// ssd1306_scrollright(0x00, 0x0F)
-void ssd1306_startscrollright(i2c_t *i2c_dev, uint16_t start, uint16_t stop)
-{
-	ssd1306_i2c_send_command(i2c_dev,SSD1306_RIGHT_HORIZONTAL_SCROLL);
-	ssd1306_i2c_send_command(i2c_dev,0X00);
-	ssd1306_i2c_send_command(i2c_dev,start);
-	ssd1306_i2c_send_command(i2c_dev,0X00);
-	ssd1306_i2c_send_command(i2c_dev,stop);
-	ssd1306_i2c_send_command(i2c_dev,0X00);
-	ssd1306_i2c_send_command(i2c_dev,0XFF);
-	ssd1306_i2c_send_command(i2c_dev,SSD1306_ACTIVATE_SCROLL);
-}
-
-// startscrollleft
-// Activate a right handed scroll for rows start through stop
-// Hint, the display is 16 rows tall. To scroll the whole display, run:
-// ssd1306_scrollright(0x00, 0x0F)
-void ssd1306_startscrollleft(i2c_t *i2c_dev,uint16_t start, uint16_t stop)
-{
-	ssd1306_i2c_send_command(i2c_dev,SSD1306_LEFT_HORIZONTAL_SCROLL);
-	ssd1306_i2c_send_command(i2c_dev,0X00);
-	ssd1306_i2c_send_command(i2c_dev,start);
-	ssd1306_i2c_send_command(i2c_dev,0X00);
-	ssd1306_i2c_send_command(i2c_dev,stop);
-	ssd1306_i2c_send_command(i2c_dev,0X00);
-	ssd1306_i2c_send_command(i2c_dev,0XFF);
-	ssd1306_i2c_send_command(i2c_dev,SSD1306_ACTIVATE_SCROLL);
-}
-
-// startscrolldiagright
-// Activate a diagonal scroll for rows start through stop
-// Hint, the display is 16 rows tall. To scroll the whole display, run:
-// ssd1306_scrollright(0x00, 0x0F)
-void ssd1306_startscrolldiagright(i2c_t *i2c_dev, uint16_t start, uint16_t stop)
-{
-	ssd1306_i2c_send_command(i2c_dev,SSD1306_SET_VERTICAL_SCROLL_AREA);
-	ssd1306_i2c_send_command(i2c_dev,0X00);
-	ssd1306_i2c_send_command(i2c_dev,SSD1306_LCDHEIGHT);
-	ssd1306_i2c_send_command(i2c_dev,SSD1306_VERTICAL_AND_RIGHT_HORIZONTAL_SCROLL);
-	ssd1306_i2c_send_command(i2c_dev,0X00);
-	ssd1306_i2c_send_command(i2c_dev,start);
-	ssd1306_i2c_send_command(i2c_dev,0X00);
-	ssd1306_i2c_send_command(i2c_dev,stop);
-	ssd1306_i2c_send_command(i2c_dev,0X01);
-	ssd1306_i2c_send_command(i2c_dev,SSD1306_ACTIVATE_SCROLL);
-}
-
-// startscrolldiagleft
-// Activate a diagonal scroll for rows start through stop
-// Hint, the display is 16 rows tall. To scroll the whole display, run:
-// ssd1306_scrollright(0x00, 0x0F)
-void ssd1306_startscrolldiagleft(i2c_t *i2c_dev, uint16_t start, uint16_t stop)
-{
-	ssd1306_i2c_send_command(i2c_dev,SSD1306_SET_VERTICAL_SCROLL_AREA);
-	ssd1306_i2c_send_command(i2c_dev,0X00);
-	ssd1306_i2c_send_command(i2c_dev,SSD1306_LCDHEIGHT);
-	ssd1306_i2c_send_command(i2c_dev,SSD1306_VERTICAL_AND_LEFT_HORIZONTAL_SCROLL);
-	ssd1306_i2c_send_command(i2c_dev,0X00);
-	ssd1306_i2c_send_command(i2c_dev,start);
-	ssd1306_i2c_send_command(i2c_dev,0X00);
-	ssd1306_i2c_send_command(i2c_dev,stop);
-	ssd1306_i2c_send_command(i2c_dev,0X01);
-	ssd1306_i2c_send_command(i2c_dev,SSD1306_ACTIVATE_SCROLL);
-}
-
-
-
-

drivers/ssd1306_i2c/ssd1306_i2c.h

@@ -1,173 +0,0 @@
-/*********************************************************************
-SSD1306 I2C Library for Raspberry Pi.
-Based on Adafruit SSD1306 Arduino library. Some functions came from Adafruit GFX lib. 
-
-Modified by Ilia Penev
-Tested on Raspberry Pi 2 with 0.96 Yellow/Blue OLED
-*********************************************************************/
-
-/*********************************************************************
-This is a library for our Monochrome OLEDs based on SSD1306 drivers
-
-  Pick one up today in the adafruit shop!
-  ------> http://www.adafruit.com/category/63_98
-
-These displays use SPI to communicate, 4 or 5 pins are required to
-interface
-
-Adafruit invests time and resources providing this open source code,
-please support Adafruit and open-source hardware by purchasing
-products from Adafruit!
-
-Written by Limor Fried/Ladyada  for Adafruit Industries.
-BSD license, check license.txt for more information
-All text above, and the splash screen must be included in any redistribution
-*********************************************************************/
-#ifndef SSD1306_I2C_H_
-#define SSD1306_I2C_H_
-
-#include "i2c.h"
-
-#define BLACK 0
-#define WHITE 1
-#define INVERSE 2
-
-#define SSD1306_I2C_ADDRESS   0x3C	// 011110+SA0+RW - 0x3C or 0x3D
-// Address for 128x32 is 0x3C
-// Address for 128x64 is 0x3D (default) or 0x3C (if SA0 is grounded)
-
-/*=========================================================================
-    SSD1306 Displays
-    -----------------------------------------------------------------------
-    The driver is used in multiple displays (128x64, 128x32, etc.).
-    Select the appropriate display below to create an appropriately
-    sized framebuffer, etc.
-
-    SSD1306_128_64  128x64 pixel display
-
-    SSD1306_128_32  128x32 pixel display
-
-    SSD1306_96_16
-
-    -----------------------------------------------------------------------*/
-#define SSD1306_128_64
-//   #define SSD1306_128_32
-//   #define SSD1306_96_16
-/*=========================================================================*/
-
-#if defined SSD1306_128_32
-        #define WIDTH 128
-        #define HEIGHT 32
-#endif
-
-#if defined SSD1306_128_64
-        #define WIDTH 128
-        #define HEIGHT 64
-#endif
-
-#if defined SSD1306_96_16
-        #define WIDTH 96
-        #define HEIGHT 16
-#endif
-
-#if defined SSD1306_128_64 && defined SSD1306_128_32
-        #error "Only one SSD1306 display can be specified at once in SSD1306.h"
-#endif
-#if !defined SSD1306_128_64 && !defined SSD1306_128_32 && !defined SSD1306_96_16
-        #error "At least one SSD1306 display must be specified in SSD1306.h"
-#endif
-
-#if defined SSD1306_128_64
-        #define SSD1306_LCDWIDTH                  128
-        #define SSD1306_LCDHEIGHT                 64
-#endif
-#if defined SSD1306_128_32
-        #define SSD1306_LCDWIDTH                  128
-        #define SSD1306_LCDHEIGHT                 32
-#endif
-#if defined SSD1306_96_16
-        #define SSD1306_LCDWIDTH                  96
-        #define SSD1306_LCDHEIGHT                 16
-#endif
-
-#define SSD1306_SETCONTRAST 0x81
-#define SSD1306_DISPLAYALLON_RESUME 0xA4
-#define SSD1306_DISPLAYALLON 0xA5
-#define SSD1306_NORMALDISPLAY 0xA6
-#define SSD1306_INVERTDISPLAY 0xA7
-#define SSD1306_DISPLAYOFF 0xAE
-#define SSD1306_DISPLAYON 0xAF
-
-#define SSD1306_SETDISPLAYOFFSET 0xD3
-#define SSD1306_SETCOMPINS 0xDA
-
-#define SSD1306_SETVCOMDETECT 0xDB
-
-#define SSD1306_SETDISPLAYCLOCKDIV 0xD5
-#define SSD1306_SETPRECHARGE 0xD9
-
-#define SSD1306_SETMULTIPLEX 0xA8
-
-#define SSD1306_SETLOWCOLUMN 0x00
-#define SSD1306_SETHIGHCOLUMN 0x10
-
-#define SSD1306_SETSTARTLINE 0x40
-
-#define SSD1306_MEMORYMODE 0x20
-#define SSD1306_MEMORY_MODE_PAGE 0x04
-#define SSD1306_MEMORY_MODE_HORIZONTAL 0x00
-#define SSD1306_MEMORY_MODE_VERTICAL 0x01
-
-#define SSD1306_COLUMNADDR 0x21
-#define SSD1306_PAGEADDR   0x22
-
-#define SSD1306_COMSCANINC 0xC0
-#define SSD1306_COMSCANDEC 0xC8
-#define SSD1306_COM_SEQ_LR_REMAP_OFF 0x02
-#define SSD1306_COM_SEQ_LR_REMAP_ON 0x12
-#define SSD1306_COM_ALT_LR_REMAP_OFF 0x0A
-#define SSD1306_COM_ALT_LR_REMAP_ON 0x1A
-
-#define SSD1306_SEGREMAP 0xA0
-
-#define SSD1306_CHARGEPUMP 0x8D
-#define SSD1306_ENABLE_CHAGE_PUMP 0x14
-#define SSD1306_EXTERNALVCC 0x1
-#define SSD1306_SWITCHCAPVCC 0x2
-
-
-
-// Scrolling #defines
-#define SSD1306_ACTIVATE_SCROLL 0x2F
-#define SSD1306_DEACTIVATE_SCROLL 0x2E
-#define SSD1306_SET_VERTICAL_SCROLL_AREA 0xA3
-#define SSD1306_RIGHT_HORIZONTAL_SCROLL 0x26
-#define SSD1306_LEFT_HORIZONTAL_SCROLL 0x27
-#define SSD1306_VERTICAL_AND_RIGHT_HORIZONTAL_SCROLL 0x29
-#define SSD1306_VERTICAL_AND_LEFT_HORIZONTAL_SCROLL 0x2A
-
-void ssd1306_startscrolldiagright(i2c_t *i2c_dev, uint16_t start, uint16_t stop);
-void ssd1306_startscrolldiagleft(i2c_t *i2c_dev, uint16_t start, uint16_t stop);
-void ssd1306_stopscroll(i2c_t *i2c_dev);
-
-void ssd1306_i2c_send_command(i2c_t *i2c_dev,uint8_t c);
-void ssd1306_i2c_set_display_off(i2c_t *i2c_dev);
-void ssd1306_i2c_set_display_on(i2c_t *i2c_dev);
-void ssd1306_i2c_set_display_clkDiv_oscFreq(i2c_t *i2c_dev, uint8_t clockDivider, uint8_t oscillatorFreq);
-void ssd1306_i2c_set_multiplex_ratio(i2c_t *i2c_dev, uint8_t ratio);
-void ssd1306_i2c_set_display_offset(i2c_t *i2c_dev, uint8_t offset);
-void ssd1306_i2c_set_display_start_line(i2c_t *i2c_dev, uint8_t start);
-void ssd1306_i2c_set_chage_pump(i2c_t *i2c_dev, uint8_t voltageSource);
-void ssd1306_i2c_set_memory_addressing_mode(i2c_t *i2c_dev, uint8_t mode);
-void ssd1306_i2c_set_segment_remap(i2c_t *i2c_dev, uint8_t enable);
-void ssd1306_i2c_set_com_scan_direction(i2c_t *i2c_dev, uint8_t incremental);
-void ssd1306_i2c_set_com_pins(i2c_t *i2c_dev, uint8_t alignment);
-void ssd1306_i2c_set_contrast(i2c_t *i2c_dev, uint8_t contrast);
-void ssd1306_i2c_set_dimm(i2c_t *i2c_dev, uint8_t dimm);
-void ssd1306_i2c_set_prechage_period(i2c_t *i2c_dev, uint8_t period);
-void ssd1306_i2c_set_com_deselect_level(i2c_t *i2c_dev, uint8_t voltageLevel);
-void ssd1306_i2c_set_display_entire_on(i2c_t *i2c_dev, uint8_t resumeOrForce);
-void ssd1306_i2c_set_display_invert_pixel(i2c_t *i2c_dev, uint8_t inverted);
-void ssd1306_i2c_set_scroll(i2c_t *i2c_dev, uint8_t onOff);
-
-#endif				/* _SSD1306_I2C_H_ */

env/cmake_core/cmakeCore.cmake

@@ -1,150 +0,0 @@
-####################################################################################################
-# DIRECTORY CHECKS 
-####################################################################################################
-function(checkDirectory _directory)
-	if(EXISTS ${_directory})
-	else()
-			errorDirNotFound("${_directory}")
-	endif()
-endfunction()
-
-####################################################################################################
-# HEADER MANAGEMENT 
-####################################################################################################
-# This function goes an searches for directories containing header files and return the corresponding directory.
-function(createHeaderDirList _directory _list _headersList)	
-	set(_newheaderDirList)
-	foreach(DIR IN LISTS _list)	
-		checkDirectory("${_directory}/${DIR}")	
-		list(APPEND _newheaderDirList ${_directory}/${DIR})
-		message("${BoldMagenta} |-> Added : ${_directory}/${DIR}")
-	endforeach()
-	message("${ColourReset}")
-	set(${_headersList} ${_newheaderDirList} PARENT_SCOPE)
-endfunction()
-
-
-# This function searches for the given header file name (_alias) if it has benn included
-# If it finds it it retursn the directory where the header is Located
-# If it doesn't find a header it  generates a fatal error
-function(checkIfHeaderFileIncluded _alias _retDir)
-	set(_headerFound FALSE)
-	set(_headerDirFound)
-	foreach(_headerDir IN LISTS COMMON_HEADERS)
-		if(EXISTS ${_headerDir}/${alias}.h)
-			set(_headerFound TRUE)
-			set(_headerDirFound ${_headerDir})
-		endif()
-	endforeach()
-
-	if(_headerFound)
-		set(${_retDir} ${_headerDirFound}/${alias}.h PARENT_SCOPE)
-	else()
-		errorHFileNotFound(${_headerDirFound} ${_alias})
-	endif()
-endfunction()
-
-# This function searches for the given header file name (_alias) if it has benn included
-# If it finds it it retursn the directory where the header is Located
-# If it doesn't find a header it  returns a Non Found Message
-function(searchHeaderFile _alias _retDir)
-	set(_headerFound FALSE)
-	set(_headerDirFound)
-	foreach(_headerDir IN LISTS COMMON_HEADERS)
-		if(EXISTS ${_headerDir}/${_alias}.h)
-			set(_headerFound TRUE)
-			set(_headerDirFound ${_headerDir})
-		endif()
-	endforeach()
-
-	if(_headerFound)
-		set(${_retDir} ${_headerDirFound}/${_alias}.h PARENT_SCOPE)
-	else()
-		set(${_retDir} "No corresponding header << ${_alias}.h >> found " PARENT_SCOPE)
-	endif()
-endfunction()
-
-
-####################################################################################################
-# SUBMODULE MANAGEMENT 
-####################################################################################################
-function(makeSubmodules _directory _aliasList _submoduleList)	
-	set(_newSubmoduleList)
-	set(_headerLoc)
-	#For each alias of element present on the list that has been given as argument
-	foreach(alias IN LISTS _aliasList)	
-		
-		checkDirectory("${_directory}/${alias}") # Does the directory exists (If not fatal error)	
-
-		#Does the given element has an implmenetation for a CSL
-		if(EXISTS ${CSL_SOURCES_DIR}/imp_${alias}.${PL}) #If yes 
-			message("${BoldCyan} |-> Target Found : ${alias} ${BoldYellow} ")		
-
-			checkIfHeaderFileIncluded("${alias}" "_headerLoc") #Every Implementation has to have a header (if not Fatal Error)
-
-			#Does the given element has an predefined standart usage library
-			if(EXISTS ${_directory}/${alias}/${alias}.${PL}) # If yes then add this to the compiling list
-				message("  |-> Def Header  : ${_headerLoc}")
-				message("  |-> Lib Source  : ${_directory}/${alias}/${alias}.${PL} ")
-				message("  |-> Imp source  : ${CSL_SOURCES_DIR}/imp_${alias}.${PL}")
-
-				add_library(${alias}_submodule ${_directory}/${alias}/${alias}.${PL} ${CSL_SOURCES_DIR}/imp_${alias}.${PL})
-			else() # If No than just compile the implmentation source
-				message("  |-> Def Header  : ${_headerLoc}")
-				message("  |-> Imp source  : ${CSL_SOURCES_DIR}/imp_${alias}.${PL}")
-
-				add_library(${alias}_submodule ${CSL_SOURCES_DIR}/imp_${alias}.${PL})
-			endif()
-
-			message("  |-> Name        : sub::${alias}")
-
-			target_compile_options(${alias}_submodule PRIVATE ${MAIN_FLAGS})
-			target_compile_definitions(${alias}_submodule PRIVATE ${MAIN_DEFS})
-			target_include_directories(${alias}_submodule PUBLIC ${COMMON_HEADERS})
-			add_library(sub::${alias} ALIAS ${alias}_submodule)
-			
-			#Append the internal submodule list with the newly compiled element
-			list(APPEND _newSubmoduleList sub::${alias})
-
-		else() # Else, when the element has no implmentation for a CSL
-			#If the element has an source file
-			if(EXISTS ${_directory}/${alias}/${alias}.${PL})
-				searchHeaderFile("${alias}" "_headerLoc") #Searches if there is an Header (if not it will not generate any error)
-				message("${BoldCyan} |-> Target Found : ${alias} ${BoldYellow} ")	
-				message("  |-> Header : ${_headerLoc}")
-				message("  |-> Source : ${_directory}/${alias}/${alias}.${PL}")
-				message("  |-> Name   : sub::${alias}")
-
-				add_library(${alias}_submodule ${_directory}/${alias}/${alias}.${PL})
-				target_compile_options(${alias}_submodule PRIVATE ${MAIN_FLAGS})
-				target_compile_definitions(${alias}_submodule PRIVATE ${MAIN_DEFS})
-				target_include_directories(${alias}_submodule PUBLIC ${COMMON_HEADERS})
-				add_library(sub::${alias} ALIAS ${alias}_submodule)
-				
-				#Append the internal submodule list with the newly compiled element
-				list(APPEND _newSubmoduleList sub::${alias})
-
-			else() # When the element has no source file and is only a header. 
-				message("${BoldMagenta} |-> No Source file for target : ${alias}")
-				message("  |-> Only headers will be added")
-			endif()
-
-		endif()
-
-	endforeach()
-
-	message("${ColourReset}")
-
-	#New submodule list with the names of the compiled elements
-	set(${_submoduleList} ${_newSubmoduleList} PARENT_SCOPE)
-
-endfunction()
-
-####################################################################################################
-# PRINT FUNCTIONS 
-####################################################################################################
-function(printList _txt _list) 
-	foreach(X IN LISTS _list)	
-		message("${_txt}${X}")
-	endforeach()
-endfunction() 

env/cmake_core/cmakeProject.cmake

@@ -1,47 +0,0 @@
-function(createHeaderDirListProject _list _headersList)	
-	foreach(DIR IN LISTS _list)	
-		checkDirectory("${PROJECT_DIR}/${DIR}")	
-		list(APPEND _newheaderDirList ${PROJECT_DIR}/${DIR})
-		message("${BoldMagenta} |-> Added : ${PROJECT_DIR}/${DIR}")
-	endforeach()
-	message("${ColourReset}")
-	set(${_headersList} ${_newheaderDirList} PARENT_SCOPE)
-endfunction()
-
-####################################################################################################
-# SUBMODULE MANAGEMENT 
-####################################################################################################
-function(makeSubmodulesProject _directoryList _aliasList _submoduleList)	
-	set(_newSubmoduleList)
-	set(_subName)
-	set(_headerLoc)
-
-	foreach(_dir IN LISTS _directoryList)	
-		checkDirectory("${PROJECT_DIR}/${_dir}") # Does the directory exists (If not fatal error)			
-		#For each alias of element present on the list that have been given as argument
-		
-		foreach(_name IN LISTS _aliasList)	
-			if(EXISTS ${PROJECT_DIR}/${_dir}/${_name})
-				string(REPLACE ".c" "" _subName ${_name})	
-				searchHeaderFile("${_subName}" "_headerLoc") #Searches if there is an Header (if not it will not generate any error)
-				message("${BoldGreen} |-> Directory Found : ${PROJECT_DIR}/${_dir}")	
-				message("${BoldCyan}  |-> Target Found : ${_subName} ${BoldYellow} ")	
-				message("   |-> Header : ${_headerLoc}")
-				message("   |-> Source : ${PROJECT_DIR}/${_dir}/${_name}")
-				message("   |-> Name   : sub::${_subName}")
-
-				add_library(${_subName}_submodule ${PROJECT_DIR}/${_dir}/${_subName})
-				target_compile_options(${_subName}_submodule PRIVATE ${MAIN_FLAGS})
-				target_compile_definitions(${_subName}_submodule PRIVATE ${MAIN_DEFS})
-				target_include_directories(${_subName}_submodule PUBLIC ${COMMON_HEADERS})
-				add_library(sub::${_subName} ALIAS ${_subName}_submodule)
-				
-				#Append the internal submodule list with the newly compiled element
-				list(APPEND _newSubmoduleList sub::${_subName})
-			endif()
-		endforeach()
-	endforeach()
-	message("${ColourReset}")
-	#New submodule list with the names of the compiled elements
-	set(${_submoduleList} ${_newSubmoduleList} PARENT_SCOPE)
-endfunction()

env/cmake_core/colors.cmake

@@ -1,22 +0,0 @@
-####################################################################################################
-# CMAKE Colors
-####################################################################################################
-if(NOT WIN32)
-	string(ASCII 27 Esc)
-	set(ColourReset "${Esc}[m")
-	set(ColourBold  "${Esc}[1m")
-	set(Red         "${Esc}[31m")
-	set(Green       "${Esc}[32m")
-	set(Yellow      "${Esc}[33m")
-	set(Blue        "${Esc}[34m")
-	set(Magenta     "${Esc}[35m")
-	set(Cyan        "${Esc}[36m")
-	set(White       "${Esc}[37m")
-	set(BoldRed     "${Esc}[1;31m")
-	set(BoldGreen   "${Esc}[1;32m")
-	set(BoldYellow  "${Esc}[1;33m")
-	set(BoldBlue    "${Esc}[1;34m")
-	set(BoldMagenta "${Esc}[1;35m")
-	set(BoldCyan    "${Esc}[1;36m")
-	set(BoldWhite   "${Esc}[1;37m")
-endif()

env/cmake_core/compiler.cmake

@@ -1,13 +0,0 @@
-####################################################################################################
-# bsl_nucleo_f042k6_compiler.cmake
-####################################################################################################
-
-set(CMAKE_C_COMPILER "/usr/bin/arm-none-eabi-gcc")
-set(CMAKE_CXX_COMPILER "/usr/bin/arm-none-eabi-g++")
-set(CMAKE_ASM_COMPILER "/usr/bin/arm-none-eabi-gcc")
-set(CMAKE_OBJCOPY "/usr/bin/arm-none-eabi-objcopy")
-set(CMAKE_SIZE "/usr/bin/arm-none-eabi-size")
-set(CMAKE_EXE_LINKER_FLAGS "--specs=nosys.specs") #AS we provide our own linker nad not using the one from the curren OS (system)
-
-option(IS_NO_SYS "Use a custom linker script" ON)
-option(NEED_OBJCOPY "If objcopy is neede for cross compilation" ON)

env/cmake_core/doxygen.cmake

@@ -1,29 +0,0 @@
-####################################################################################################
-# DOXYGEN
-####################################################################################################
-
-function(generateDoxygen)
-if(OUTPUT_DOXYGEN)
-	find_package(Doxygen)
-	if (DOXYGEN_FOUND)
-		set(DOXYGEN_IN ${CMAKE_CORE_DIR}/doxyfile.in)
-		set(DOXYGEN_OUT ${CMAKE_CURRENT_BINARY_DIR}/doxyfile)
-		message("${Green}")
-		message("+-------------------------------+")
-		message("Generating Doxygen output")
-		message("+-------------------------------+")
-		message("${ColourReset}")
-
-		# request to configure the file
-		configure_file(${DOXYGEN_IN} ${DOXYGEN_OUT} @ONLY)
-		# note the option ALL which allows to build the docs together with the application
-		add_custom_target( doc_doxygen ALL
-			COMMAND ${DOXYGEN_EXECUTABLE} ${DOXYGEN_OUT}
-			WORKING_DIRECTORY ${DOXYGEN_OUTPUT_DIR}
-			COMMENT "Generating API documentation with Doxygen"
-			VERBATIM )
-	else (DOXYGEN_FOUND)
-		message("Doxygen need to be installed to generate the doxygen documentation")
-	endif (DOXYGEN_FOUND)
-endif(OUTPUT_DOXYGEN)
-endfunction()

env/cmake_core/errorHandler.cmake

@@ -1,67 +0,0 @@
-function(errorDetected)
-	message("${Red}\n")
-	message("#########################################")
-	message("#\t@@@@  @@@   @@@    @@   @@@   \t#")
-	message("#\t@     @  @  @  @  @  @  @  @  \t#")
-	message("#\t@@@   @@@   @@@   @  @  @@@   \t#")
-	message("#\t@     @ @   @ @   @  @  @ @   \t#")
-	message("#\t@@@@  @  @  @  @   @@   @  @  \t#")
-	message("#########################################")
-	message("#\tAN ERROR HAS OCCURED\t\t#")
-	message("#########################################")
-endfunction()
-
-function(errorOut)
-	message("#########################################\n\n")
-endfunction()
-
-function(errorDirNotFound _searchedDir)
-	errorDetected()
-	message(" |-->GIVEN DIRECTORY NOT FOUND")
-	message("  |-> Given dir : ${DIR}")
-	message("!!! Possible Reasons !!!")
-	message(" |--> Did you give corect path in ${PROJECT_CONFIG_FILE} ??")
-	message("  |-> The declaration for HEADERS should look like :") 
-	message("   |-> list(APPEND PROJECT_HEADERS_DIR \$\{PROJECT_DIR\}/path_to_header_directory")
-	message("    |-> \$\{PROJECT_DIR\} = ${PROJECT_DIR}")
-	message("  |-> The declaration for SOURCES should look like :") 
-	message("   |-> list(APPEND PROJECT_SOURCES_DIR \$\{PROJECT_DIR\}/path_to_source_directory")
-	message("    |-> \$\{PROJECT_DIR\} = ${PROJECT_DIR}")
-	message("If A Directory has source and header files, it should be declared 2 times accordingly")
-	message(" |--> Once as HEADER location")
-	message(" |--> Once as SOURCES location")
-	message("\nFor more information please refer to : ${CMAKE_SOURCE_DIR}/README.md\n")
-	errorOut()
-	message(FATAL_ERROR "Directory ${DIR} : NOT FOUND") 	
-endfunction()
-
-function(errorHFileNotFound _directory _alias)
-	errorDetected()
-	message("The header file <<${_alias}.h>> was not found")
-	message(" |--> Given directory is : ${_directory}/${_alias}")
-	message(" |--> Given Header file path : ${_directory}/${_alias}/${_alias}.h")
-	message("!!! Possible Reasons !!!")
-	message(" |--> Did you name the module correctly in ${_directory}/CMakeLists.txt ??")
-	message("  |-> The module name should be : ") 
-	message("   |-> The same as the the folder name") 
-	message("   |-> The same as the the source name") 
-	message("   |-> The same as the the header name") 
-	message("\nFor more information please refer to : ${_directory}/README.md\n")
-	errorOut()
-	message(FATAL_ERROR "\n NO Header file : <<${_alias}.h>> was found ### COMPILATION ABORTED ###\n")
-endfunction()
-
-function(errorHDirNotFound _dir _alias)
-	errorDetected()
-	message("The file <<${_alias}>> was not found")
-	message(" |--> Given directory is : ${_directory}/${_alias}")
-	message("!!! Possible Reasons !!!")
-	message(" |--> Did you name the module correctly in ${_directory}/CMakeLists.txt ??")
-	message("  |-> The module name should be : ") 
-	message("   |-> The same as the the folder name") 
-	message("   |-> The same as the the source name") 
-	message("   |-> The same as the the header name") 
-	message("\nFor more information please refer to : ${_directory}/README.md\n")
-	errorOut()
-	message(FATAL_ERROR "\nNO Directory : <<${_directory}/${_alias}>> was found ### COMPILATION ABORTED ###\n")
-endfunction()

env/python/flasher.py

@@ -1,28 +0,0 @@
-import sys
-import os
-import subprocess
-
-def eraseFirmware(TARGET_DEVICE):
-    if sys.platform == 'linux':
-        print('TODO')
-    if sys.platform == 'win32':
-        subprocess.Popen("STM32_Programmer_CLI.exe -c port=SWD -fwdelete")
-
-def downloadFirmware(TARGET_DEVICE):
-    print('TODO')
-
-def flash(TARGET_DEVICE, buildDirectory):
-    # find out what platform the build is done (e.g. linux, win32, etc.)
-
-    if sys.platform == 'linux':
-        os.system('st-flash write' +  TARGET_DEVICE + '.bin 0x08000000')
-        sys.exit()
-    if sys.platform == 'win32':
-        # https://www.youtube.com/watch?v=AcrbUOhApd0
-        os.chdir('C:\\Program Files\\STMicroelectronics\\STM32Cube\\STM32CubeProgrammer\\bin')
-        #subprocess.Popen("STM32_Programmer_CLI.exe")
-        subprocess.Popen("STM32_Programmer_CLI.exe")
-        os.chdir(buildDirectory)
-        sys.exit()
-
-    print('this platform is not supported by KED!')

env/python/ked.py

@@ -1,158 +0,0 @@
-'''
-KED Main Script
-'''
-import sys
-import os
-import shutil
-import subprocess
-import flasher
-
-####################################################################################################
-# FUTURE ACTIONS
-####################################################################################################
-# TODO: KeY 14_02_2023 -> Automatically generate project, if empty. 
-# TODO: KeY 14_02_2023 -> Give the possibility to generate different example projects. 
-####################################################################################################
-
-####################################################################################################
-# MODIFICATIONS
-####################################################################################################
-# KeY 14_02_2023 :  Some comments for code separation added : 
-#                   FUTURE ACTIONS, MODIFICATIONS, FUNCTIONS and MAIN EXECUTION Delimiters
-#                   
-# KeY 14_02_2023 :  Modified some Print's for user guidance and apearance changes                    
-# KeY 14_02_2023 :  Gave a response to CSL_TO_USE question from Edwin                   
-####################################################################################################
-
-####################################################################################################
-# FUNCTIONS 
-####################################################################################################
-class bcolors:
-    HEADER = '\033[95m'
-    OKBLUE = '\033[94m'
-    OKCYAN = '\033[96m'
-    OKGREEN = '\033[92m'
-    WARNING = '\033[93m'
-    FAIL = '\033[91m'
-    ENDC = '\033[0m'
-    BOLD = '\033[1m'
-    UNDERLINE = '\033[4m'
-
-def getTargetDeviceList():
-    os.chdir(os.path.join(os.getcwd(), 'csl'))
-        # get top level folder names in csl which represent all available target devices
-    return next(os.walk('.'))[1]
-
-def build(TARGET_DEVICE):
-    # TODO: ask Kerem what he wanted to to with "CSL_TO_USE"
-        # KeY 14_02_2023 RESPONSE:
-        # CSL_TO_USE is the "folder name" given to CMAKE 
-        # so that CMAKE gets the correct "file path" under the csl directory. 
-        # Like so: csl/<CSL_TO_USE> | Real example: csl/stm32f042 
-
-    print('building project with cmake...')
-    print(bcolors.OKGREEN)
-    os.system('cmake -S . -B '+ buildDirectory + ' -DCSL_USED=' + TARGET_DEVICE)
-    print(bcolors.ENDC)
-    print('...done!')
-
-    print('Compiling Project with Make...')
-    os.chdir(buildDirectory)
-    print(bcolors.OKGREEN)
-    os.system('make -j4')
-    print(bcolors.ENDC)
-    print('...done!')
-
-'''
-def flash(TARGET_DEVICE):
-    # find out what platform the build is done (e.g. linux, win32, etc.)
-
-    if sys.platform == 'linux':
-        os.system('st-flash write' +  TARGET_DEVICE + '.bin 0x08000000')
-    if sys.platform == 'win32':
-        # https://www.youtube.com/watch?v=AcrbUOhApd0
-        os.chdir('C:\\Program Files\\STMicroelectronics\\STM32Cube\\STM32CubeProgrammer\\bin')
-        subprocess.Popen("STM32_Programmer_CLI.exe")
-        os.chdir(buildDirectory)
-
-    print('this platform is not supported by KED!')
-'''
-####################################################################################################
-
-####################################################################################################
-# MAIN EXECUTION
-####################################################################################################
-scriptDirectory = os.getcwd()
-projectDirectory = os.path.join(scriptDirectory, '..')
-buildDirectory = os.path.join(projectDirectory, 'ked_build')
-#projectDirectory = scriptDirectory + '\\..'
-#buildDirectory = projectDirectory + '\\ked_build'
-
-os.chdir(scriptDirectory)
-
-# exit if no argument was passed
-argvLen = len(sys.argv)
-if  argvLen < 2:
-    print('Target Device missing as argument!')
-    sys.exit()
-
-# obtain list of all available targets in KED
-targetDevList = getTargetDeviceList()
-
-# user requests help
-if sys.argv[1] in ('-h', '-help'):
-    print('HELP -> TODO!')
-    sys.exit()
-
-# user request to remove build folder
-if sys.argv[1] in ('-rm', '-rmb'):
-    if os.path.exists(buildDirectory):
-        shutil.rmtree(buildDirectory)
-    sys.exit()
-
-# user requests listing of all available target devices
-# KeY 14_02_2023 : Could not help my self wiht some pimping
-if sys.argv[1] in ('-ls', '-lt', '-lst', '-lsd'):
-    print('----------------------------')
-    print('| Available Traget Devices |')
-    print('----------------------------')
-
-    for targetDev in targetDevList:
-        print(" - " + targetDev)
-    sys.exit()
-
-# user requests to clean project by erasing build
-if sys.argv[1] in ('-clean', '-c', '-db'):
-    if os.path.exists(buildDirectory):
-        shutil.rmtree(buildDirectory)
-    os.mkdir(buildDirectory)
-    print('build cleaned!')
-    sys.exit()
-
-if sys.argv[1] in ('-dox', '-doxygen', '-gd'):
-    print('TODO: Implement doxygen generation')
-    sys.exit()
-
-if sys.argv[1] in ('-opendox', '-od'):
-    print('TODO: Implement open doxygen in browser')
-    sys.exit()
-
-# check if requested target device is supported by KED
-# KeY : 14_02_2023 : Jsut changed the text a little bit and gave some guidance to the user. 
-if sys.argv[1] not in targetDevList:
-    print('debug: Invalid Target Device')
-    print(' |-> To list the availabe target devices pass -ls as argument')
-    print('   |-> python ked.py -ls')
-    sys.exit()
-
-print('building for target device ['+ bcolors.OKGREEN + sys.argv[1] + bcolors.ENDC + ']...')
-
-#create build directory if missing
-if not os.path.exists(buildDirectory):
-    os.mkdir(buildDirectory)
-
-CSL_TO_USE = sys.argv[1]
-
-build(CSL_TO_USE)
-#flasher.flash(CSL_TO_USE,buildDirectory)
-

env/python/parser/config.json

@@ -1,95 +0,0 @@
-{
-  "organization": "freeCodeCamp",
-  "website": "https://www.freecodecamp.org/",
-  "formed": 2014,
-  "founder": "Quincy Larson",
-  "certifications": [
-
-    {
-      "name": "Responsive Web Design",
-      "courses": [
-        "HTML",
-        "CSS"
-      ]
-    },
-    {
-      "name": "JavaScript Algorithms and Data Structures",
-      "courses": [
-        "JavaScript"
-      ]
-    },
-    {
-      "name": "Front End Development Libraries",
-      "courses": [
-        "Bootstrap",
-        "jQuery",
-        "Sass",
-        "React",
-        "Redux"
-      ]
-    },
-    {
-      "name": "Data Visualization",
-      "courses": [
-        "D3"
-      ]
-    },
-    {
-      "name": "Relational Database Course",
-      "courses": [
-        "Linux",
-        "SQL",
-        "PostgreSQL",
-        "Bash Scripting",
-        "Git and GitHub",
-        "Nano"
-      ]
-    },
-    {
-      "name": "Back End Development and APIs",
-      "courses": [
-        "MongoDB",
-        "Express",
-        "Node",
-        "NPM"
-      ]
-    },
-    {
-      "name": "Quality Assurance",
-      "courses": [
-        "Testing with Chai",
-        "Express",
-        "Node"
-      ]
-    },
-
-    {
-      "name": "Scientific Computing with Python",
-      "courses": [
-        "Python"
-      ]
-    },
-    {
-      "name": "Data Analysis with Python",
-      "courses": [
-        "Numpy",
-        "Pandas",
-        "Matplotlib",
-        "Seaborn"
-      ]
-    },
-    {
-      "name": "Information Security",
-      "courses": [
-        "HelmetJS"
-      ]
-    },
-    {
-      "name": "Machine Learning with Python",
-      "courses": [
-        "Machine Learning",
-        "TensorFlow"
-      ]
-    }
-  ]
-}

env/python/parser/parser.py

@@ -1,9 +0,0 @@
-import json
-
-
-with open('config.json', 'r') as config_file:
-    config_data = json.load(config_file)  
-   # print(config_data)
-   # print(json.dumps(config_data, indent=4))
-    print(json.dumps(config_data, indent=4, sort_keys=True))
-   

examples/pin_control.c

@@ -0,0 +1,87 @@
+/**
+ * @file gpio_control.c
+ * @brief CLI utility to control GPIOs using the KED GPIO interface (Linux).
+ */
+
+#include "../ked/peripherals/gpio/gpio.h"
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+#define GPIOCHIP_DEFAULT "/dev/gpiochip0"
+
+/**
+ * @brief Print usage message for the CLI tool.
+ */
+void print_usage(const char* prog_name) {
+    printf("Usage: %s -pin <number> -set|-reset|-toggle|-read\n", prog_name);
+}
+
+/**
+ * @brief Entry point for GPIO control CLI.
+ */
+int main(int argc, char* argv[]) {
+   
+    uint32_t pin = 0;
+    uint8_t action = 0xFF; // 0=set, 1=reset, 2=toggle, 3=read
+	
+	if (argc < 4) {
+        print_usage(argv[0]);
+        return 1;
+    }
+
+
+    for (int i = 1; i < argc; ++i) {
+        if (strcmp(argv[i], "-pin") == 0 && i + 1 < argc) {
+            pin = atoi(argv[++i]);
+        } else if (strcmp(argv[i], "-set") == 0) {
+            action = 0;
+        } else if (strcmp(argv[i], "-reset") == 0) {
+            action = 1;
+        } else if (strcmp(argv[i], "-toggle") == 0) {
+            action = 2;
+        } else if (strcmp(argv[i], "-read") == 0) {
+            action = 3;
+        }
+    }
+
+    if (pin == 0 || action == 0xFF) {
+        print_usage(argv[0]);
+        return 2;
+    }
+    
+	gpio_t led = {
+        .chipname = "/dev/gpiochip0",
+        .line_offset = pin,
+        .direction = (action == 3) ? T_GPIO_DIRECTION_INPUT : T_GPIO_DIRECTION_OUTPUT,
+        .bias = T_GPIO_BIAS_DEFAULT,
+        .mode = T_GPIO_MODE_DEFAULT,
+        .status = T_GPIO_STATUS_NOT_INIT,
+		.func = NULL
+    };
+
+
+	gpio_error_t err = ked_gpio_init(&led);
+    if (err != T_GPIO_ERR_OK) {
+        led.func->on_error(err);
+        return 1;
+    }
+
+    switch (action) {
+        case 0:
+			led.func->set(1);
+            break;
+        case 1:
+			led.func->set(0);
+            break;
+        case 2:
+			led.func->toggle();
+            break;
+        case 3:
+            printf("GPIO%u value: %d\n", pin, led.func->read());
+            break;
+    }
+
+    // Clean up
+    return 0;
+}

ked/CMakeLists.txt

@@ -0,0 +1,72 @@
+cmake_minimum_required(VERSION 3.10)
+project(ked_flexible_build C)
+
+set(CMAKE_C_STANDARD 11)
+
+
+
+# User must provide:
+# -DMAIN_FILE: the main .c file to compile
+
+
+# User must provide:
+# -DMAIN_FILE: the main .c file to compile
+if(NOT DEFINED MAIN_FILE)
+    message(FATAL_ERROR "MAIN_FILE must be specified.")
+endif()
+
+# Automatically infer PROJECT_ROOT as one level above this directory
+get_filename_component(PROJECT_ROOT "${CMAKE_CURRENT_SOURCE_DIR}/.." ABSOLUTE)
+
+message(STATUS "KED > CMAKE Dir: ${CMAKE_CURRENT_SOURCE_DIR}")
+message(STATUS "KED > Project Root Dir: ${PROJECT_ROOT}")
+
+
+
+# Interface headers to resolve against
+set(KED_HEADERS
+    ${CMAKE_CURRENT_SOURCE_DIR}/peripherals/gpio/gpio.h
+)
+
+
+set(KED_IMPL_SOURCES "")
+foreach(header ${KED_HEADERS})
+	message(STATUS "KED > Project Headers: ${KED_HEADERS}")
+    file(RELATIVE_PATH rel_path ${CMAKE_CURRENT_SOURCE_DIR} ${header})
+    string(REPLACE ".h" ".c" impl_rel_path ${rel_path})
+    set(impl_path "${PROJECT_ROOT}/${impl_rel_path}")
+
+    if(EXISTS ${impl_path})
+		message(STATUS "KED > Project Sources: ${impl_path}")
+        list(APPEND KED_IMPL_SOURCES ${impl_path})
+    else()
+		message(FATAL_ERROR "KED > Missing implementation for ${rel_path}: ${impl_path}")
+    endif()
+endforeach()
+
+set(KED_MAIN ${PROJECT_ROOT}/${MAIN_FILE})
+message(STATUS "KED > MAIN File: ${KED_MAIN}")
+
+# Create the executable
+add_executable(ked_executable
+	${KED_MAIN}
+    ${KED_IMPL_SOURCES}
+)
+
+# Use libgpiod if available
+find_package(PkgConfig)
+pkg_check_modules(GPIOD libgpiod)
+if(GPIOD_FOUND)
+	message(STATUS "KED > libgpiod found — defining KED_USES_LINUX")
+    target_compile_definitions(ked_executable PRIVATE KED_USES_LINUX)
+endif()
+
+target_include_directories(ked_executable PRIVATE
+    ${CMAKE_CURRENT_SOURCE_DIR}
+    ${PROJECT_ROOT}
+    ${GPIOD_INCLUDE_DIRS}
+)
+
+target_link_libraries(ked_executable
+    ${GPIOD_LIBRARIES}
+)

ked/peripherals/gpio/gpio.h

@@ -0,0 +1,156 @@
+/**
+ **************************************************************************************************
+ * @file       gpio.h
+ * @author     Kerem Yollu & Edwin Koch
+ * @date       24.04.2025
+ * @version    0.0.1
+ **************************************************************************************************
+ * @brief Platform-independent GPIO interface for the KED library.
+ *
+ * **Detailed Description :**
+ * This header defines a hardware abstraction layer (HAL) for General Purpose I/O (GPIO)
+ * that allows unified control of digital I/O pins across different platforms,
+ * such as microcontrollers or embedded Linux systems (e.g., Raspberry Pi).
+ *
+ * The implementation uses a centralized internal function pointer table to map
+ * platform-specific logic (e.g., Linux or STM32) to a unified interface.
+ * Application code can use `ked_gpio_set()`, `ked_gpio_read()` etc. without dealing with callbacks.
+ **************************************************************************************************
+ 
+ */
+
+#ifndef KED_PERIPHERALS_GPIO_H_
+#define KED_PERIPHERALS_GPIO_H_
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** GPIO Mode Types */
+typedef enum {
+    T_GPIO_MODE_DEFAULT,
+    T_GPIO_MODE_INPUT,
+    T_GPIO_MODE_OUTPUT,
+    T_GPIO_MODE_ANALOG,
+    T_GPIO_MODE_ALTERNATE
+} gpio_function_t;
+
+/** GPIO Direction (explicit) */
+typedef enum {
+    T_GPIO_DIRECTION_INPUT,
+    T_GPIO_DIRECTION_OUTPUT
+} gpio_direction_t;
+
+/** Drive types for output pins */
+typedef enum {
+    T_GPIO_DRIVE_DEFAULT,
+    T_GPIO_DRIVE_PUSH_PULL,
+    T_GPIO_DRIVE_OPEN_DRAIN
+} gpio_drive_t;
+
+/** Pull-up/pull-down configurations */
+typedef enum {
+    T_GPIO_BIAS_DEFAULT,
+    T_GPIO_BIAS_DISABLE,
+    T_GPIO_BIAS_PULL_UP,
+    T_GPIO_BIAS_PULL_DOWN
+} gpio_bias_t;
+
+/** Optional pin speed enumeration */
+typedef enum {
+    T_GPIO_SPEED_DEFAULT,
+    T_GPIO_SPEED_LOW,
+    T_GPIO_SPEED_MEDIUM,
+    T_GPIO_SPEED_HIGH,
+    T_GPIO_SPEED_VERY_HIGH
+} gpio_speed_t;
+
+/** Enable/disable pin interrupt */
+typedef enum {
+    T_GPIO_IRQ_DISABLED,
+    T_GPIO_IRQ_ENABLED
+} gpio_irq_t;
+
+/** GPIO Status */
+typedef enum {
+    T_GPIO_STATUS_NOT_INIT,   /**< GPIO is not initialized */
+    T_GPIO_STATUS_READY,      /**< GPIO is ready for use */
+    T_GPIO_STATUS_BUSY,       /**< GPIO is currently in use */
+    T_GPIO_STATUS_ERROR,      /**< GPIO encountered an error */
+    T_GPIO_STATUS_UPDATING     /**< GPIO is currently being reconfigured */
+} gpio_status_t;
+
+/** GPIO error status codes */
+typedef enum {
+    T_GPIO_ERR_OK,						/*!< Suscess flag for the Init Function */
+    T_GPIO_ERR_UNSUPPORTED_MODE,			/*!< Mode is either not valid orsupported by **Hardwaware** */
+	T_GPIO_ERR_UNSUPPORTED_ALTERNATE,		/*!< Alternateive mode is unvalid */
+    T_GPIO_ERR_BUS_BUSY,					/*!< The chosen GPIO BUS is already in Use */
+    T_GPIO_ERR_NOT_AVAILABLE,				/*!< Pin does Not aloow GPIO functionalities or does not Exists */ 
+    T_GPIO_ERR_NOT_BIASABLE,				/*!< No Pull-Up or Pull-Down Option are awailable */ 					
+    T_GPIO_ERR_NO_INTERRUPT_SUPPORT,		/*!< This GPIO Doesn't allow interrupts */ 					
+    T_GPIO_ERR_UNSUPPORTED_DRIVE,			/*!< This gate griving option is Unsupported (Pushpull, open drain etc..) */ 					
+	T_GPIO_ERR_UNSUPPORTED_SPEED,			/*!< The choosen bus speed is not supported */
+	T_GPIO_ERR_UNKNOWN					/*!< Goal Would be To never be Used, but can be helpful during Developpment */
+} gpio_error_t;
+
+/* === Function pointer types (used internally only) === */
+
+typedef void         (*fn_ptr_gpio_write)(uint8_t value);
+typedef uint8_t      (*fn_ptr_gpio_read)(void);
+typedef void         (*fn_ptr_gpio_toggle)(void);
+typedef void         (*fn_ptr_gpio_error)(gpio_error_t);
+typedef gpio_error_t (*fn_ptr_gpio_update)(void);
+
+/**
+ * @brief Internal function pointer table used by platform implementations.
+ */
+typedef struct {
+    fn_ptr_gpio_write   set;
+    fn_ptr_gpio_read    read;
+    fn_ptr_gpio_toggle  toggle;
+    fn_ptr_gpio_update  update;
+    fn_ptr_gpio_error   on_error;
+} gpio_fn_ptr_t;
+
+/* === Platform-specific types === */
+typedef struct gpio_s gpio_t;
+#ifdef KED_USES_LINUX
+/** GPIO configuration structure for Linux */
+struct gpio_s {
+    const char* chipname;
+    unsigned int line_offset;
+    gpio_function_t mode;
+    gpio_direction_t direction;
+    gpio_bias_t bias;
+    gpio_status_t status;
+	const gpio_fn_ptr_t* func;
+};
+#endif
+
+/* === Public API === */
+
+/**
+ * @brief Initialize a GPIO using the specified configuration.
+ *
+ * @param gpio Pointer to target gpio_t handle
+ * @return GPIO_OK on success, or an appropriate gpio_error_t
+ */
+gpio_error_t ked_gpio_init(gpio_t* gpio);
+
+/**
+ * @brief Deinitialize and release resources associated with a GPIO pin.
+ *
+ * @param gpio Pointer to GPIO object
+ */
+void ked_gpio_deinit(gpio_t* gpio);
+
+/* === Platform-agnostic GPIO control interface === */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* KED_PERIPHERALS_GPIO_H_ */

libraries/CMakeLists.txt

@@ -1 +0,0 @@
-set(LIBRARIES_LIST uart font)

libraries/examples/autoInit/main.c

@@ -1,33 +0,0 @@
-#include "main.h"
-#include "delay.h"
-#include "deviceSetup.h"
-#include "usart.h"
-#include "ascii.h"
-#include "timer.h"
-
-int main(int argc, char *argv[])
-{	
-	uint8_t i = 0;
-	
-	delayInitMs(8000000, 1000); // Clock Freq and Divider for ARM library 	
-
-	pinConfig(pinB3, output, pushPull, def_res, def_speed);
-	pinConfig(pinA0, input, def_stage, pullDown, def_speed);	
-	
-	setupInit(); // This is the sescond call of System init the assebly start code is calling it before the main.	
-	
-	usartInit(usart2, pinA2, pinA15, 115200, eight, NO_PARITY_CTRL, noFlowControl); 
-
-	//clears screen and send the wellcome messgae
-	print_Usart(usart2, ASCII_clear); 
-	print_Usart(usart2, "Hello to our KED project\n\r"); 	
-
-	while(1)
-	{
-		delayMs(100); 
-		pinToggle(pinB3);
-		delayMs(100); 
-	}
-	
-	return 1;
-}

libraries/examples/autoInit/main.h

@@ -1,15 +0,0 @@
-#ifndef MAIN_H
-#define MAIN_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include <stdint.h>
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* MAIN_H */

libraries/examples/autoInit/projectDefinitions.cmake

@@ -1,34 +0,0 @@
-###################################################################################################
-# Declaring new directories to be added to the project
-###################################################################################################
-# list()					= List declaration "DON'T CHANGE"
-# PROJECT_ADDITIONAL_DIRS	= Variable containing the listed direcotries "DON'T CHANCE"
-# .							= This indicates that the root file needs to de included "DON'T REMOVE"
-#
-# To include a new folder containing headers or sources that you want to compile
-# - The root of the project is where the main.c is located 
-# - Let's suppose your main.c is under : /home/yourUserName/YOurProjectName/main.c
-# - If we Make a new "Src" folder under /home/yourUserName/YOurProjectName/Src
-# - To add it to the project, 
-#	- Just include the Direwctory name "Src" the the Declarion WITHOUT THE LAST "/"
-#	- the declaration should look like this : list(APPEND PROJECT_ADDITIONAL_DIRS . Src)	
-list(APPEND PROJECT_ADDITIONAL_DIRS .)	
-
-###################################################################################################
-# Declaring sources to be compiled for the project. 
-###################################################################################################
-# KED will look in every PROJECT_ADDITIONAL_DIRS list an search for sources  
-# decalred by PROJECT_TO_COMPILE_LIST list
-#
-# To add a source file to the compilation
-# - Let's continue where we left off for the Directory inclusion.
-# - Now let's say you have source file named sensor.c located as follow : 
-#	-> /home/yourUserName/YOurProjectName/Src/sensor.c
-# - To let KED know that you want this source to be compiled, you simply ned to add it the list
-# - This would look like this : set(PROJECT_TO_COMPILE_LIST sensors.c)
-set(PROJECT_TO_COMPILE_LIST)
-
-# If you still have some question please have a look under : ked/libraries/examples/ 
-# There you can find some example projects with their corresponding "projectDefinitions.cmake".
-# To try one of them just copy the entirety of one example folders contend to the root of your
-# project where ked/ is located.

libraries/examples/i2c_oled_display/main.c

@@ -1,122 +0,0 @@
-#include "main.h"
-#include "delay.h"
-#include "deviceSetup.h"
-#include "usart.h"
-#include "ascii.h"
-#include "timer.h"
-#include "i2c.h"
-#include "ssd1306_i2c.h"
-#include "lcd_oled.h"
-
-int main(int argc, char *argv[])
-{	
-	uint8_t i = 0;
-	uint16_t slaveAddress = 0xC0; 
-	uint8_t registerToRead = 0x00; 
-	uint8_t i2cRecieved = 0; 
-	uint8_t i2cData = 0xFF; 
-
-	i2c_t i2c_1 = {	I2C_CH_1,					/*!< The harware channel to be used	*/	
-					i2c_mode_master,			/*!< Master Mode */
-					0x00,						/*!< First and Main address of the device */ 
-					0x00,						/*!< Second address if dual addresse mode is configured	*/
-					i2c_address_count_single,	/*!< Single address */ 
-					i2c_address_size_7b,		/*!< 10 or 7 bit address size */
-					i2c_clk_speed_standart,		/*!< Bus Speed: standart */  
-					i2c_clk_stretching_disable,	/*!< Clock Streching disabeled */
-					i2c_wake_disabled			/*!< Wake up condition : None */
-	};
-	
-	delayInitMs(8000000, 1000); // Clock Freq and Divider for ARM library 
-	
-	pinConfig(pinB3, output, pushPull, def_res, def_speed);
-	pinConfig(pinA0, input, def_stage, pullDown, def_speed);	
-	
-	setupInit(); // This is the sescond call of System init the assebly start code is calling it before the main.	
-	
-	usartInit(	usart2, 
-				pinA2, 
-				pinA15,
-				115200,
-				eight, 
-				NO_PARITY_CTRL,
-				noFlowControl); 
-
-	//clears screen and send the wellcome messgae
-	print_Usart(usart2, ASCII_clear); 
-	print_Usart(usart2, "Hello to our KED project\n\r"); 
-	
-
-	//blinks 10 times to indicate the sicsessfull init if the device
-	for(i = 0 ; i < 2 ; i++) {
-		delayMs(100); 
-		pinToggle(pinB3);
-		delayMs(100); 
-	}
-
-	pinWrite(pinB3,0);
-	
-	i2c_init(&i2c_1);
-	
-	slaveAddress = SSD1306_I2C_ADDRESS; 
-	registerToRead = 0x02; 
-	registerToRead = 0x06; 
-	i2cData = 0xAA;
-	uint8_t text[30]="KED Wellcomes You";
-	
-	i2c_check_device(&i2c_1, &slaveAddress);
-
-	/* Pin Connections of of OLED
-	 * GND = GND
-	 * VCC = 5V
-	 * DO = SCL
-	 * D1 = SDA 
-	 * RES = Require a low to high transition
-	 * DC = GND
-	 * CS = GND
-	 * ADDRESS = 0X3C
-	 * FOR I2C opperation 
-	 *	-> R4 & R1 : Has resistor | R2 & R3 : Has no Resistor 
-	 *	-> R8 Needs to be bridged
-	 */
-
-	lcd_oled_init(&i2c_1 , SSD1306_I2C_ADDRESS);
-	lcd_oled_display(); //Adafruit logo is visible
-	delayMs(500);
-
-	lcd_oled_clear();	
-
-	lcd_oled_print_text(0,5,text,18,WHITE);
-	lcd_oled_draw_line(64, 32, 0, 10, WHITE);
-	lcd_oled_draw_line(64, 32, 45, 10, WHITE);
-	lcd_oled_draw_line(64, 32, 90, 10, WHITE);
-	lcd_oled_draw_line(64, 32, 135, 10, WHITE);
-	lcd_oled_draw_line(64, 32, 180, 10, WHITE);
-	lcd_oled_draw_line(64, 32, 225, 10, WHITE);
-	lcd_oled_draw_line(64, 32, 270, 10, WHITE);
-	lcd_oled_draw_line(64, 32, 315, 10, WHITE);	
-	
-	lcd_oled_draw_circle(64, 32, 15, EMPTY, WHITE);
-	lcd_oled_draw_circle(10, 30, 10, FILLED, WHITE);
-
-	lcd_oled_draw_rectangle(10, 50, 10, 10, EMPTY, WHITE); 
-	lcd_oled_draw_rectangle(30, 50, 10, 10, FILLED, WHITE); 
-	
-
-	lcd_oled_display(&i2c_1);
-
-
-
-	print_Usart(usart2, "\n\r"); 
-	print_Usart(usart2, "All Is Working fine "); 
-	print_Usart(usart2, "\n\r"); 	
-
-	while(1)
-	{
-		delayMs(100); 
-		pinToggle(pinB3);
-		delayMs(100); 
-	}
-	
-	return 1;
-}

libraries/examples/i2c_oled_display/main.h

@@ -1,15 +0,0 @@
-#ifndef MAIN_H
-#define MAIN_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include <stdint.h>
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* MAIN_H */

libraries/examples/i2c_oled_display/projectDefinitions.cmake

@@ -1,34 +0,0 @@
-###################################################################################################
-# Declaring new directories to be added to the project
-###################################################################################################
-# list()					= List declaration "DON'T CHANGE"
-# PROJECT_ADDITIONAL_DIRS	= Variable containing the listed direcotries "DON'T CHANCE"
-# .							= This indicates that the root file needs to de included "DON'T REMOVE"
-#
-# To include a new folder containing headers or sources that you want to compile
-# - The root of the project is where the main.c is located 
-# - Let's suppose your main.c is under : /home/yourUserName/YOurProjectName/main.c
-# - If we Make a new "Src" folder under /home/yourUserName/YOurProjectName/Src
-# - To add it to the project, 
-#	- Just include the Direwctory name "Src" the the Declarion WITHOUT THE LAST "/"
-#	- the declaration should look like this : list(APPEND PROJECT_ADDITIONAL_DIRS . Src)	
-list(APPEND PROJECT_ADDITIONAL_DIRS .)	
-
-###################################################################################################
-# Declaring sources to be compiled for the project. 
-###################################################################################################
-# KED will look in every PROJECT_ADDITIONAL_DIRS list an search for sources  
-# decalred by PROJECT_TO_COMPILE_LIST list
-#
-# To add a source file to the compilation
-# - Let's continue where we left off for the Directory inclusion.
-# - Now let's say you have source file named sensor.c located as follow : 
-#	-> /home/yourUserName/YOurProjectName/Src/sensor.c
-# - To let KED know that you want this source to be compiled, you simply ned to add it the list
-# - This would look like this : set(PROJECT_TO_COMPILE_LIST sensors.c)
-set(PROJECT_TO_COMPILE_LIST)
-
-# If you still have some question please have a look under : ked/libraries/examples/ 
-# There you can find some example projects with their corresponding "projectDefinitions.cmake".
-# To try one of them just copy the entirety of one example folders contend to the root of your
-# project where ked/ is located.

libraries/examples/initWithConfig/headers/main.h

@@ -1,12 +0,0 @@
-#ifndef MAIN_H
-#define MAIN_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* MAIN_H */

libraries/examples/initWithConfig/headers/uartComm.h

@@ -1,17 +0,0 @@
-#ifndef UART_COMM_H
-#define UART_COMM_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-		
-void uartCommInit();
-void uartCommPrintWellcome();
-void uartCommPrintSensorActivate();
-void uartCommPrintSensorDeActivate();
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* UART_COMM_H */