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106 lines
2.9 KiB
106 lines
2.9 KiB
/**
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**************************************************************************************************
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* @file hwd_timer.h
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* @author Kerem Yollu & Edwin Koch
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* @date 26.02.2023
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* @version 1.0
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**************************************************************************************************
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* @brief
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*
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* **Detailed Description :**
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*
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**************************************************************************************************
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*/
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#ifndef _HWD_TIMER_H_
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#define _HWD_TIMER_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include "hardwareDescription.h"
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#define MAX_TIMER_CHANNEL_COUNT 6
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/*!
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* Enum for awailable timer DS Page: 12 (block diagaram) The order of the enums is very important
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* and should not be changed as it is used ofr table indexing
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* */
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typedef enum {
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timer_1, /*!< Advanced control 16-bit timer with PWM capability RM Page: 320 */
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timer_2, /*!< General purpose 32-bit timer RM Page: 393 */
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timer_3, /*!< General purpose 16-bit timer RM Page: 393 */
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timer_14, /*!< General purpose 16-bit timer RM Page: 459 */
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timer_16, /*!< General purpose 16-bit timer RM Page: 480 */
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timer_17 /*!< General purpose 16-bit timer RM Page: 480 */
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} timerNo_t;
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/*!
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* Timer base addresslist of all available timers
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* */
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static const uint32_t timerBase_Addr_List[MAX_TIMER_CHANNEL_COUNT] = {
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TIM1_BASE, /*!< Timer 1 Base Address */
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TIM2_BASE, /*!< Timer 2 Base Address */
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TIM3_BASE, /*!< Timer 3 Base Address */
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TIM14_BASE, /*!< Timer 14 Base Address */
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TIM16_BASE, /*!< Timer 16 Base Address */
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TIM17_BASE /*!< Timer 17 Base Address */
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};
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/*!
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* RCC clock enable bit position for the given register
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* */
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static const uint8_t timerBus_En_bitPos[MAX_TIMER_CHANNEL_COUNT] = {
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RCC_APB2ENR_TIM1EN_Pos,
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RCC_APB1ENR_TIM2EN_Pos,
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RCC_APB1ENR_TIM3EN_Pos,
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RCC_APB1ENR_TIM14EN_Pos,
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RCC_APB2ENR_TIM16EN_Pos,
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RCC_APB2ENR_TIM17EN_Pos
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};
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/*!
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* RCC timer Reset Bit Position list
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* */
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static const uint8_t timerBus_Rst_bitPos[MAX_TIMER_CHANNEL_COUNT] = {
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RCC_APB2RSTR_TIM1RST_Pos,
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RCC_APB1RSTR_TIM2RST_Pos,
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RCC_APB1RSTR_TIM3RST_Pos,
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RCC_APB1RSTR_TIM14RST_Pos,
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RCC_APB2RSTR_TIM16RST_Pos,
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RCC_APB2RSTR_TIM17RST_Pos
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};
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/*!
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* RCC Bus number index list connected to the timer
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* */
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static const uint8_t timerBus_No[MAX_TIMER_CHANNEL_COUNT] = {
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2, /*!< timer 1 is connected to bus 2 */
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1, /*!< timer 2 is connected to bus 1 */
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1, /*!< timer 3 is connected to bus 1 */
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1, /*!< timer 14 is connected to bus 1 */
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2, /*!< timer 16 is connected to bus 2 */
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2 /*!< timer 17 is connected to bus 2 */
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};
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/*!
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* Timer Prescaler resolution list TO BE DELETED IF NOT NEEDED
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* */
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static const uint32_t timerRes_Prescaler[MAX_TIMER_CHANNEL_COUNT] = {
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0xFFFF, /*!< Timer 1 Prescaler Max Value */
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0xFFFF, /*!< Timer 2 Prescaler Max Value */
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0xFFFF, /*!< Timer 3 Prescaler Max Value */
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0xFFFF, /*!< Timer 14 Prescaler Max Value */
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0xFFFF, /*!< Timer 16 Prescaler Max Value */
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0xFFFF, /*!< Timer 17 Prescaler Max Value */
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};
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#ifdef __cplusplus
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}
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#endif
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#endif // _HWD_TIMER_H_
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