/**
**************************************************************************************************
* @file		hwd_timer.h		
* @author	Kerem Yollu & Edwin Koch
* @date		26.02.2023
* @version	1.0
************************************************************************************************** 
* @brief
* 
* **Detailed Description :**
*	
**************************************************************************************************
*/

#ifndef _HWD_TIMER_H_
#define _HWD_TIMER_H_

#ifdef __cplusplus
extern "C" {
#endif

#include "hardwareDescription.h"

#define MAX_TIMER_CHANNEL_COUNT 6

/*!
 * Enum for awailable timer DS Page: 12 (block diagaram) The order of the enums is very important
 * and should not be changed as it is used ofr table indexing
 * */
typedef enum {
	timer_1,	/*!< Advanced control 16-bit timer with PWM capability RM Page: 320 */
	timer_2,	/*!< General purpose 32-bit timer RM Page: 393 */
	timer_3,	/*!< General purpose 16-bit timer RM Page: 393 */
	timer_14,	/*!< General purpose 16-bit timer RM Page: 459 */
	timer_16,	/*!< General purpose 16-bit timer RM Page: 480 */
	timer_17	/*!< General purpose 16-bit timer RM Page: 480 */
} timerNo_t;


/*!
 *	Timer base addresslist of all available timers
 * */
static const uint32_t timerBase_Addr_List[MAX_TIMER_CHANNEL_COUNT] = {
	TIM1_BASE,	/*!< Timer 1 Base Address */ 
	TIM2_BASE,	/*!< Timer 2 Base Address */
	TIM3_BASE,	/*!< Timer 3 Base Address */
	TIM14_BASE, /*!< Timer 14 Base Address */
	TIM16_BASE, /*!< Timer 16 Base Address */
	TIM17_BASE	/*!< Timer 17 Base Address */
};

/*!
 *	RCC clock enable bit position for the given register
 * */
static const uint8_t timerBus_En_bitPos[MAX_TIMER_CHANNEL_COUNT] = {
	RCC_APB2ENR_TIM1EN_Pos,
	RCC_APB1ENR_TIM2EN_Pos,
	RCC_APB1ENR_TIM3EN_Pos,
	RCC_APB1ENR_TIM14EN_Pos,
	RCC_APB2ENR_TIM16EN_Pos,
	RCC_APB2ENR_TIM17EN_Pos
};

/*!
 *	RCC timer Reset Bit Position list
 * */
static const uint8_t timerBus_Rst_bitPos[MAX_TIMER_CHANNEL_COUNT] = {
	RCC_APB2RSTR_TIM1RST_Pos,
	RCC_APB1RSTR_TIM2RST_Pos,
	RCC_APB1RSTR_TIM3RST_Pos,
	RCC_APB1RSTR_TIM14RST_Pos,
	RCC_APB2RSTR_TIM16RST_Pos,
	RCC_APB2RSTR_TIM17RST_Pos
};

/*!
 *	RCC Bus number index list connected to the timer 
 * */
static const uint8_t timerBus_No[MAX_TIMER_CHANNEL_COUNT] = {
	2, /*!< timer 1 is connected to bus 2 */
	1, /*!< timer 2 is connected to bus 1 */
	1, /*!< timer 3 is connected to bus 1 */
	1, /*!< timer 14 is connected to bus 1 */
	2, /*!< timer 16 is connected to bus 2 */
	2  /*!< timer 17 is connected to bus 2 */
};

/*! 
 * Timer Prescaler resolution list TO BE DELETED IF NOT NEEDED
 * */
static const  uint32_t timerRes_Prescaler[MAX_TIMER_CHANNEL_COUNT] = {
	0xFFFF, /*!< Timer 1 Prescaler Max Value */ 
	0xFFFF, /*!< Timer 2 Prescaler Max Value */ 
	0xFFFF, /*!< Timer 3 Prescaler Max Value */ 
	0xFFFF, /*!< Timer 14 Prescaler Max Value */ 
	0xFFFF, /*!< Timer 16 Prescaler Max Value */ 
	0xFFFF, /*!< Timer 17 Prescaler Max Value */ 
};


#ifdef __cplusplus
}
#endif

#endif // _HWD_TIMER_H_