work on interface and implementation of spi

ked/csl/interfaces/spi.h

@@ -39,6 +39,12 @@ typedef enum{
  */
 void spi_init(spiCH_t spi_hw_ch);
 
+/**
+ * @brief SPI hardware peripheral reset
+ * @param spi_hw_ch SPI hardware channel
+ */
+void spi_reset(spiCH_t spi_hw_ch);
+
 /**
  * @brief Enable spi hardware channel
  * @param spi_hw_ch SPI hardware channel
@@ -47,23 +53,26 @@ void spi_enable(spiCH_t spi_hw_ch);
 
 /**
  * @brief set SPI clock polarity
+ * @param spi_hw_ch SPI hardware channel
  * @param clkPol Clock polarity
  */
-void spi_setPolarity(spi_clkPol_t clkPol);
+void spi_setPolarity(spiCH_t spi_hw_ch, spi_clkPol_t clkPol);
 
 /**
  * @brief Set SPI frame format
+ * @param spi_hw_ch SPI hardware cannel
  * @param framef Frame format
  */
-void spi_set_setFrameFormat(spi_framef_t framef);
+void spi_set_setFrameFormat(spiCH_t spi_hw_ch, spi_framef_t framef);
 
 /**
  * @brief Set Clock Prescaler
  * This is dependent on your target device. Please enter in the correct value.
  * The entered Value will be masked with the maximal number of bits (truncated)
+ * @param spi_hw_ch SPI hardware channel
  * @param clkDiv
  */
-void spi_setClockPrescaler(uint32_t clkDiv);
+void spi_setClockPrescaler(spiCH_t spi_hw_ch,uint32_t clkDiv);
 
 /*!
  * @brief Transmits and receives on byte of data

ked/csl/stm32f042/Device/hardwareDescription.h

@@ -231,17 +231,46 @@ static const  uint32_t timerRes_Prescaler[MAX_TIMER_CHANNEL_COUNT] = {
 };
 
 
+/*!
+ *	RCC Bus number index list connected to the SPI 
+ * */
+static const uint8_t spiBus_No[MAX_SPI_CHANNEL_COUNT] = {
+	2, /*!< SPI 1 is connected to bus 2 */
+	1  /*!< SPI 2 is connected to bus 1 */
+};
+
+/*!
+ *	RCC SPI clock enable bit position for the given register
+ * 
+ */
+static const uint8_t spiBus_En_bitPos[MAX_SPI_CHANNEL_COUNT] = {
+	RCC_APB2ENR_SPI1EN_Pos,
+	RCC_APB1ENR_SPI2EN_Pos
+};
+
+/*!
+ *	RCC SPI Reset Bit Position list
+ * */
+static const uint8_t spiBus_Rst_bitPos[MAX_SPI_CHANNEL_COUNT] = {
+	RCC_APB2RSTR_SPI1RST_Pos,
+	RCC_APB1RSTR_SPI2RST_Pos
+};
+
+/**
+ * Enumof available spi hardware channels
+ */
 typedef enum{
 	SPI_CH_1,
 	SPI_CH_2
 } spiCH_t;
-
+/**
+ * SPI base address list
+ */
 static const uint32_t spiBase_Addr_List[MAX_SPI_CHANNEL_COUNT] =  {
 	SPI1_BASE,
 	SPI2_BASE
 };
 
-
 #ifdef __cplusplus
 }
 #endif

ked/csl/stm32f042/Src/spi.c

@@ -6,6 +6,7 @@
 
 void spi_init(spiCH_t spi_hw_ch)
 {
+	spi_reset(spi_hw_ch);
 	// TODO implement bittwiddeling etc. for generic SPI init
 	RCC->APB2ENR |= (1<<12);  // Enable SPI1 CLock
 	
@@ -36,22 +37,34 @@ void spi_init(spiCH_t spi_hw_ch)
 	SPI_BASE->CR2 = 0;
 }
 
+void spi_reset(spiCH_t spi_hw_ch)
+{
+	if(spiBus_No[spi_hw_ch] == 1) {
+		RCC->APB1RSTR |= (1 << spiBus_Rst_bitPos[spi_hw_ch]);
+		RCC->APB1RSTR &= ~(1 << spiBus_Rst_bitPos[spi_hw_ch]);
+		return;
+	}
+
+	RCC->APB2RSTR |= (1 << spiBus_Rst_bitPos[spi_hw_ch]);
+	RCC->APB2RSTR &= ~(1 << spiBus_Rst_bitPos[spi_hw_ch]);
+}
+
 void spi_enable(spiCH_t spi_hw_ch)
 {
 	//TODO void spi_enable(spiCH_t spi_hw_ch);
 }
 
-void spi_setPolarity(spi_clkPol_t clkPol)
+void spi_setPolarity(spiCH_t spi_hw_ch, spi_clkPol_t clkPol)
 {
 	//TODO void spi_setPolarity(spi_clkPol_t clkPol);
 }
 
-void spi_set_setFrameFormat(spi_framef_t framef)
+void spi_set_setFrameFormat(spiCH_t spi_hw_ch, spi_framef_t framef)
 {
 	//TODO void spi_set_setFrameFormat(spi_framef_t framef);
 }
 
-void spi_set_setFrameFormat(spi_framef_t framef)
+void spi_set_setFrameFormat(spiCH_t spi_hw_ch, spi_framef_t framef)
 {
 	// TODO void spi_set_setFrameFormat(spi_framef_t framef);
 }