working on spi init function

ked/csl/stm32f042/Src/spi.c

@@ -6,25 +6,54 @@
 
 void spi_init(spiCH_t spi_hw_ch)
 {
+	// TODO implement bittwiddeling etc. for generic SPI init
 	RCC->APB2ENR |= (1<<12);  // Enable SPI1 CLock
 	
-	SPI1->CR1 |= (1<<0)|(1<<1);   // CPOL=1, CPHA=1
 	
-    SPI1->CR1 |= (1<<2);  // Master Mode
-		
-	SPI1->CR1 |= (3<<3);  // BR[2:0] = 011: fPCLK/16, PCLK2 = 80MHz, SPI clk = 5MHz
-		
-	SPI1->CR1 &= ~(1<<7);  // LSBFIRST = 0, MSB first
-			
-	SPI1->CR1 |= (1<<8) | (1<<9);  // SSM=1, SSi=1 -> Software Slave Management
-			
-	SPI1->CR1 &= ~(1<<10);  // RXONLY = 0, full-duplex
-				
-	SPI1->CR1 &= ~(1<<11);  // DFF=0, 8 bit data
-				
-	SPI1->CR2 = 0;
-
-	SPI1->CR1 |= (1 << 6);	// enable SPI1
+	
+	//SPI1->CR1 |= (1<<0)|(1<<1);   // CPOL=1, CPHA=1
+	SPI_BASE->CR1(1<<2)	
+
+    //SPI1->CR1 |= (1<<2);  // Master Mode
+	SPI_BASE->CR1 |= (1 << 2);
+
+	//SPI1->CR1 |= (3<<3);  // BR[2:0] = 011: fPCLK/16, PCLK2 = 80MHz, SPI clk = 5MHz
+	SPI_BASE-> CR1 |= (3<<3);	
+
+	//SPI1->CR1 &= ~(1<<7);  // LSBFIRST = 0, MSB first
+	SPI_BASE->CR1 &= ~(1<<7);	
+
+	//SPI1->CR1 |= (1<<8) | (1<<9);  // SSM=1, SSi=1 -> Software Slave Management
+	SPI_BASE->CR1 |= (1 << 8) | (1 << 9);	
+
+	//SPI1->CR1 &= ~(1<<10);  // RXONLY = 0, full-duplex
+	SPI_BASE->CR1 &= ~(1<<10);	
+
+	//SPI1->CR1 &= ~(1<<11);  // DFF=0, 8 bit data
+	SPI_BASE->CR1 &= ~(1 << 11);
+
+	//SPI1->CR2 = 0;
+	SPI_BASE->CR2 = 0;
+}
+
+void spi_enable(spiCH_t spi_hw_ch)
+{
+	//TODO void spi_enable(spiCH_t spi_hw_ch);
+}
+
+void spi_setPolarity(spi_clkPol_t clkPol)
+{
+	//TODO void spi_setPolarity(spi_clkPol_t clkPol);
+}
+
+void spi_set_setFrameFormat(spi_framef_t framef)
+{
+	//TODO void spi_set_setFrameFormat(spi_framef_t framef);
+}
+
+void spi_set_setFrameFormat(spi_framef_t framef)
+{
+	// TODO void spi_set_setFrameFormat(spi_framef_t framef);
 }
 
 uint8_t spi_trx(spiCH_t spi_hw_ch, uint8_t tx_data)