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95 lines
2.2 KiB
95 lines
2.2 KiB
#include "spi.h"
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#define SPI_BASE ((SPI_TypeDef *)spiBase_Addr_List[spi_hw_ch])
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// https://controllerstech.com/spi-using-registers-in-stm32/
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void spi_init(spiCH_t spi_hw_ch)
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{
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spi_reset(spi_hw_ch);
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// TODO implement bittwiddeling etc. for generic SPI init
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RCC->APB2ENR |= (1<<12); // Enable SPI1 CLock
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//SPI1->CR1 |= (1<<0)|(1<<1); // CPOL=1, CPHA=1
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SPI_BASE->CR1 |= (1<<2) | (1 << 1);
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//SPI1->CR1 |= (1<<2); // Master Mode
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SPI_BASE->CR1 |= (1 << 2);
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//SPI1->CR1 |= (3<<3); // BR[2:0] = 011: fPCLK/16, PCLK2 = 80MHz, SPI clk = 5MHz
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SPI_BASE-> CR1 |= (3<<3);
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//SPI1->CR1 &= ~(1<<7); // LSBFIRST = 0, MSB first
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SPI_BASE->CR1 &= ~(1<<7);
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//SPI1->CR1 |= (1<<8) | (1<<9); // SSM=1, SSi=1 -> Software Slave Management
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SPI_BASE->CR1 |= (1 << 8) | (1 << 9);
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//SPI1->CR1 &= ~(1<<10); // RXONLY = 0, full-duplex
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SPI_BASE->CR1 &= ~(1<<10);
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//SPI1->CR1 &= ~(1<<11); // DFF=0, 8 bit data
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SPI_BASE->CR1 &= ~(1 << 11);
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//SPI1->CR2 = 0;
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SPI_BASE->CR2 = 0;
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}
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void spi_reset(spiCH_t spi_hw_ch)
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{
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if(spiBus_No[spi_hw_ch] == 1) {
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RCC->APB1RSTR |= (1 << spiBus_Rst_bitPos[spi_hw_ch]);
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RCC->APB1RSTR &= ~(1 << spiBus_Rst_bitPos[spi_hw_ch]);
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return;
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}
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RCC->APB2RSTR |= (1 << spiBus_Rst_bitPos[spi_hw_ch]);
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RCC->APB2RSTR &= ~(1 << spiBus_Rst_bitPos[spi_hw_ch]);
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}
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void spi_enable(spiCH_t spi_hw_ch)
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{
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//TODO void spi_enable(spiCH_t spi_hw_ch);
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}
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void spi_setPolarity(spiCH_t spi_hw_ch, spi_clkPol_t clkPol)
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{
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//TODO void spi_setPolarity(spi_clkPol_t clkPol);
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}
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void spi_set_setFrameFormat(spiCH_t spi_hw_ch, spi_framef_t framef)
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{
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// TODO void spi_set_setFrameFormat(spi_framef_t framef);
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}
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uint8_t spi_trx(spiCH_t spi_hw_ch, uint8_t tx_data)
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{
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uint8_t data;
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// example
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while (((SPI1->SR)&(1<<7))); // wait for BSY bit to Reset -> This will indicate that SPI is not busy in communication
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SPI1->DR = tx_data; // send data
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while (!((SPI1->SR) &(1<<0))); // Wait for RXNE to set -> This will indicate that the Rx buffer is not empty
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data = SPI1->DR;
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return data;
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// implementation 2. step
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#if 0
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// wait for SPY ready
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while((SPI_BASE->SR) & (1 << 7));
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// load tx data
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SPI_BASE->DR = tx_data;
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// Wait for RXNE flag to be set which indicates transmit complete
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while(!((SPI_BASE->SR) & (1<<0));
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return SPI_BASE->DR;
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#endif
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}
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