#include "spi.h"

#define SPI_BASE	((SPI_TypeDef *)spiBase_Addr_List[spi_hw_ch])

// https://controllerstech.com/spi-using-registers-in-stm32/

void spi_init(spiCH_t spi_hw_ch)
{
	spi_reset(spi_hw_ch);

	// TODO implement bittwiddeling etc. for generic SPI init
	RCC->APB2ENR |= (1<<12);  // Enable SPI1 CLock	
	
	//SPI1->CR1 |= (1<<0)|(1<<1);   // CPOL=1, CPHA=1
	SPI_BASE->CR1 |= (1<<2) | (1 << 1);	

    //SPI1->CR1 |= (1<<2);  // Master Mode
	SPI_BASE->CR1 |= (1 << 2);

	//SPI1->CR1 |= (3<<3);  // BR[2:0] = 011: fPCLK/16, PCLK2 = 80MHz, SPI clk = 5MHz
	SPI_BASE-> CR1 |= (3<<3);	

	//SPI1->CR1 &= ~(1<<7);  // LSBFIRST = 0, MSB first
	SPI_BASE->CR1 &= ~(1<<7);	

	//SPI1->CR1 |= (1<<8) | (1<<9);  // SSM=1, SSi=1 -> Software Slave Management
	SPI_BASE->CR1 |= (1 << 8) | (1 << 9);	

	//SPI1->CR1 &= ~(1<<10);  // RXONLY = 0, full-duplex
	SPI_BASE->CR1 &= ~(1<<10);	

	//SPI1->CR1 &= ~(1<<11);  // DFF=0, 8 bit data
	SPI_BASE->CR1 &= ~(1 << 11);

	//SPI1->CR2 = 0;
	SPI_BASE->CR2 = 0;
}

void spi_reset(spiCH_t spi_hw_ch)
{
	if(spiBus_No[spi_hw_ch] == 1) {
		RCC->APB1RSTR |= (1 << spiBus_Rst_bitPos[spi_hw_ch]);
		RCC->APB1RSTR &= ~(1 << spiBus_Rst_bitPos[spi_hw_ch]);
		return;
	}

	RCC->APB2RSTR |= (1 << spiBus_Rst_bitPos[spi_hw_ch]);
	RCC->APB2RSTR &= ~(1 << spiBus_Rst_bitPos[spi_hw_ch]);
}

void spi_enable(spiCH_t spi_hw_ch)
{
	//TODO void spi_enable(spiCH_t spi_hw_ch);
}

void spi_setPolarity(spiCH_t spi_hw_ch, spi_clkPol_t clkPol)
{
	//TODO void spi_setPolarity(spi_clkPol_t clkPol);
}

void spi_set_setFrameFormat(spiCH_t spi_hw_ch, spi_framef_t framef)
{
	// TODO void spi_set_setFrameFormat(spi_framef_t framef);
}

uint8_t spi_trx(spiCH_t spi_hw_ch, uint8_t tx_data)
{
	uint8_t data;
	// example


	while (((SPI1->SR)&(1<<7)));  // wait for BSY bit to Reset -> This will indicate that SPI is not busy in communication
	
	SPI1->DR = tx_data;  // send data
	
	while (!((SPI1->SR) &(1<<0)));  // Wait for RXNE to set -> This will indicate that the Rx buffer is not empty
	data = SPI1->DR;
	
	return data;

// implementation 2. step
#if 0
	// wait for SPY ready
	while((SPI_BASE->SR) & (1 << 7));

	// load tx data
	SPI_BASE->DR = tx_data;

	// Wait for RXNE flag to be set which indicates transmit complete
	while(!((SPI_BASE->SR) & (1<<0));
	
	return SPI_BASE->DR;
#endif
}