Kerem
/
KED
1
0
Fork 0
Code Issues Pull Requests Projects 1 Releases Wiki Activity

Implmentation of hardwareDefinition.h sucessfully working. ./ideas/hw.h implemented & deleted

Browse Source
interrupts
key 4 years ago
parent 8144247296
commit fe9556b033
3 changed files with 98 additions and 128 deletions
Show Stats Download Patch File Download Diff File

174
bsl/csl/stm32f042/Device/hardwareDescription.h
Unescape View File

@ -1,85 +1,108 @@
/*! Enum of the awailable pins for this package */ /*! Enum of the awailable pins for this package */
#include "stm32f042x6.h" #include "stm32f042x6.h"
typedef enum
{
// NAME = BASE ADDR | PORT | PIN NO
pinA0 = GPIOA_BASE | 0x00 | 0, /*!< Port: A Pin: 0 -> GPIOA_BASE | Port A Mask | Pin Mask */
pinA1 = GPIOA_BASE | 0x00 | 1, /*!< Port: A Pin: 1 -> GPIOA_BASE | Port A Mask | Pin Mask */
pinA2 = GPIOA_BASE | 0x00 | 2, /*!< Port: A Pin: 2 -> GPIOA_BASE | Port A Mask | Pin Mask */
pinA3 = GPIOA_BASE | 0x00 | 3, /*!< Port: A Pin: 3 -> GPIOA_BASE | Port A Mask | Pin Mask */
pinA4 = GPIOA_BASE | 0x00 | 4, /*!< Port: A Pin: 4 -> GPIOA_BASE | Port A Mask | Pin Mask */
pinA5 = GPIOA_BASE | 0x00 | 5, /*!< Port: A Pin: 5 -> GPIOA_BASE | Port A Mask | Pin Mask */
pinA6 = GPIOA_BASE | 0x00 | 6, /*!< Port: A Pin: 6 -> GPIOA_BASE | Port A Mask | Pin Mask */
pinA7 = GPIOA_BASE | 0x00 | 7, /*!< Port: A Pin: 7 -> GPIOA_BASE | Port A Mask | Pin Mask */
pinA8 = GPIOA_BASE | 0x00 | 8, /*!< Port: A Pin: 8 -> GPIOA_BASE | Port A Mask | Pin Mask */
pinA9 = GPIOA_BASE | 0x00 | 9, /*!< Port: A Pin: 9 -> GPIOA_BASE | Port A Mask | Pin Mask */
pinA10 = GPIOA_BASE | 0x00 | 10,/*!< Port: A Pin: 10 -> GPIOA_BASE | Port A Mask | Pin Mask */
pinA11 = GPIOA_BASE | 0x00 | 11,/*!< Port: A Pin: 11 -> GPIOA_BASE | Port A Mask | Pin Mask */
pinA12 = GPIOA_BASE | 0x00 | 12,/*!< Port: A Pin: 12 -> GPIOA_BASE | Port A Mask | Pin Mask */
pinA13 = GPIOA_BASE | 0x00 | 13,/*!< Port: A Pin: 13 -> GPIOA_BASE | Port A Mask | Pin Mask */
pinA14 = GPIOA_BASE | 0x00 | 14,/*!< Port: A Pin: 14 -> GPIOA_BASE | Port A Mask | Pin Mask */
pinA15 = GPIOA_BASE | 0x00 | 15,/*!< Port: A Pin: 15 -> GPIOA_BASE | Port A Mask | Pin Mask */
pinB0 = GPIOB_BASE | 0x10 | 0, /*!< Port: B Pin: 0 -> GPIOB_BASE | Port B Mask | Pin Mask */ #define MAX_N_PORTS_COUNT 3
pinB1 = GPIOB_BASE | 0x10 | 1, /*!< Port: B Pin: 1 -> GPIOB_BASE | Port B Mask | Pin Mask */ #define MAX_PORT_PINS_COUNT 16
pinB3 = GPIOB_BASE | 0x10 | 3, /*!< Port: B Pin: 3 -> GPIOB_BASE | Port B Mask | Pin Mask */ #define MAX_N_PIN_ALT_FUNC 8
pinB4 = GPIOB_BASE | 0x10 | 4, /*!< Port: B Pin: 4 -> GPIOB_BASE | Port B Mask | Pin Mask */
pinB5 = GPIOB_BASE | 0x10 | 5, /*!< Port: B Pin: 5 -> GPIOB_BASE | Port B Mask | Pin Mask */
pinB6 = GPIOB_BASE | 0x10 | 6, /*!< Port: B Pin: 6 -> GPIOB_BASE | Port B Mask | Pin Mask */
pinB7 = GPIOB_BASE | 0x10 | 7, /*!< Port: B Pin: 7 -> GPIOB_BASE | Port B Mask | Pin Mask */
pinB8 = GPIOB_BASE | 0x10 | 8, /*!< Port: B Pin: 8 -> GPIOB_BASE | Port B Mask | Pin Mask */
pinF0 = GPIOF_BASE | 0x20 | 0, /*!< Port: F Pin: 0 -> GPIOF_BASE | Port F Mask | Pin Mask */ #define MAX_PORT_A_PIN_NO 15
pinF1 = GPIOF_BASE | 0x20 | 1 /*!< Port: F Pin: 1 -> GPIOF_BASE | Port F Mask | Pin Mask */ #define MAX_PORT_B_PIN_NO 15
}pinNo_t; #define MAX_PORT_F_PIN_NO 1
#ifdef something
typedef enum typedef enum
{ {
// NAME = | PORT | PIN NO // NAME = BASE ADDR | PORT | PIN NO
pinA0 = 0x00 | 0 , /*!< Port: A Pin: 0 -> GPIOA_BASE | Port A Mask | Pin Mask */ pinA0 = 0x00 | 0, /*!< Port: A Pin: 0 -> Port A Mask | Pin Mask */
pinA1 = GPIOA_BASE | 0x00 | 1, /*!< Port: A Pin: 1 -> GPIOA_BASE | Port A Mask | Pin Mask */ pinA1 = 0x00 | 1, /*!< Port: A Pin: 1 -> Port A Mask | Pin Mask */
pinA2 = GPIOA_BASE | 0x00 | 2, /*!< Port: A Pin: 2 -> GPIOA_BASE | Port A Mask | Pin Mask */ pinA2 = 0x00 | 2, /*!< Port: A Pin: 2 -> Port A Mask | Pin Mask */
pinA3 = GPIOA_BASE | 0x00 | 3, /*!< Port: A Pin: 3 -> GPIOA_BASE | Port A Mask | Pin Mask */ pinA3 = 0x00 | 3, /*!< Port: A Pin: 3 -> Port A Mask | Pin Mask */
pinA4 = GPIOA_BASE | 0x00 | 4, /*!< Port: A Pin: 4 -> GPIOA_BASE | Port A Mask | Pin Mask */ pinA4 = 0x00 | 4, /*!< Port: A Pin: 4 -> Port A Mask | Pin Mask */
pinA5 = GPIOA_BASE | 0x00 | 5, /*!< Port: A Pin: 5 -> GPIOA_BASE | Port A Mask | Pin Mask */ pinA5 = 0x00 | 5, /*!< Port: A Pin: 5 -> Port A Mask | Pin Mask */
pinA6 = GPIOA_BASE | 0x00 | 6, /*!< Port: A Pin: 6 -> GPIOA_BASE | Port A Mask | Pin Mask */ pinA6 = 0x00 | 6, /*!< Port: A Pin: 6 -> Port A Mask | Pin Mask */
pinA7 = GPIOA_BASE | 0x00 | 7, /*!< Port: A Pin: 7 -> GPIOA_BASE | Port A Mask | Pin Mask */ pinA7 = 0x00 | 7, /*!< Port: A Pin: 7 -> Port A Mask | Pin Mask */
pinA8 = GPIOA_BASE | 0x00 | 8, /*!< Port: A Pin: 8 -> GPIOA_BASE | Port A Mask | Pin Mask */ pinA8 = 0x00 | 8, /*!< Port: A Pin: 8 -> Port A Mask | Pin Mask */
pinA9 = GPIOA_BASE | 0x00 | 9, /*!< Port: A Pin: 9 -> GPIOA_BASE | Port A Mask | Pin Mask */ pinA9 = 0x00 | 9, /*!< Port: A Pin: 9 -> Port A Mask | Pin Mask */
pinA10 = GPIOA_BASE | 0x00 | 10,/*!< Port: A Pin: 10 -> GPIOA_BASE | Port A Mask | Pin Mask */ pinA10 = 0x00 | 10, /*!< Port: A Pin: 10 -> Port A Mask | Pin Mask */
pinA11 = GPIOA_BASE | 0x00 | 11,/*!< Port: A Pin: 11 -> GPIOA_BASE | Port A Mask | Pin Mask */ pinA11 = 0x00 | 11, /*!< Port: A Pin: 11 -> Port A Mask | Pin Mask */
pinA12 = GPIOA_BASE | 0x00 | 12,/*!< Port: A Pin: 12 -> GPIOA_BASE | Port A Mask | Pin Mask */ pinA12 = 0x00 | 12, /*!< Port: A Pin: 12 -> Port A Mask | Pin Mask */
pinA13 = GPIOA_BASE | 0x00 | 13,/*!< Port: A Pin: 13 -> GPIOA_BASE | Port A Mask | Pin Mask */ pinA13 = 0x00 | 13, /*!< Port: A Pin: 13 -> Port A Mask | Pin Mask */
pinA14 = GPIOA_BASE | 0x00 | 14,/*!< Port: A Pin: 14 -> GPIOA_BASE | Port A Mask | Pin Mask */ pinA14 = 0x00 | 14, /*!< Port: A Pin: 14 -> Port A Mask | Pin Mask */
pinA15 = GPIOA_BASE | 0x00 | 15,/*!< Port: A Pin: 15 -> GPIOA_BASE | Port A Mask | Pin Mask */ pinA15 = 0x00 | 15, /*!< Port: A Pin: 15 -> Port A Mask | Pin Mask */
pinB0 = GPIOB_BASE | 0x10 | 0, /*!< Port: B Pin: 0 -> GPIOB_BASE | Port B Mask | Pin Mask */ pinB0 = 0x10 | 0, /*!< Port: B Pin: 0 -> Port B Mask | Pin Mask */
pinB1 = GPIOB_BASE | 0x10 | 1, /*!< Port: B Pin: 1 -> GPIOB_BASE | Port B Mask | Pin Mask */ pinB1 = 0x10 | 1, /*!< Port: B Pin: 1 -> Port B Mask | Pin Mask */
pinB3 = GPIOB_BASE | 0x10 | 3, /*!< Port: B Pin: 3 -> GPIOB_BASE | Port B Mask | Pin Mask */ pinB3 = 0x10 | 3, /*!< Port: B Pin: 3 -> Port B Mask | Pin Mask */
pinB4 = GPIOB_BASE | 0x10 | 4, /*!< Port: B Pin: 4 -> GPIOB_BASE | Port B Mask | Pin Mask */ pinB4 = 0x10 | 4, /*!< Port: B Pin: 4 -> Port B Mask | Pin Mask */
pinB5 = GPIOB_BASE | 0x10 | 5, /*!< Port: B Pin: 5 -> GPIOB_BASE | Port B Mask | Pin Mask */ pinB5 = 0x10 | 5, /*!< Port: B Pin: 5 -> Port B Mask | Pin Mask */
pinB6 = GPIOB_BASE | 0x10 | 6, /*!< Port: B Pin: 6 -> GPIOB_BASE | Port B Mask | Pin Mask */ pinB6 = 0x10 | 6, /*!< Port: B Pin: 6 -> Port B Mask | Pin Mask */
pinB7 = GPIOB_BASE | 0x10 | 7, /*!< Port: B Pin: 7 -> GPIOB_BASE | Port B Mask | Pin Mask */ pinB7 = 0x10 | 7, /*!< Port: B Pin: 7 -> Port B Mask | Pin Mask */
pinB8 = GPIOB_BASE | 0x10 | 8, /*!< Port: B Pin: 8 -> GPIOB_BASE | Port B Mask | Pin Mask */ pinB8 = 0x10 | 8, /*!< Port: B Pin: 8 -> Port B Mask | Pin Mask */
pinF0 = GPIOF_BASE | 0x20 | 0, /*!< Port: F Pin: 0 -> GPIOF_BASE | Port F Mask | Pin Mask */ pinF0 = 0x20 | 0, /*!< Port: F Pin: 0 -> Port F Mask | Pin Mask */
pinF1 = GPIOF_BASE | 0x20 | 1 /*!< Port: F Pin: 1 -> GPIOF_BASE | Port F Mask | Pin Mask */ pinF1 = 0x20 | 1 /*!< Port: F Pin: 1 -> Port F Mask | Pin Mask */
}newpinNo_t; }pinNo_t;
static const uint32_t portBase_Addr_List[3] = {GPIOA_BASE, GPIOB_BASE, GPIOF_BASE};
#define MAX_NO_ALT_PER_PIN 8 static const uint8_t altFunc_List[MAX_N_PORTS_COUNT][MAX_PORT_PINS_COUNT] = {
{ // PORT A
// 1 for available 0 for Prohibioted (blank) 0b01110000, //PA0
static const uint8_t pinAltList[3][15] = { 0b11110000, //PA1
{0b0111000, 0b11110000, }, 0b01110000, //PA2
{...}, 0b01110000, //PA3
{...} 0b11111000, //PA4
0b11110000, //PA5
0b11110110, //PA6
0b11111110, //PA7
0b11111000, //PA8
0b01111100, //PA9
0b11111000, //PA10
0b11111100, //PA11
0b11111100, //PA12
0b11100000, //PA13
0b11000000, //PA14
0b11110100 //PA15
},
{ // PORT B
0b11110000, //PB0
0b11110000, //PB1
0b00010000, //PB2
0b11110000, //PB3
0b11110100, //PB4
0b11110000, //PB5
0b11110000, //PB6
0b11110000, //PB7
0b11111000, //PB8
0b11111100, //PB9
0b11110100, //PB10
0b11100000, //PB11
0b11100000, //PB12
0b10100100, //PB13
0b10100100, //PB14
0b10100000 //PB15
},
{ // PORT F
0b11000000, //PF0
0b01000000, //PF1
0b00000000, //N.A
0b00000000, //N.A
0b00000000, //N.A
0b00000000, //N.A
0b00000000, //N.A
0b00000000, //N.A
0b00000000, //N.A
0b00000000, //N.A
0b00000000, //N.A
0b00000000, //N.A
0b00000000, //N.A
0b00000000, //N.A
0b00000000, //N.A
0b00000000 //N.A
}
}; };
static const uint32_t PortBase_Addr_List[3] = {GPIOA_BASE, GPIOB_BASE, GPIOF_BASE};
/*
void setAlt(pin_no_t id, uint8_t af) void setAlt(pin_no_t id, uint8_t af)
{ {
// check for index overshoot // check for index overshoot
@ -92,10 +115,5 @@ void setAlt(pin_no_t id, uint8_t af)
} }
*/
#endif

3
bsl/csl/stm32f042/Src/pin.c
Unescape View File

@ -38,9 +38,10 @@
#define OTYPER_PUSH_PULL 0x0UL #define OTYPER_PUSH_PULL 0x0UL
#define OTYPER_OPEN_DRAIN 0x1UL #define OTYPER_OPEN_DRAIN 0x1UL
#define PIN_BASE ((GPIO_TypeDef *)(pinNo&~0xFF))
#define PIN_NO (pinNo & 0x0F) #define PIN_NO (pinNo & 0x0F)
#define PIN_PORT ((pinNo & 0xF0)>>4) #define PIN_PORT ((pinNo & 0xF0)>>4)
#define PIN_BASE ((GPIO_TypeDef *)portBase_Addr_List[PIN_PORT])
/*! Table for binding the Pin mode_t enum index to the values that the MODER register needs */ /*! Table for binding the Pin mode_t enum index to the values that the MODER register needs */
const uint32_t moderMode[5] = { const uint32_t moderMode[5] = {
MODER_ANALOG, MODER_ANALOG,

49
ideas/hw.h
Unescape View File

@ -1,49 +0,0 @@
#include <stdint.h>
#define MAX_N_PORTS 3
#define MAX_PORT_PINS 15
#define MAX_N_PIN_ALT_FUNC 8
// TODO: correct mapping!
static const uint8_t altFunc_List[MAX_N_PORTS][MAX_PORT_PINS] = {
{ // PORT A
0b01110000,
0b11110000,
0b01110000,
0b01110000,
0b11111000,
0b11110000,
0b11110110,
0b11111110,
0b11111000,
0b01111100,
0b11111000,
0b11111100,
0b11111100,
0b11100000,
0b11000000,
0b11110100
},
{ // PORT B
},
{ // PORT F
0b00000000,
0b00000000,
0b00000000,
0b00000000,
0b00000000,
0b00000000,
0b00000000,
0b00000000,
0b00000000,
0b00000000,
0b00000000,
0b00000000,
0b00000000,
0b00000000,
0b00000000,
0b00000000,
}
};
Write Preview
Loading…
Cancel
Save