working on timer interrupts

csl/stm32f042k6t6/HardwareDescription/hwd_interrupt.h

@@ -23,6 +23,14 @@ extern "C" {
 
 /*! interrupt types. These act as indexes for the */
 typedef enum {
+	TIM1_BREAK,
+	TIM1_UPDATE,
+	TIM1_TRIGGER,
+	TIM1_COMMUNICATION,
+	TIM1_COUNTERCOMPARE_1,
+	TIM1_COUNTERCOMPARE_2,
+	TIM1_COUNTERCOMPARE_3,
+	TIM1_COUNTERCOMPARE_4,
 	TIM2_UPDATE,
 	TIM2_COUNTERCOMPARE_1,
 	TIM2_COUNTERCOMPARE_2,
@@ -33,14 +41,31 @@ typedef enum {
 	TIM2_CAPTURECOMPARE_2,
 	TIM2_CAPTURECOMPARE_3,
   	TIM2_CAPTURECOMAPRE_4,
+	TIM3_UPDATE,
+	TIM3_COUNTERCOMPARE_1,
+	TIM3_COUNTERCOMPARE_2,
+	TIM3_COUNTERCOMPARE_3,
+	TIM3_COUNTERCOMPARE_4,
+	TIM3_TRIGGER,
+	TIM3_CAPTURECOMPARE_1,
+	TIM3_CAPTURECOMPARE_2,
+	TIM3_CAPTURECOMPARE_3,
+  	TIM3_CAPTURECOMAPRE_4,
 	intTypeEND
 }intrType_t;
 
-uint32_t intHandlerList[intTypeEND]={
+uint32_t intHandlerList[intTypeEND]={0};
-0,0,0,0,0,0,0,0,0,0};
 
 static const uint8_t interruptTypeIndexList[intTypeEND] =
 {
+	TIM1_BRK_UP_TRG_COM_IRQn,
+	TIM1_BRK_UP_TRG_COM_IRQn,
+	TIM1_BRK_UP_TRG_COM_IRQn,
+	TIM1_BRK_UP_TRG_COM_IRQn,
+	TIM1_CC_IRQn,
+	TIM1_CC_IRQn,
+	TIM1_CC_IRQn,
+	TIM1_CC_IRQn,
 	TIM2_IRQn,
 	TIM2_IRQn,
 	TIM2_IRQn,
@@ -50,7 +75,17 @@ static const uint8_t interruptTypeIndexList[intTypeEND] =
 	TIM2_IRQn,
 	TIM2_IRQn,
 	TIM2_IRQn,
-	TIM2_IRQn	
+	TIM2_IRQn,
+	TIM3_IRQn,
+	TIM3_IRQn,
+	TIM3_IRQn,
+	TIM3_IRQn,
+	TIM3_IRQn,
+	TIM3_IRQn,
+	TIM3_IRQn,
+	TIM3_IRQn,
+	TIM3_IRQn,
+	TIM3_IRQn
 };
 
 

csl/stm32f042k6t6/implementation/imp_timer.c

@@ -249,67 +249,167 @@ void timerThrowError(timerError_t error)
 }
 
 // Interrupt service routines
+
+void TIM1_BRK_UP_TRG_COM_IRQn()
+{
+	if(TIM1->SR & TIM_SR_BIF) {
+		TIM1->SR &= ~TIM_SR_BIF;
+		((intHandler_t)(intHandlerList[TIM1_BREAK]))();
+	}
+	
+	if(TIM1->SR & TIM_SR_UIF) {
+		TIM1->SR &= ~TIM_SR_UIF;
+		((intHandler_t)(intHandlerList[TIM1_UPDATE]))();
+	}
+
+	if(TIM1->SR & TIM_SR_TIF) {
+		TIM1->SR &= ~TIM_SR_TIF;
+		((intHandler_t)(intHandlerList[TIM1_TRIGGER]))();
+	}
+
+	if(TIM1->SR & TIM_SR_COMIF) {
+		TIM1->SR &= ~TIM_SR_COMIF;
+		((intHandler_t)(intHandlerList[TIM1_COMMUNICATION]))();
+	}
+}
+
+void TIM1_CC_IRQn()
+{
+	if(TIM1->SR & TIM_SR_CC1IF) {
+		TIM1-> SR &= ~TIM_SR_CC1IF;	
+		((intHandler_t)(intHandlerList[TIM1_COUNTERCOMPARE_1]))();
+	}
+
+	if(TIM1->SR & TIM_SR_CC2IF) {
+		TIM1-> SR &= ~TIM_SR_CC2IF;	
+		((intHandler_t)(intHandlerList[TIM1_COUNTERCOMPARE_2]))();
+	}
+
+	if(TIM1->SR & TIM_SR_CC3IF) {
+		TIM1-> SR &= ~TIM_SR_CC3IF;	
+		((intHandler_t)(intHandlerList[TIM1_COUNTERCOMPARE_3]))();
+	}
+
+	if(TIM1->SR & TIM_SR_CC4IF) {
+		TIM1-> SR &= ~TIM_SR_CC4IF;
+		((intHandler_t)(intHandlerList[TIM1_COUNTERCOMPARE_4]))();
+	}
+}
+
 void TIM2_IRQHandler()
 {	
 	if(TIM2->SR & TIM_SR_UIF) {
-		// clear flag
 		TIM2-> SR &= ~TIM_SR_UIF;
-		
-		//TODO: call handler here
 		((intHandler_t)(intHandlerList[TIM2_UPDATE]))();
 	}
 
 	if(TIM2->SR & TIM_SR_CC1IF) {
 		TIM2-> SR &= ~TIM_SR_CC1IF;
-				
 		((intHandler_t)(intHandlerList[TIM2_COUNTERCOMPARE_1]))();
 	}
 
 	if(TIM2->SR & TIM_SR_CC2IF) {
-		TIM2-> SR &= ~TIM_SR_CC2IF;
+		TIM2-> SR &= ~TIM_SR_CC2IF;		
-		
 		((intHandler_t)(intHandlerList[TIM2_COUNTERCOMPARE_2]))();
 	}
 
 	if(TIM2->SR & TIM_SR_CC3IF) {
-		TIM2-> SR &= ~TIM_SR_CC3IF;
+		TIM2-> SR &= ~TIM_SR_CC3IF;		
-				
 		((intHandler_t)(intHandlerList[TIM2_COUNTERCOMPARE_3]))();
 	}
 
 	if(TIM2->SR & TIM_SR_CC4IF) {
 		TIM2-> SR &= ~TIM_SR_CC4IF;
-		
 		((intHandler_t)(intHandlerList[TIM2_COUNTERCOMPARE_4]))();
 	}
 
 	if(TIM2->SR & TIM_SR_TIF) {
 		TIM2-> SR &= ~TIM_SR_TIF;
-		
 		((intHandler_t)(intHandlerList[TIM2_TRIGGER]))();
 	}
 
 	if(TIM2->SR & TIM_SR_CC1OF) {
 		TIM2-> SR &= ~TIM_SR_CC1OF;
-		
 		((intHandler_t)(intHandlerList[TIM2_CAPTURECOMPARE_1]))();
 	}
 
 	if(TIM2->SR & TIM_SR_CC2OF) {
 		TIM2-> SR &= ~TIM_SR_CC2OF;
-		
 		((intHandler_t)(intHandlerList[TIM2_CAPTURECOMPARE_2]))();
 	}
 
 	if(TIM2->SR & TIM_SR_CC3OF) {
 		TIM2-> SR &= ~TIM_SR_CC3OF;
-		
 		((intHandler_t)(intHandlerList[TIM2_CAPTURECOMPARE_3]))();
 	}
 
 	if(TIM2->SR & TIM_SR_CC4OF) {
 		TIM2-> SR &= ~TIM_SR_CC4OF;
-		
 		((intHandler_t)(intHandlerList[TIM2_CAPTURECOMAPRE_4]))();
 	}
 }
+
+void TIM3_IRQHandler()
+{	
+	if(TIM3->SR & TIM_SR_UIF) {
+		// clear flag
+		TIM3-> SR &= ~TIM_SR_UIF;
+		
+		//TODO: call handler here
+		((intHandler_t)(intHandlerList[TIM3_UPDATE]))();
+	}
+
+	if(TIM3->SR & TIM_SR_CC1IF) {
+		TIM3-> SR &= ~TIM_SR_CC1IF;
+				
+		((intHandler_t)(intHandlerList[TIM3_COUNTERCOMPARE_1]))();
+	}
+
+	if(TIM3->SR & TIM_SR_CC2IF) {
+		TIM3-> SR &= ~TIM_SR_CC2IF;
+		
+		((intHandler_t)(intHandlerList[TIM3_COUNTERCOMPARE_2]))();
+	}
+
+	if(TIM3->SR & TIM_SR_CC3IF) {
+		TIM3-> SR &= ~TIM_SR_CC3IF;
+				
+		((intHandler_t)(intHandlerList[TIM3_COUNTERCOMPARE_3]))();
+	}
+
+	if(TIM3->SR & TIM_SR_CC4IF) {
+		TIM3-> SR &= ~TIM_SR_CC4IF;
+		
+		((intHandler_t)(intHandlerList[TIM3_COUNTERCOMPARE_4]))();
+	}
+
+	if(TIM3->SR & TIM_SR_TIF) {
+		TIM3-> SR &= ~TIM_SR_TIF;
+		
+		((intHandler_t)(intHandlerList[TIM3_TRIGGER]))();
+	}
+
+	if(TIM3->SR & TIM_SR_CC1OF) {
+		TIM3-> SR &= ~TIM_SR_CC1OF;
+		
+		((intHandler_t)(intHandlerList[TIM3_CAPTURECOMPARE_1]))();
+	}
+
+	if(TIM3->SR & TIM_SR_CC2OF) {
+		TIM3-> SR &= ~TIM_SR_CC2OF;
+		
+		((intHandler_t)(intHandlerList[TIM3_CAPTURECOMPARE_2]))();
+	}
+
+	if(TIM3->SR & TIM_SR_CC3OF) {
+		TIM3-> SR &= ~TIM_SR_CC3OF;
+		
+		((intHandler_t)(intHandlerList[TIM3_CAPTURECOMPARE_3]))();
+	}
+
+	if(TIM3->SR & TIM_SR_CC4OF) {
+		TIM3-> SR &= ~TIM_SR_CC4OF;
+		
+		((intHandler_t)(intHandlerList[TIM3_CAPTURECOMAPRE_4]))();
+	}
+}