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122 lines
2.3 KiB
122 lines
2.3 KiB
/**
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**************************************************************************************************
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* @file hwd_interrupt.h
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* @author Kerem Yollu & Edwin Koch
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* @date 26.02.2023
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* @version 1.0
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**************************************************************************************************
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* @brief
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*
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* **Detailed Description :**
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*
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**************************************************************************************************
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*/
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#ifndef _HWD_INTERRUPT_H_
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#define _HWD_INTERRUPT_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include "hardwareDescription.h"
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/*! interrupt types. These act as indexes for the */
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typedef enum {
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TIM1_BREAK,
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TIM1_UPDATE,
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TIM1_TRIGGER,
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TIM1_COMMUNICATION,
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TIM1_COUNTERCOMPARE_1,
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TIM1_COUNTERCOMPARE_2,
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TIM1_COUNTERCOMPARE_3,
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TIM1_COUNTERCOMPARE_4,
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TIM2_UPDATE,
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TIM2_COUNTERCOMPARE_1,
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TIM2_COUNTERCOMPARE_2,
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TIM2_COUNTERCOMPARE_3,
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TIM2_COUNTERCOMPARE_4,
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TIM2_TRIGGER,
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TIM2_CAPTURECOMPARE_1,
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TIM2_CAPTURECOMPARE_2,
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TIM2_CAPTURECOMPARE_3,
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TIM2_CAPTURECOMAPRE_4,
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TIM3_UPDATE,
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TIM3_COUNTERCOMPARE_1,
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TIM3_COUNTERCOMPARE_2,
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TIM3_COUNTERCOMPARE_3,
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TIM3_COUNTERCOMPARE_4,
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TIM3_TRIGGER,
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TIM3_CAPTURECOMPARE_1,
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TIM3_CAPTURECOMPARE_2,
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TIM3_CAPTURECOMPARE_3,
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TIM3_CAPTURECOMAPRE_4,
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TIM14_CAPTURECOMPARE_1_OVERCAPTURE,
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TIM14_CAPTURECOMPARE_1,
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TIM14_UPDATE,
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TIM16_CAPTURECOMPARE_1_OVERCAPTURE,
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TIM16_BREAK,
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TIM16_COMMUNICATION,
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TIM16_CAPTURECOMPARE_1,
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TIM16_UPDATE,
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TIM17_CAPTURECOMPARE_1_OVERCAPTURE,
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TIM17_BREAK,
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TIM17_COMMUNICATION,
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TIM17_CAPTURECOMPARE_1,
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TIM17_UPDATE,
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intTypeEND
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}intrType_t;
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static uint32_t intHandlerList[intTypeEND]={0};
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static const uint8_t interruptTypeIndexList[intTypeEND] =
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{
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TIM1_BRK_UP_TRG_COM_IRQn,
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TIM1_BRK_UP_TRG_COM_IRQn,
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TIM1_BRK_UP_TRG_COM_IRQn,
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TIM1_BRK_UP_TRG_COM_IRQn,
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TIM1_CC_IRQn,
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TIM1_CC_IRQn,
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TIM1_CC_IRQn,
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TIM1_CC_IRQn,
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TIM2_IRQn,
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TIM2_IRQn,
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TIM2_IRQn,
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TIM2_IRQn,
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TIM2_IRQn,
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TIM2_IRQn,
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TIM2_IRQn,
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TIM2_IRQn,
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TIM2_IRQn,
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TIM2_IRQn,
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TIM3_IRQn,
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TIM3_IRQn,
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TIM3_IRQn,
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TIM3_IRQn,
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TIM3_IRQn,
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TIM3_IRQn,
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TIM3_IRQn,
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TIM3_IRQn,
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TIM3_IRQn,
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TIM3_IRQn,
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TIM14_IRQn,
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TIM14_IRQn,
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TIM14_IRQn,
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TIM16_IRQn,
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TIM16_IRQn,
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TIM16_IRQn,
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TIM16_IRQn,
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TIM16_IRQn,
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TIM17_IRQn,
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TIM17_IRQn,
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TIM17_IRQn,
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TIM17_IRQn,
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TIM17_IRQn
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};
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#ifdef __cplusplus
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}
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#endif
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#endif // _HWD_INTERRUPT_H_
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