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ARM GAS /tmp/cc85CGJe.s page 1
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1 .cpu cortex-m0
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2 .eabi_attribute 20, 1
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3 .eabi_attribute 21, 1
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4 .eabi_attribute 23, 3
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5 .eabi_attribute 24, 1
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6 .eabi_attribute 25, 1
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7 .eabi_attribute 26, 1
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8 .eabi_attribute 30, 1
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9 .eabi_attribute 34, 0
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10 .eabi_attribute 18, 4
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11 .file "stm32f0xx_it.c"
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12 .text
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13 .Ltext0:
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14 .cfi_sections .debug_frame
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15 .section .text.NMI_Handler,"ax",%progbits
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16 .align 1
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17 .global NMI_Handler
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18 .arch armv6s-m
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19 .syntax unified
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20 .code 16
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21 .thumb_func
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22 .fpu softvfp
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24 NMI_Handler:
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25 .LFB40:
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26 .file 1 "Src/stm32f0xx_it.c"
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1:Src/stm32f0xx_it.c **** /* USER CODE BEGIN Header */
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2:Src/stm32f0xx_it.c **** /**
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3:Src/stm32f0xx_it.c **** ******************************************************************************
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4:Src/stm32f0xx_it.c **** * @file stm32f0xx_it.c
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5:Src/stm32f0xx_it.c **** * @brief Interrupt Service Routines.
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6:Src/stm32f0xx_it.c **** ******************************************************************************
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7:Src/stm32f0xx_it.c **** * @attention
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8:Src/stm32f0xx_it.c **** *
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9:Src/stm32f0xx_it.c **** * <h2><center>© Copyright (c) 2021 STMicroelectronics.
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10:Src/stm32f0xx_it.c **** * All rights reserved.</center></h2>
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11:Src/stm32f0xx_it.c **** *
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12:Src/stm32f0xx_it.c **** * This software component is licensed by ST under BSD 3-Clause license,
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13:Src/stm32f0xx_it.c **** * the "License"; You may not use this file except in compliance with the
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14:Src/stm32f0xx_it.c **** * License. You may obtain a copy of the License at:
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15:Src/stm32f0xx_it.c **** * opensource.org/licenses/BSD-3-Clause
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16:Src/stm32f0xx_it.c **** *
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17:Src/stm32f0xx_it.c **** ******************************************************************************
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18:Src/stm32f0xx_it.c **** */
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19:Src/stm32f0xx_it.c **** /* USER CODE END Header */
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20:Src/stm32f0xx_it.c ****
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21:Src/stm32f0xx_it.c **** /* Includes ------------------------------------------------------------------*/
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22:Src/stm32f0xx_it.c **** #include "main.h"
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23:Src/stm32f0xx_it.c **** #include "stm32f0xx_it.h"
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24:Src/stm32f0xx_it.c **** /* Private includes ----------------------------------------------------------*/
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25:Src/stm32f0xx_it.c **** /* USER CODE BEGIN Includes */
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26:Src/stm32f0xx_it.c **** /* USER CODE END Includes */
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27:Src/stm32f0xx_it.c ****
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28:Src/stm32f0xx_it.c **** /* Private typedef -----------------------------------------------------------*/
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29:Src/stm32f0xx_it.c **** /* USER CODE BEGIN TD */
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30:Src/stm32f0xx_it.c ****
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31:Src/stm32f0xx_it.c **** /* USER CODE END TD */
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32:Src/stm32f0xx_it.c ****
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ARM GAS /tmp/cc85CGJe.s page 2
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33:Src/stm32f0xx_it.c **** /* Private define ------------------------------------------------------------*/
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34:Src/stm32f0xx_it.c **** /* USER CODE BEGIN PD */
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35:Src/stm32f0xx_it.c ****
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36:Src/stm32f0xx_it.c **** /* USER CODE END PD */
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37:Src/stm32f0xx_it.c ****
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38:Src/stm32f0xx_it.c **** /* Private macro -------------------------------------------------------------*/
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39:Src/stm32f0xx_it.c **** /* USER CODE BEGIN PM */
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40:Src/stm32f0xx_it.c ****
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41:Src/stm32f0xx_it.c **** /* USER CODE END PM */
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42:Src/stm32f0xx_it.c ****
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43:Src/stm32f0xx_it.c **** /* Private variables ---------------------------------------------------------*/
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44:Src/stm32f0xx_it.c **** /* USER CODE BEGIN PV */
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45:Src/stm32f0xx_it.c ****
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46:Src/stm32f0xx_it.c **** /* USER CODE END PV */
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47:Src/stm32f0xx_it.c ****
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48:Src/stm32f0xx_it.c **** /* Private function prototypes -----------------------------------------------*/
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49:Src/stm32f0xx_it.c **** /* USER CODE BEGIN PFP */
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50:Src/stm32f0xx_it.c ****
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51:Src/stm32f0xx_it.c **** /* USER CODE END PFP */
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52:Src/stm32f0xx_it.c ****
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53:Src/stm32f0xx_it.c **** /* Private user code ---------------------------------------------------------*/
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54:Src/stm32f0xx_it.c **** /* USER CODE BEGIN 0 */
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55:Src/stm32f0xx_it.c ****
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56:Src/stm32f0xx_it.c **** /* USER CODE END 0 */
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57:Src/stm32f0xx_it.c ****
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58:Src/stm32f0xx_it.c **** /* External variables --------------------------------------------------------*/
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59:Src/stm32f0xx_it.c ****
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60:Src/stm32f0xx_it.c **** /* USER CODE BEGIN EV */
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61:Src/stm32f0xx_it.c ****
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62:Src/stm32f0xx_it.c **** /* USER CODE END EV */
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63:Src/stm32f0xx_it.c ****
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64:Src/stm32f0xx_it.c **** /******************************************************************************/
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65:Src/stm32f0xx_it.c **** /* Cortex-M0 Processor Interruption and Exception Handlers */
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66:Src/stm32f0xx_it.c **** /******************************************************************************/
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67:Src/stm32f0xx_it.c **** /**
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68:Src/stm32f0xx_it.c **** * @brief This function handles Non maskable interrupt.
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69:Src/stm32f0xx_it.c **** */
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70:Src/stm32f0xx_it.c **** void NMI_Handler(void)
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71:Src/stm32f0xx_it.c **** {
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27 .loc 1 71 1 view -0
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28 .cfi_startproc
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29 @ args = 0, pretend = 0, frame = 0
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30 @ frame_needed = 0, uses_anonymous_args = 0
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31 @ link register save eliminated.
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72:Src/stm32f0xx_it.c **** /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
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73:Src/stm32f0xx_it.c ****
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74:Src/stm32f0xx_it.c **** /* USER CODE END NonMaskableInt_IRQn 0 */
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75:Src/stm32f0xx_it.c **** /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
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76:Src/stm32f0xx_it.c ****
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77:Src/stm32f0xx_it.c **** /* USER CODE END NonMaskableInt_IRQn 1 */
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78:Src/stm32f0xx_it.c **** }
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32 .loc 1 78 1 view .LVU1
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33 @ sp needed
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34 0000 7047 bx lr
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35 .cfi_endproc
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36 .LFE40:
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38 .section .text.HardFault_Handler,"ax",%progbits
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ARM GAS /tmp/cc85CGJe.s page 3
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39 .align 1
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40 .global HardFault_Handler
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41 .syntax unified
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42 .code 16
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43 .thumb_func
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44 .fpu softvfp
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46 HardFault_Handler:
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47 .LFB41:
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79:Src/stm32f0xx_it.c ****
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80:Src/stm32f0xx_it.c **** /**
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81:Src/stm32f0xx_it.c **** * @brief This function handles Hard fault interrupt.
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82:Src/stm32f0xx_it.c **** */
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83:Src/stm32f0xx_it.c **** void HardFault_Handler(void)
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84:Src/stm32f0xx_it.c **** {
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48 .loc 1 84 1 view -0
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49 .cfi_startproc
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50 @ Volatile: function does not return.
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51 @ args = 0, pretend = 0, frame = 0
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52 @ frame_needed = 0, uses_anonymous_args = 0
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53 @ link register save eliminated.
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54 .L3:
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85:Src/stm32f0xx_it.c **** /* USER CODE BEGIN HardFault_IRQn 0 */
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86:Src/stm32f0xx_it.c ****
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87:Src/stm32f0xx_it.c **** /* USER CODE END HardFault_IRQn 0 */
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88:Src/stm32f0xx_it.c **** while (1)
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55 .loc 1 88 3 discriminator 1 view .LVU3
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89:Src/stm32f0xx_it.c **** {
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90:Src/stm32f0xx_it.c **** /* USER CODE BEGIN W1_HardFault_IRQn 0 */
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91:Src/stm32f0xx_it.c **** /* USER CODE END W1_HardFault_IRQn 0 */
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92:Src/stm32f0xx_it.c **** }
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56 .loc 1 92 3 discriminator 1 view .LVU4
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57 0000 FEE7 b .L3
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58 .cfi_endproc
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59 .LFE41:
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61 .section .text.SVC_Handler,"ax",%progbits
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62 .align 1
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63 .global SVC_Handler
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64 .syntax unified
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65 .code 16
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66 .thumb_func
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67 .fpu softvfp
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69 SVC_Handler:
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70 .LFB42:
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93:Src/stm32f0xx_it.c **** }
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94:Src/stm32f0xx_it.c ****
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95:Src/stm32f0xx_it.c **** /**
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96:Src/stm32f0xx_it.c **** * @brief This function handles System service call via SWI instruction.
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97:Src/stm32f0xx_it.c **** */
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98:Src/stm32f0xx_it.c **** void SVC_Handler(void)
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99:Src/stm32f0xx_it.c **** {
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71 .loc 1 99 1 view -0
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72 .cfi_startproc
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73 @ args = 0, pretend = 0, frame = 0
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74 @ frame_needed = 0, uses_anonymous_args = 0
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75 @ link register save eliminated.
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100:Src/stm32f0xx_it.c **** /* USER CODE BEGIN SVC_IRQn 0 */
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101:Src/stm32f0xx_it.c ****
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ARM GAS /tmp/cc85CGJe.s page 4
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102:Src/stm32f0xx_it.c **** /* USER CODE END SVC_IRQn 0 */
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103:Src/stm32f0xx_it.c **** /* USER CODE BEGIN SVC_IRQn 1 */
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104:Src/stm32f0xx_it.c ****
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105:Src/stm32f0xx_it.c **** /* USER CODE END SVC_IRQn 1 */
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106:Src/stm32f0xx_it.c **** }
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76 .loc 1 106 1 view .LVU6
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77 @ sp needed
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78 0000 7047 bx lr
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79 .cfi_endproc
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80 .LFE42:
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82 .section .text.PendSV_Handler,"ax",%progbits
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83 .align 1
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84 .global PendSV_Handler
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85 .syntax unified
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86 .code 16
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87 .thumb_func
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88 .fpu softvfp
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90 PendSV_Handler:
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91 .LFB43:
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107:Src/stm32f0xx_it.c ****
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108:Src/stm32f0xx_it.c **** /**
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109:Src/stm32f0xx_it.c **** * @brief This function handles Pendable request for system service.
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110:Src/stm32f0xx_it.c **** */
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111:Src/stm32f0xx_it.c **** void PendSV_Handler(void)
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112:Src/stm32f0xx_it.c **** {
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92 .loc 1 112 1 view -0
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93 .cfi_startproc
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94 @ args = 0, pretend = 0, frame = 0
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95 @ frame_needed = 0, uses_anonymous_args = 0
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96 @ link register save eliminated.
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113:Src/stm32f0xx_it.c **** /* USER CODE BEGIN PendSV_IRQn 0 */
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114:Src/stm32f0xx_it.c ****
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115:Src/stm32f0xx_it.c **** /* USER CODE END PendSV_IRQn 0 */
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116:Src/stm32f0xx_it.c **** /* USER CODE BEGIN PendSV_IRQn 1 */
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117:Src/stm32f0xx_it.c ****
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118:Src/stm32f0xx_it.c **** /* USER CODE END PendSV_IRQn 1 */
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119:Src/stm32f0xx_it.c **** }
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97 .loc 1 119 1 view .LVU8
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98 @ sp needed
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99 0000 7047 bx lr
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100 .cfi_endproc
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101 .LFE43:
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103 .section .text.SysTick_Handler,"ax",%progbits
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104 .align 1
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105 .global SysTick_Handler
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106 .syntax unified
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107 .code 16
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108 .thumb_func
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109 .fpu softvfp
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111 SysTick_Handler:
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112 .LFB44:
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120:Src/stm32f0xx_it.c ****
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121:Src/stm32f0xx_it.c **** /**
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122:Src/stm32f0xx_it.c **** * @brief This function handles System tick timer.
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123:Src/stm32f0xx_it.c **** */
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124:Src/stm32f0xx_it.c **** void SysTick_Handler(void)
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125:Src/stm32f0xx_it.c **** {
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ARM GAS /tmp/cc85CGJe.s page 5
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113 .loc 1 125 1 view -0
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114 .cfi_startproc
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115 @ args = 0, pretend = 0, frame = 0
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116 @ frame_needed = 0, uses_anonymous_args = 0
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117 0000 10B5 push {r4, lr}
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118 .LCFI0:
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119 .cfi_def_cfa_offset 8
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120 .cfi_offset 4, -8
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121 .cfi_offset 14, -4
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126:Src/stm32f0xx_it.c **** /* USER CODE BEGIN SysTick_IRQn 0 */
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127:Src/stm32f0xx_it.c ****
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128:Src/stm32f0xx_it.c **** /* USER CODE END SysTick_IRQn 0 */
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129:Src/stm32f0xx_it.c **** HAL_IncTick();
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122 .loc 1 129 3 view .LVU10
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123 0002 FFF7FEFF bl HAL_IncTick
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124 .LVL0:
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130:Src/stm32f0xx_it.c **** /* USER CODE BEGIN SysTick_IRQn 1 */
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131:Src/stm32f0xx_it.c ****
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132:Src/stm32f0xx_it.c **** /* USER CODE END SysTick_IRQn 1 */
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133:Src/stm32f0xx_it.c **** }
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125 .loc 1 133 1 is_stmt 0 view .LVU11
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126 @ sp needed
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127 0006 10BD pop {r4, pc}
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128 .cfi_endproc
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129 .LFE44:
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131 .text
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132 .Letext0:
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133 .file 2 "/usr/lib/gcc/arm-none-eabi/8.3.1/include/stdint.h"
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134 .file 3 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h"
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135 .file 4 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h"
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ARM GAS /tmp/cc85CGJe.s page 6
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DEFINED SYMBOLS
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*ABS*:0000000000000000 stm32f0xx_it.c
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/tmp/cc85CGJe.s:16 .text.NMI_Handler:0000000000000000 $t
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/tmp/cc85CGJe.s:24 .text.NMI_Handler:0000000000000000 NMI_Handler
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/tmp/cc85CGJe.s:39 .text.HardFault_Handler:0000000000000000 $t
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/tmp/cc85CGJe.s:46 .text.HardFault_Handler:0000000000000000 HardFault_Handler
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/tmp/cc85CGJe.s:62 .text.SVC_Handler:0000000000000000 $t
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/tmp/cc85CGJe.s:69 .text.SVC_Handler:0000000000000000 SVC_Handler
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/tmp/cc85CGJe.s:83 .text.PendSV_Handler:0000000000000000 $t
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/tmp/cc85CGJe.s:90 .text.PendSV_Handler:0000000000000000 PendSV_Handler
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/tmp/cc85CGJe.s:104 .text.SysTick_Handler:0000000000000000 $t
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/tmp/cc85CGJe.s:111 .text.SysTick_Handler:0000000000000000 SysTick_Handler
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UNDEFINED SYMBOLS
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HAL_IncTick
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