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KED/bsl/cmakeTest_makefile/build/stm32f0xx_hal_rcc.lst

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ARM GAS /tmp/ccX98wNy.s page 1
1 .cpu cortex-m0
2 .eabi_attribute 20, 1
3 .eabi_attribute 21, 1
4 .eabi_attribute 23, 3
5 .eabi_attribute 24, 1
6 .eabi_attribute 25, 1
7 .eabi_attribute 26, 1
8 .eabi_attribute 30, 1
9 .eabi_attribute 34, 0
10 .eabi_attribute 18, 4
11 .file "stm32f0xx_hal_rcc.c"
12 .text
13 .Ltext0:
14 .cfi_sections .debug_frame
15 .section .text.HAL_RCC_DeInit,"ax",%progbits
16 .align 1
17 .global HAL_RCC_DeInit
18 .arch armv6s-m
19 .syntax unified
20 .code 16
21 .thumb_func
22 .fpu softvfp
24 HAL_RCC_DeInit:
25 .LFB40:
26 .file 1 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c"
1:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /**
2:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** ******************************************************************************
3:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @file stm32f0xx_hal_rcc.c
4:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @author MCD Application Team
5:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief RCC HAL module driver.
6:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * This file provides firmware functions to manage the following
7:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * functionalities of the Reset and Clock Control (RCC) peripheral:
8:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * + Initialization and de-initialization functions
9:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * + Peripheral Control functions
10:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** *
11:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @verbatim
12:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** ==============================================================================
13:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** ##### RCC specific features #####
14:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** ==============================================================================
15:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** [..]
16:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** After reset the device is running from Internal High Speed oscillator
17:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (HSI 8MHz) with Flash 0 wait state, Flash prefetch buffer is disabled,
18:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** and all peripherals are off except internal SRAM, Flash and JTAG.
19:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (+) There is no prescaler on High speed (AHB) and Low speed (APB) buses;
20:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** all peripherals mapped on these buses are running at HSI speed.
21:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (+) The clock for all peripherals is switched off, except the SRAM and FLASH.
22:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (+) All GPIOs are in input floating state, except the JTAG pins which
23:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** are assigned to be used for debug purpose.
24:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** [..] Once the device started from reset, the user application has to:
25:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (+) Configure the clock source to be used to drive the System clock
26:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (if the application needs higher frequency/performance)
27:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (+) Configure the System clock frequency and Flash settings
28:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (+) Configure the AHB and APB buses prescalers
29:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (+) Enable the clock for the peripheral(s) to be used
30:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (+) Configure the clock source(s) for peripherals whose clocks are not
31:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** derived from the System clock (RTC, ADC, I2C, USART, TIM, USB FS, etc..)
32:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
ARM GAS /tmp/ccX98wNy.s page 2
33:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** ##### RCC Limitations #####
34:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** ==============================================================================
35:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** [..]
36:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** A delay between an RCC peripheral clock enable and the effective peripheral
37:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** enabling should be taken into account in order to manage the peripheral read/write
38:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** from/to registers.
39:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (+) This delay depends on the peripheral mapping.
40:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (++) AHB & APB peripherals, 1 dummy read is necessary
41:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
42:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** [..]
43:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** Workarounds:
44:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (#) For AHB & APB peripherals, a dummy read to the peripheral register has been
45:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** inserted in each __HAL_RCC_PPP_CLK_ENABLE() macro.
46:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
47:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @endverbatim
48:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** ******************************************************************************
49:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @attention
50:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** *
51:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
52:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * All rights reserved.</center></h2>
53:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** *
54:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * This software component is licensed by ST under BSD 3-Clause license,
55:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * the "License"; You may not use this file except in compliance with the
56:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * License. You may obtain a copy of the License at:
57:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * opensource.org/licenses/BSD-3-Clause
58:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** *
59:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** ******************************************************************************
60:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */
61:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
62:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Includes ------------------------------------------------------------------*/
63:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #include "stm32f0xx_hal.h"
64:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
65:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** @addtogroup STM32F0xx_HAL_Driver
66:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @{
67:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */
68:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
69:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** @defgroup RCC RCC
70:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief RCC HAL module driver
71:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @{
72:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */
73:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
74:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #ifdef HAL_RCC_MODULE_ENABLED
75:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
76:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Private typedef -----------------------------------------------------------*/
77:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Private define ------------------------------------------------------------*/
78:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** @defgroup RCC_Private_Constants RCC Private Constants
79:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @{
80:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */
81:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /**
82:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @}
83:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */
84:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Private macro -------------------------------------------------------------*/
85:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** @defgroup RCC_Private_Macros RCC Private Macros
86:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @{
87:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */
88:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #define MCO1_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
ARM GAS /tmp/ccX98wNy.s page 3
90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #define MCO1_GPIO_PORT GPIOA
91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #define MCO1_PIN GPIO_PIN_8
92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /**
94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @}
95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */
96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Private variables ---------------------------------------------------------*/
98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** @defgroup RCC_Private_Variables RCC Private Variables
99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @{
100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */
101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /**
102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @}
103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */
104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Private function prototypes -----------------------------------------------*/
106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Exported functions ---------------------------------------------------------*/
107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** @defgroup RCC_Exported_Functions RCC Exported Functions
109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @{
110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */
111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** @defgroup RCC_Exported_Functions_Group1 Initialization and de-initialization functions
113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief Initialization and Configuration functions
114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** *
115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @verbatim
116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** ===============================================================================
117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** ##### Initialization and de-initialization functions #####
118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** ===============================================================================
119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** [..]
120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** This section provides functions allowing to configure the internal/external oscillators
121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (HSE, HSI, HSI14, HSI48, LSE, LSI, PLL, CSS and MCO) and the System buses clocks (SYSCLK,
122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** AHB and APB1).
123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** [..] Internal/external clock and PLL configuration
125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (#) HSI (high-speed internal), 8 MHz factory-trimmed RC used directly or through
126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** the PLL as System clock source.
127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** The HSI clock can be used also to clock the USART and I2C peripherals.
128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (#) HSI14 (high-speed internal), 14 MHz factory-trimmed RC used directly to clock
130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** the ADC peripheral.
131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (#) LSI (low-speed internal), ~40 KHz low consumption RC used as IWDG and/or RTC
133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** clock source.
134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (#) HSE (high-speed external), 4 to 32 MHz crystal oscillator used directly or
136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** through the PLL as System clock source. Can be used also as RTC clock source.
137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (#) LSE (low-speed external), 32 KHz oscillator used as RTC clock source.
139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (#) PLL (clocked by HSI, HSI48 or HSE), featuring different output clocks:
141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (++) The first output is used to generate the high speed system clock (up to 48 MHz)
142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (++) The second output is used to generate the clock for the USB FS (48 MHz)
143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (++) The third output may be used to generate the clock for the TIM, I2C and USART
144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** peripherals (up to 48 MHz)
145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (#) CSS (Clock security system), once enable using the macro __HAL_RCC_CSS_ENABLE()
ARM GAS /tmp/ccX98wNy.s page 4
147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** and if a HSE clock failure occurs(HSE used directly or through PLL as System
148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** clock source), the System clocks automatically switched to HSI and an interrupt
149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** is generated if enabled. The interrupt is linked to the Cortex-M0 NMI
150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (Non-Maskable Interrupt) exception vector.
151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (#) MCO (microcontroller clock output), used to output SYSCLK, HSI, HSE, LSI, LSE or PLL
153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** clock (divided by 2) output on pin (such as PA8 pin).
154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** [..] System, AHB and APB buses clocks configuration
156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (#) Several clock sources can be used to drive the System clock (SYSCLK): HSI,
157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** HSE and PLL.
158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** The AHB clock (HCLK) is derived from System clock through configurable
159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** prescaler and used to clock the CPU, memory and peripherals mapped
160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** on AHB bus (DMA, GPIO...). APB1 (PCLK1) clock is derived
161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** from AHB clock through configurable prescalers and used to clock
162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** the peripherals mapped on these buses. You can use
163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** "HAL_RCC_GetSysClockFreq()" function to retrieve the frequencies of these clocks.
164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (#) All the peripheral clocks are derived from the System clock (SYSCLK) except:
166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (++) The FLASH program/erase clock which is always HSI 8MHz clock.
167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (++) The USB 48 MHz clock which is derived from the PLL VCO clock.
168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (++) The USART clock which can be derived as well from HSI 8MHz, LSI or LSE.
169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (++) The I2C clock which can be derived as well from HSI 8MHz clock.
170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (++) The ADC clock which is derived from PLL output.
171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (++) The RTC clock which is derived from the LSE, LSI or 1 MHz HSE_RTC
172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (HSE divided by a programmable prescaler). The System clock (SYSCLK)
173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** frequency must be higher or equal to the RTC clock frequency.
174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (++) IWDG clock which is always the LSI clock.
175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (#) For the STM32F0xx devices, the maximum frequency of the SYSCLK, HCLK and PCLK1 is 48 MHz,
177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** Depending on the SYSCLK frequency, the flash latency should be adapted accordingly.
178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (#) After reset, the System clock source is the HSI (8 MHz) with 0 WS and
180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** prefetch is disabled.
181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @endverbatim
182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @{
183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */
184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /*
186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** Additional consideration on the SYSCLK based on Latency settings:
187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +-----------------------------------------------+
188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** | Latency | SYSCLK clock frequency (MHz) |
189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** |---------------|-------------------------------|
190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** |0WS(1CPU cycle)| 0 < SYSCLK <= 24 |
191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** |---------------|-------------------------------|
192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** |1WS(2CPU cycle)| 24 < SYSCLK <= 48 |
193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +-----------------------------------------------+
194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */
195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /**
197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief Resets the RCC clock configuration to the default reset state.
198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note The default reset state of the clock configuration is given below:
199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * - HSI ON and used as system clock source
200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * - HSE and PLL OFF
201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * - AHB, APB1 prescaler set to 1.
202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * - CSS and MCO1 OFF
203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * - All interrupts disabled
ARM GAS /tmp/ccX98wNy.s page 5
204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * - All interrupt and reset flags cleared
205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note This function does not modify the configuration of the
206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * - Peripheral clocks
207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * - LSI, LSE and RTC clocks
208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval HAL status
209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */
210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** HAL_StatusTypeDef HAL_RCC_DeInit(void)
211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
27 .loc 1 211 1 view -0
28 .cfi_startproc
29 @ args = 0, pretend = 0, frame = 0
30 @ frame_needed = 0, uses_anonymous_args = 0
31 0000 70B5 push {r4, r5, r6, lr}
32 .LCFI0:
33 .cfi_def_cfa_offset 16
34 .cfi_offset 4, -16
35 .cfi_offset 5, -12
36 .cfi_offset 6, -8
37 .cfi_offset 14, -4
212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** uint32_t tickstart;
38 .loc 1 212 3 view .LVU1
213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick*/
215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick();
39 .loc 1 215 3 view .LVU2
40 .loc 1 215 15 is_stmt 0 view .LVU3
41 0002 FFF7FEFF bl HAL_GetTick
42 .LVL0:
43 0006 0400 movs r4, r0
44 .LVL1:
216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Set HSION bit, HSITRIM[4:0] bits to the reset value*/
218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** SET_BIT(RCC->CR, RCC_CR_HSION | RCC_CR_HSITRIM_4);
45 .loc 1 218 3 is_stmt 1 view .LVU4
46 0008 284A ldr r2, .L17
47 000a 1368 ldr r3, [r2]
48 000c 8121 movs r1, #129
49 000e 0B43 orrs r3, r1
50 0010 1360 str r3, [r2]
219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till HSI is ready */
221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while (READ_BIT(RCC->CR, RCC_CR_HSIRDY) == RESET)
51 .loc 1 221 3 view .LVU5
52 .LVL2:
53 .L2:
54 .loc 1 221 10 is_stmt 0 view .LVU6
55 0012 264B ldr r3, .L17
56 0014 1B68 ldr r3, [r3]
57 .loc 1 221 9 view .LVU7
58 0016 9B07 lsls r3, r3, #30
59 0018 07D4 bmi .L13
222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
60 .loc 1 223 5 is_stmt 1 view .LVU8
61 .loc 1 223 10 is_stmt 0 view .LVU9
62 001a FFF7FEFF bl HAL_GetTick
63 .LVL3:
ARM GAS /tmp/ccX98wNy.s page 6
64 .loc 1 223 24 view .LVU10
65 001e 001B subs r0, r0, r4
66 .loc 1 223 8 view .LVU11
67 0020 0228 cmp r0, #2
68 0022 F6D9 bls .L2
224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT;
69 .loc 1 225 14 view .LVU12
70 0024 0324 movs r4, #3
71 .LVL4:
72 .L3:
226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Reset SW[1:0], HPRE[3:0], PPRE[2:0] and MCOSEL[2:0] bits */
230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** CLEAR_BIT(RCC->CFGR, RCC_CFGR_SW | RCC_CFGR_HPRE | RCC_CFGR_PPRE | RCC_CFGR_MCO);
231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till HSI as SYSCLK status is enabled */
233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while (READ_BIT(RCC->CFGR, RCC_CFGR_SWS) != RESET)
234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT;
238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Update the SystemCoreClock global variable for HSI as system clock source */
242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** SystemCoreClock = HSI_VALUE;
243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Adapt Systick interrupt period */
245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if (HAL_InitTick(uwTickPrio) != HAL_OK)
246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR;
248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Reset HSEON, CSSON, PLLON bits */
251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** CLEAR_BIT(RCC->CR, RCC_CR_PLLON | RCC_CR_CSSON | RCC_CR_HSEON);
252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Reset HSEBYP bit */
254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** CLEAR_BIT(RCC->CR, RCC_CR_HSEBYP);
255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get start tick */
257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick();
258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till PLLRDY is cleared */
260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(READ_BIT(RCC->CR, RCC_CR_PLLRDY) != RESET)
261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT;
265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Reset CFGR register */
269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** CLEAR_REG(RCC->CFGR);
270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Reset CFGR2 register */
ARM GAS /tmp/ccX98wNy.s page 7
272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** CLEAR_REG(RCC->CFGR2);
273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Reset CFGR3 register */
275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** CLEAR_REG(RCC->CFGR3);
276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Disable all interrupts */
278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** CLEAR_REG(RCC->CIR);
279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Clear all reset flags */
281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_CLEAR_RESET_FLAGS();
282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_OK;
284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
73 .loc 1 284 1 view .LVU13
74 0026 2000 movs r0, r4
75 @ sp needed
76 0028 70BD pop {r4, r5, r6, pc}
77 .LVL5:
78 .L13:
230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
79 .loc 1 230 3 is_stmt 1 view .LVU14
80 002a 204A ldr r2, .L17
81 002c 5368 ldr r3, [r2, #4]
82 002e 2049 ldr r1, .L17+4
83 0030 0B40 ands r3, r1
84 0032 5360 str r3, [r2, #4]
233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
85 .loc 1 233 3 view .LVU15
86 .L5:
233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
87 .loc 1 233 10 is_stmt 0 view .LVU16
88 0034 1D4B ldr r3, .L17
89 0036 5B68 ldr r3, [r3, #4]
90 0038 0C22 movs r2, #12
233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
91 .loc 1 233 9 view .LVU17
92 003a 1A42 tst r2, r3
93 003c 07D0 beq .L14
235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
94 .loc 1 235 5 is_stmt 1 view .LVU18
235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
95 .loc 1 235 10 is_stmt 0 view .LVU19
96 003e FFF7FEFF bl HAL_GetTick
97 .LVL6:
235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
98 .loc 1 235 24 view .LVU20
99 0042 001B subs r0, r0, r4
235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
100 .loc 1 235 8 view .LVU21
101 0044 1B4B ldr r3, .L17+8
102 0046 9842 cmp r0, r3
103 0048 F4D9 bls .L5
237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
104 .loc 1 237 14 view .LVU22
105 004a 0324 movs r4, #3
106 .LVL7:
237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
ARM GAS /tmp/ccX98wNy.s page 8
107 .loc 1 237 14 view .LVU23
108 004c EBE7 b .L3
109 .LVL8:
110 .L14:
242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
111 .loc 1 242 3 is_stmt 1 view .LVU24
242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
112 .loc 1 242 19 is_stmt 0 view .LVU25
113 004e 1A4B ldr r3, .L17+12
114 0050 1A4A ldr r2, .L17+16
115 0052 1A60 str r2, [r3]
245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
116 .loc 1 245 3 is_stmt 1 view .LVU26
245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
117 .loc 1 245 7 is_stmt 0 view .LVU27
118 0054 1A4B ldr r3, .L17+20
119 0056 1868 ldr r0, [r3]
120 0058 FFF7FEFF bl HAL_InitTick
121 .LVL9:
122 005c 041E subs r4, r0, #0
123 .LVL10:
245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
124 .loc 1 245 6 view .LVU28
125 005e 01D0 beq .L15
247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
126 .loc 1 247 12 view .LVU29
127 0060 0124 movs r4, #1
128 0062 E0E7 b .L3
129 .L15:
251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
130 .loc 1 251 3 is_stmt 1 view .LVU30
131 0064 114B ldr r3, .L17
132 0066 1A68 ldr r2, [r3]
133 0068 1649 ldr r1, .L17+24
134 006a 0A40 ands r2, r1
135 006c 1A60 str r2, [r3]
254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
136 .loc 1 254 3 view .LVU31
137 006e 1A68 ldr r2, [r3]
138 0070 1549 ldr r1, .L17+28
139 0072 0A40 ands r2, r1
140 0074 1A60 str r2, [r3]
257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
141 .loc 1 257 3 view .LVU32
257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
142 .loc 1 257 15 is_stmt 0 view .LVU33
143 0076 FFF7FEFF bl HAL_GetTick
144 .LVL11:
145 007a 0500 movs r5, r0
146 .LVL12:
260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
147 .loc 1 260 3 is_stmt 1 view .LVU34
148 .L7:
260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
149 .loc 1 260 9 is_stmt 0 view .LVU35
150 007c 0B4B ldr r3, .L17
151 007e 1B68 ldr r3, [r3]
ARM GAS /tmp/ccX98wNy.s page 9
260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
152 .loc 1 260 8 view .LVU36
153 0080 9B01 lsls r3, r3, #6
154 0082 06D5 bpl .L16
262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
155 .loc 1 262 5 is_stmt 1 view .LVU37
262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
156 .loc 1 262 9 is_stmt 0 view .LVU38
157 0084 FFF7FEFF bl HAL_GetTick
158 .LVL13:
262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
159 .loc 1 262 23 view .LVU39
160 0088 401B subs r0, r0, r5
262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
161 .loc 1 262 7 view .LVU40
162 008a 0228 cmp r0, #2
163 008c F6D9 bls .L7
264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
164 .loc 1 264 14 view .LVU41
165 008e 0324 movs r4, #3
166 0090 C9E7 b .L3
167 .L16:
269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
168 .loc 1 269 3 is_stmt 1 view .LVU42
169 0092 064B ldr r3, .L17
170 0094 0022 movs r2, #0
171 0096 5A60 str r2, [r3, #4]
272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
172 .loc 1 272 3 view .LVU43
173 0098 DA62 str r2, [r3, #44]
275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
174 .loc 1 275 3 view .LVU44
175 009a 1A63 str r2, [r3, #48]
278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
176 .loc 1 278 3 view .LVU45
177 009c 9A60 str r2, [r3, #8]
281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
178 .loc 1 281 3 view .LVU46
179 009e 596A ldr r1, [r3, #36]
180 00a0 8022 movs r2, #128
181 00a2 5204 lsls r2, r2, #17
182 00a4 0A43 orrs r2, r1
183 00a6 5A62 str r2, [r3, #36]
283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
184 .loc 1 283 3 view .LVU47
283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
185 .loc 1 283 10 is_stmt 0 view .LVU48
186 00a8 BDE7 b .L3
187 .L18:
188 00aa C046 .align 2
189 .L17:
190 00ac 00100240 .word 1073876992
191 00b0 0CF8FFF0 .word -251660276
192 00b4 88130000 .word 5000
193 00b8 00000000 .word SystemCoreClock
194 00bc 00127A00 .word 8000000
195 00c0 00000000 .word uwTickPrio
ARM GAS /tmp/ccX98wNy.s page 10
196 00c4 FFFFF6FE .word -17367041
197 00c8 FFFFFBFF .word -262145
198 .cfi_endproc
199 .LFE40:
201 .section .text.HAL_RCC_OscConfig,"ax",%progbits
202 .align 1
203 .global HAL_RCC_OscConfig
204 .syntax unified
205 .code 16
206 .thumb_func
207 .fpu softvfp
209 HAL_RCC_OscConfig:
210 .LVL14:
211 .LFB41:
285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /**
287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief Initializes the RCC Oscillators according to the specified parameters in the
288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * RCC_OscInitTypeDef.
289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @param RCC_OscInitStruct pointer to an RCC_OscInitTypeDef structure that
290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * contains the configuration information for the RCC Oscillators.
291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note The PLL is not disabled when used as system clock.
292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note Transitions LSE Bypass to LSE On and LSE On to LSE Bypass are not
293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * supported by this macro. User should request a transition to LSE Off
294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * first and then LSE On or LSE Bypass.
295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note Transition HSE Bypass to HSE On and HSE On to HSE Bypass are not
296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * supported by this macro. User should request a transition to HSE Off
297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * first and then HSE On or HSE Bypass.
298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval HAL status
299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */
300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
212 .loc 1 301 1 is_stmt 1 view -0
213 .cfi_startproc
214 @ args = 0, pretend = 0, frame = 8
215 @ frame_needed = 0, uses_anonymous_args = 0
216 .loc 1 301 1 is_stmt 0 view .LVU50
217 0000 70B5 push {r4, r5, r6, lr}
218 .LCFI1:
219 .cfi_def_cfa_offset 16
220 .cfi_offset 4, -16
221 .cfi_offset 5, -12
222 .cfi_offset 6, -8
223 .cfi_offset 14, -4
224 0002 82B0 sub sp, sp, #8
225 .LCFI2:
226 .cfi_def_cfa_offset 24
227 0004 041E subs r4, r0, #0
302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** uint32_t tickstart;
228 .loc 1 302 3 is_stmt 1 view .LVU51
303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** uint32_t pll_config;
229 .loc 1 303 3 view .LVU52
304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** uint32_t pll_config2;
230 .loc 1 304 3 view .LVU53
305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check Null pointer */
307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(RCC_OscInitStruct == NULL)
231 .loc 1 307 3 view .LVU54
ARM GAS /tmp/ccX98wNy.s page 11
232 .loc 1 307 5 is_stmt 0 view .LVU55
233 0006 00D1 bne .LCB188
234 0008 7FE2 b .L86 @long jump
235 .LCB188:
308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR;
310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the parameters */
313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
236 .loc 1 313 3 is_stmt 1 view .LVU56
314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /*------------------------------- HSE Configuration ------------------------*/
316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
237 .loc 1 316 3 view .LVU57
238 .loc 1 316 5 is_stmt 0 view .LVU58
239 000a 0368 ldr r3, [r0]
240 000c DB07 lsls r3, r3, #31
241 000e 2BD5 bpl .L21
317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the parameters */
319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
242 .loc 1 319 5 is_stmt 1 view .LVU59
320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowe
322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE)
243 .loc 1 322 5 view .LVU60
244 .loc 1 322 9 is_stmt 0 view .LVU61
245 0010 B34B ldr r3, .L129
246 0012 5A68 ldr r2, [r3, #4]
247 0014 0C23 movs r3, #12
248 0016 1340 ands r3, r2
249 .loc 1 322 7 view .LVU62
250 0018 042B cmp r3, #4
251 001a 1DD0 beq .L22
323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_
252 .loc 1 323 13 view .LVU63
253 001c B04B ldr r3, .L129
254 001e 5A68 ldr r2, [r3, #4]
255 0020 0C23 movs r3, #12
256 0022 1340 ands r3, r2
257 .loc 1 323 8 view .LVU64
258 0024 082B cmp r3, #8
259 0026 0ED0 beq .L112
260 .L23:
324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_
326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR;
328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else
331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Set the new HSE configuration ---------------------------------------*/
333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
261 .loc 1 333 7 is_stmt 1 view .LVU65
262 .loc 1 333 7 view .LVU66
ARM GAS /tmp/ccX98wNy.s page 12
263 0028 6368 ldr r3, [r4, #4]
264 002a 012B cmp r3, #1
265 002c 41D0 beq .L113
266 .loc 1 333 7 discriminator 2 view .LVU67
267 002e 002B cmp r3, #0
268 0030 56D1 bne .L26
269 .loc 1 333 7 discriminator 3 view .LVU68
270 0032 AB4B ldr r3, .L129
271 0034 1A68 ldr r2, [r3]
272 0036 AB49 ldr r1, .L129+4
273 0038 0A40 ands r2, r1
274 003a 1A60 str r2, [r3]
275 .loc 1 333 7 discriminator 3 view .LVU69
276 003c 1A68 ldr r2, [r3]
277 003e AA49 ldr r1, .L129+8
278 0040 0A40 ands r2, r1
279 0042 1A60 str r2, [r3]
280 0044 3BE0 b .L25
281 .L112:
323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_
282 .loc 1 323 82 is_stmt 0 discriminator 1 view .LVU70
283 0046 A64B ldr r3, .L129
284 0048 5B68 ldr r3, [r3, #4]
285 004a C022 movs r2, #192
286 004c 5202 lsls r2, r2, #9
287 004e 1340 ands r3, r2
323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_
288 .loc 1 323 78 discriminator 1 view .LVU71
289 0050 8022 movs r2, #128
290 0052 5202 lsls r2, r2, #9
291 0054 9342 cmp r3, r2
292 0056 E7D1 bne .L23
293 .L22:
325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
294 .loc 1 325 7 is_stmt 1 view .LVU72
325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
295 .loc 1 325 11 is_stmt 0 view .LVU73
296 0058 A14B ldr r3, .L129
297 005a 1B68 ldr r3, [r3]
325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
298 .loc 1 325 9 view .LVU74
299 005c 9B03 lsls r3, r3, #14
300 005e 03D5 bpl .L21
325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
301 .loc 1 325 57 discriminator 1 view .LVU75
302 0060 6368 ldr r3, [r4, #4]
303 0062 002B cmp r3, #0
304 0064 00D1 bne .LCB256
305 0066 53E2 b .L114 @long jump
306 .LCB256:
307 .LVL15:
308 .L21:
334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the HSE State */
337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
ARM GAS /tmp/ccX98wNy.s page 13
339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */
340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick();
341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till HSE is ready */
343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT;
348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else
352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */
354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick();
355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till HSE is disabled */
357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT;
362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /*----------------------------- HSI Configuration --------------------------*/
368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
309 .loc 1 368 3 is_stmt 1 view .LVU76
310 .loc 1 368 5 is_stmt 0 view .LVU77
311 0068 2368 ldr r3, [r4]
312 006a 9B07 lsls r3, r3, #30
313 006c 77D5 bpl .L33
369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the parameters */
371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
314 .loc 1 371 5 is_stmt 1 view .LVU78
372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
315 .loc 1 372 5 view .LVU79
373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock *
375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI)
316 .loc 1 375 5 view .LVU80
317 .loc 1 375 9 is_stmt 0 view .LVU81
318 006e 9C4B ldr r3, .L129
319 0070 5B68 ldr r3, [r3, #4]
320 0072 0C22 movs r2, #12
321 .loc 1 375 7 view .LVU82
322 0074 1A42 tst r2, r3
323 0076 62D0 beq .L34
376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_
324 .loc 1 376 13 view .LVU83
325 0078 994B ldr r3, .L129
326 007a 5A68 ldr r2, [r3, #4]
327 007c 0C23 movs r3, #12
ARM GAS /tmp/ccX98wNy.s page 14
328 007e 1340 ands r3, r2
329 .loc 1 376 8 view .LVU84
330 0080 082B cmp r3, #8
331 0082 53D0 beq .L115
332 .L35:
377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* When HSI is used as system clock it will not disabled */
379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_
380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR;
382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Otherwise, just the calibration is allowed */
384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else
385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else
391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the HSI State */
393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
333 .loc 1 393 7 is_stmt 1 view .LVU85
334 .loc 1 393 9 is_stmt 0 view .LVU86
335 0084 E368 ldr r3, [r4, #12]
336 0086 002B cmp r3, #0
337 0088 00D1 bne .LCB286
338 008a 8AE0 b .L37 @long jump
339 .LCB286:
394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Enable the Internal High Speed oscillator (HSI). */
396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSI_ENABLE();
340 .loc 1 396 9 is_stmt 1 view .LVU87
341 008c 944A ldr r2, .L129
342 008e 1368 ldr r3, [r2]
343 0090 0121 movs r1, #1
344 0092 0B43 orrs r3, r1
345 0094 1360 str r3, [r2]
397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */
399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick();
346 .loc 1 399 9 view .LVU88
347 .loc 1 399 21 is_stmt 0 view .LVU89
348 0096 FFF7FEFF bl HAL_GetTick
349 .LVL16:
350 009a 0500 movs r5, r0
351 .LVL17:
400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till HSI is ready */
402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
352 .loc 1 402 9 is_stmt 1 view .LVU90
353 .L38:
354 .loc 1 402 15 is_stmt 0 view .LVU91
355 009c 904B ldr r3, .L129
356 009e 1B68 ldr r3, [r3]
357 .loc 1 402 14 view .LVU92
358 00a0 9B07 lsls r3, r3, #30
ARM GAS /tmp/ccX98wNy.s page 15
359 00a2 75D4 bmi .L116
403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
360 .loc 1 404 11 is_stmt 1 view .LVU93
361 .loc 1 404 15 is_stmt 0 view .LVU94
362 00a4 FFF7FEFF bl HAL_GetTick
363 .LVL18:
364 .loc 1 404 29 view .LVU95
365 00a8 401B subs r0, r0, r5
366 .loc 1 404 13 view .LVU96
367 00aa 0228 cmp r0, #2
368 00ac F6D9 bls .L38
405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT;
369 .loc 1 406 20 view .LVU97
370 00ae 0320 movs r0, #3
371 00b0 2CE2 b .L20
372 .LVL19:
373 .L113:
333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
374 .loc 1 333 7 is_stmt 1 discriminator 1 view .LVU98
375 00b2 8B4A ldr r2, .L129
376 00b4 1168 ldr r1, [r2]
377 00b6 8023 movs r3, #128
378 00b8 5B02 lsls r3, r3, #9
379 00ba 0B43 orrs r3, r1
380 00bc 1360 str r3, [r2]
381 .L25:
337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
382 .loc 1 337 7 view .LVU99
337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
383 .loc 1 337 9 is_stmt 0 view .LVU100
384 00be 6368 ldr r3, [r4, #4]
385 00c0 002B cmp r3, #0
386 00c2 25D0 beq .L28
340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
387 .loc 1 340 9 is_stmt 1 view .LVU101
340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
388 .loc 1 340 21 is_stmt 0 view .LVU102
389 00c4 FFF7FEFF bl HAL_GetTick
390 .LVL20:
340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
391 .loc 1 340 21 view .LVU103
392 00c8 0500 movs r5, r0
393 .LVL21:
343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
394 .loc 1 343 9 is_stmt 1 view .LVU104
395 .L29:
343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
396 .loc 1 343 15 is_stmt 0 view .LVU105
397 00ca 854B ldr r3, .L129
398 00cc 1B68 ldr r3, [r3]
343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
399 .loc 1 343 14 view .LVU106
400 00ce 9B03 lsls r3, r3, #14
401 00d0 CAD4 bmi .L21
345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
ARM GAS /tmp/ccX98wNy.s page 16
402 .loc 1 345 11 is_stmt 1 view .LVU107
345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
403 .loc 1 345 15 is_stmt 0 view .LVU108
404 00d2 FFF7FEFF bl HAL_GetTick
405 .LVL22:
345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
406 .loc 1 345 29 view .LVU109
407 00d6 401B subs r0, r0, r5
345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
408 .loc 1 345 13 view .LVU110
409 00d8 6428 cmp r0, #100
410 00da F6D9 bls .L29
347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
411 .loc 1 347 20 view .LVU111
412 00dc 0320 movs r0, #3
413 00de 15E2 b .L20
414 .LVL23:
415 .L26:
333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
416 .loc 1 333 7 is_stmt 1 discriminator 4 view .LVU112
417 00e0 052B cmp r3, #5
418 00e2 09D0 beq .L117
333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
419 .loc 1 333 7 discriminator 6 view .LVU113
420 00e4 7E4B ldr r3, .L129
421 00e6 1A68 ldr r2, [r3]
422 00e8 7E49 ldr r1, .L129+4
423 00ea 0A40 ands r2, r1
424 00ec 1A60 str r2, [r3]
333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
425 .loc 1 333 7 discriminator 6 view .LVU114
426 00ee 1A68 ldr r2, [r3]
427 00f0 7D49 ldr r1, .L129+8
428 00f2 0A40 ands r2, r1
429 00f4 1A60 str r2, [r3]
430 00f6 E2E7 b .L25
431 .L117:
333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
432 .loc 1 333 7 discriminator 5 view .LVU115
433 00f8 794B ldr r3, .L129
434 00fa 1968 ldr r1, [r3]
435 00fc 8022 movs r2, #128
436 00fe D202 lsls r2, r2, #11
437 0100 0A43 orrs r2, r1
438 0102 1A60 str r2, [r3]
333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
439 .loc 1 333 7 discriminator 5 view .LVU116
440 0104 1968 ldr r1, [r3]
441 0106 8022 movs r2, #128
442 0108 5202 lsls r2, r2, #9
443 010a 0A43 orrs r2, r1
444 010c 1A60 str r2, [r3]
445 010e D6E7 b .L25
446 .L28:
354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
447 .loc 1 354 9 view .LVU117
354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
ARM GAS /tmp/ccX98wNy.s page 17
448 .loc 1 354 21 is_stmt 0 view .LVU118
449 0110 FFF7FEFF bl HAL_GetTick
450 .LVL24:
354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
451 .loc 1 354 21 view .LVU119
452 0114 0500 movs r5, r0
453 .LVL25:
357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
454 .loc 1 357 9 is_stmt 1 view .LVU120
455 .L31:
357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
456 .loc 1 357 15 is_stmt 0 view .LVU121
457 0116 724B ldr r3, .L129
458 0118 1B68 ldr r3, [r3]
357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
459 .loc 1 357 14 view .LVU122
460 011a 9B03 lsls r3, r3, #14
461 011c A4D5 bpl .L21
359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
462 .loc 1 359 12 is_stmt 1 view .LVU123
359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
463 .loc 1 359 16 is_stmt 0 view .LVU124
464 011e FFF7FEFF bl HAL_GetTick
465 .LVL26:
359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
466 .loc 1 359 30 view .LVU125
467 0122 401B subs r0, r0, r5
359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
468 .loc 1 359 14 view .LVU126
469 0124 6428 cmp r0, #100
470 0126 F6D9 bls .L31
361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
471 .loc 1 361 20 view .LVU127
472 0128 0320 movs r0, #3
473 012a EFE1 b .L20
474 .LVL27:
475 .L115:
376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
476 .loc 1 376 82 discriminator 1 view .LVU128
477 012c 6C4B ldr r3, .L129
478 012e 5B68 ldr r3, [r3, #4]
479 0130 C022 movs r2, #192
480 0132 5202 lsls r2, r2, #9
481 0134 1340 ands r3, r2
376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
482 .loc 1 376 78 discriminator 1 view .LVU129
483 0136 8022 movs r2, #128
484 0138 1202 lsls r2, r2, #8
485 013a 9342 cmp r3, r2
486 013c A2D1 bne .L35
487 .L34:
379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
488 .loc 1 379 7 is_stmt 1 view .LVU130
379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
489 .loc 1 379 11 is_stmt 0 view .LVU131
490 013e 684B ldr r3, .L129
491 0140 1B68 ldr r3, [r3]
ARM GAS /tmp/ccX98wNy.s page 18
379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
492 .loc 1 379 9 view .LVU132
493 0142 9B07 lsls r3, r3, #30
494 0144 03D5 bpl .L36
379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
495 .loc 1 379 57 discriminator 1 view .LVU133
496 0146 E368 ldr r3, [r4, #12]
497 0148 012B cmp r3, #1
498 014a 00D0 beq .LCB443
499 014c E2E1 b .L90 @long jump
500 .LCB443:
501 .L36:
387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
502 .loc 1 387 9 is_stmt 1 view .LVU134
503 014e 6449 ldr r1, .L129
504 0150 0B68 ldr r3, [r1]
505 0152 F822 movs r2, #248
506 0154 9343 bics r3, r2
507 0156 2269 ldr r2, [r4, #16]
508 0158 D200 lsls r2, r2, #3
509 015a 1343 orrs r3, r2
510 015c 0B60 str r3, [r1]
511 .L33:
407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else
414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Disable the Internal High Speed oscillator (HSI). */
416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSI_DISABLE();
417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */
419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick();
420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till HSI is disabled */
422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT;
427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /*------------------------------ LSI Configuration -------------------------*/
433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
512 .loc 1 433 3 view .LVU135
513 .loc 1 433 5 is_stmt 0 view .LVU136
514 015e 2368 ldr r3, [r4]
515 0160 1B07 lsls r3, r3, #28
516 0162 44D5 bpl .L42
434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the parameters */
ARM GAS /tmp/ccX98wNy.s page 19
436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
517 .loc 1 436 5 is_stmt 1 view .LVU137
437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the LSI State */
439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
518 .loc 1 439 5 view .LVU138
519 .loc 1 439 7 is_stmt 0 view .LVU139
520 0164 E369 ldr r3, [r4, #28]
521 0166 002B cmp r3, #0
522 0168 2ED0 beq .L43
440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Enable the Internal Low Speed oscillator (LSI). */
442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_LSI_ENABLE();
523 .loc 1 442 7 is_stmt 1 view .LVU140
524 016a 5D4A ldr r2, .L129
525 016c 536A ldr r3, [r2, #36]
526 016e 0121 movs r1, #1
527 0170 0B43 orrs r3, r1
528 0172 5362 str r3, [r2, #36]
443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */
445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick();
529 .loc 1 445 7 view .LVU141
530 .loc 1 445 19 is_stmt 0 view .LVU142
531 0174 FFF7FEFF bl HAL_GetTick
532 .LVL28:
533 0178 0500 movs r5, r0
534 .LVL29:
446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till LSI is ready */
448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
535 .loc 1 448 7 is_stmt 1 view .LVU143
536 .L44:
537 .loc 1 448 13 is_stmt 0 view .LVU144
538 017a 594B ldr r3, .L129
539 017c 5B6A ldr r3, [r3, #36]
540 .loc 1 448 12 view .LVU145
541 017e 9B07 lsls r3, r3, #30
542 0180 35D4 bmi .L42
449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
543 .loc 1 450 9 is_stmt 1 view .LVU146
544 .loc 1 450 13 is_stmt 0 view .LVU147
545 0182 FFF7FEFF bl HAL_GetTick
546 .LVL30:
547 .loc 1 450 27 view .LVU148
548 0186 401B subs r0, r0, r5
549 .loc 1 450 11 view .LVU149
550 0188 0228 cmp r0, #2
551 018a F6D9 bls .L44
451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT;
552 .loc 1 452 18 view .LVU150
553 018c 0320 movs r0, #3
554 018e BDE1 b .L20
555 .L116:
411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
ARM GAS /tmp/ccX98wNy.s page 20
556 .loc 1 411 9 is_stmt 1 view .LVU151
557 0190 5349 ldr r1, .L129
558 0192 0B68 ldr r3, [r1]
559 0194 F822 movs r2, #248
560 0196 9343 bics r3, r2
561 0198 2269 ldr r2, [r4, #16]
562 019a D200 lsls r2, r2, #3
563 019c 1343 orrs r3, r2
564 019e 0B60 str r3, [r1]
565 01a0 DDE7 b .L33
566 .LVL31:
567 .L37:
416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
568 .loc 1 416 9 view .LVU152
569 01a2 4F4A ldr r2, .L129
570 01a4 1368 ldr r3, [r2]
571 01a6 0121 movs r1, #1
572 01a8 8B43 bics r3, r1
573 01aa 1360 str r3, [r2]
419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
574 .loc 1 419 9 view .LVU153
419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
575 .loc 1 419 21 is_stmt 0 view .LVU154
576 01ac FFF7FEFF bl HAL_GetTick
577 .LVL32:
578 01b0 0500 movs r5, r0
579 .LVL33:
422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
580 .loc 1 422 9 is_stmt 1 view .LVU155
581 .L40:
422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
582 .loc 1 422 15 is_stmt 0 view .LVU156
583 01b2 4B4B ldr r3, .L129
584 01b4 1B68 ldr r3, [r3]
422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
585 .loc 1 422 14 view .LVU157
586 01b6 9B07 lsls r3, r3, #30
587 01b8 D1D5 bpl .L33
424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
588 .loc 1 424 11 is_stmt 1 view .LVU158
424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
589 .loc 1 424 15 is_stmt 0 view .LVU159
590 01ba FFF7FEFF bl HAL_GetTick
591 .LVL34:
424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
592 .loc 1 424 29 view .LVU160
593 01be 401B subs r0, r0, r5
424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
594 .loc 1 424 13 view .LVU161
595 01c0 0228 cmp r0, #2
596 01c2 F6D9 bls .L40
426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
597 .loc 1 426 20 view .LVU162
598 01c4 0320 movs r0, #3
599 01c6 A1E1 b .L20
600 .LVL35:
601 .L43:
ARM GAS /tmp/ccX98wNy.s page 21
453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else
457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Disable the Internal Low Speed oscillator (LSI). */
459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_LSI_DISABLE();
602 .loc 1 459 7 is_stmt 1 view .LVU163
603 01c8 454A ldr r2, .L129
604 01ca 536A ldr r3, [r2, #36]
605 01cc 0121 movs r1, #1
606 01ce 8B43 bics r3, r1
607 01d0 5362 str r3, [r2, #36]
460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */
462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick();
608 .loc 1 462 7 view .LVU164
609 .loc 1 462 19 is_stmt 0 view .LVU165
610 01d2 FFF7FEFF bl HAL_GetTick
611 .LVL36:
612 01d6 0500 movs r5, r0
613 .LVL37:
463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till LSI is disabled */
465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
614 .loc 1 465 7 is_stmt 1 view .LVU166
615 .L46:
616 .loc 1 465 13 is_stmt 0 view .LVU167
617 01d8 414B ldr r3, .L129
618 01da 5B6A ldr r3, [r3, #36]
619 .loc 1 465 12 view .LVU168
620 01dc 9B07 lsls r3, r3, #30
621 01de 06D5 bpl .L42
466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
622 .loc 1 467 9 is_stmt 1 view .LVU169
623 .loc 1 467 13 is_stmt 0 view .LVU170
624 01e0 FFF7FEFF bl HAL_GetTick
625 .LVL38:
626 .loc 1 467 27 view .LVU171
627 01e4 401B subs r0, r0, r5
628 .loc 1 467 11 view .LVU172
629 01e6 0228 cmp r0, #2
630 01e8 F6D9 bls .L46
468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT;
631 .loc 1 469 18 view .LVU173
632 01ea 0320 movs r0, #3
633 01ec 8EE1 b .L20
634 .LVL39:
635 .L42:
470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /*------------------------------ LSE Configuration -------------------------*/
475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
ARM GAS /tmp/ccX98wNy.s page 22
636 .loc 1 475 3 is_stmt 1 view .LVU174
637 .loc 1 475 5 is_stmt 0 view .LVU175
638 01ee 2368 ldr r3, [r4]
639 01f0 5B07 lsls r3, r3, #29
640 01f2 00D4 bmi .LCB589
641 01f4 80E0 b .L48 @long jump
642 .LCB589:
643 .LBB2:
476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** FlagStatus pwrclkchanged = RESET;
644 .loc 1 477 5 is_stmt 1 view .LVU176
645 .LVL40:
478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the parameters */
480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
646 .loc 1 480 5 view .LVU177
481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Update LSE configuration in Backup Domain control register */
483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Requires to enable write access to Backup Domain of necessary */
484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(__HAL_RCC_PWR_IS_CLK_DISABLED())
647 .loc 1 484 5 view .LVU178
648 .loc 1 484 8 is_stmt 0 view .LVU179
649 01f6 3A4B ldr r3, .L129
650 01f8 DB69 ldr r3, [r3, #28]
651 .loc 1 484 7 view .LVU180
652 01fa DB00 lsls r3, r3, #3
653 01fc 0BD4 bmi .L95
485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_PWR_CLK_ENABLE();
654 .loc 1 486 7 is_stmt 1 view .LVU181
655 .LBB3:
656 .loc 1 486 7 view .LVU182
657 .loc 1 486 7 view .LVU183
658 01fe 384A ldr r2, .L129
659 0200 D169 ldr r1, [r2, #28]
660 0202 8020 movs r0, #128
661 0204 4005 lsls r0, r0, #21
662 0206 0143 orrs r1, r0
663 0208 D161 str r1, [r2, #28]
664 .loc 1 486 7 view .LVU184
665 020a D369 ldr r3, [r2, #28]
666 020c 0340 ands r3, r0
667 020e 0193 str r3, [sp, #4]
668 .loc 1 486 7 view .LVU185
669 0210 019B ldr r3, [sp, #4]
670 .LBE3:
487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** pwrclkchanged = SET;
671 .loc 1 487 7 view .LVU186
672 .LVL41:
673 .loc 1 487 21 is_stmt 0 view .LVU187
674 0212 0125 movs r5, #1
675 0214 00E0 b .L49
676 .LVL42:
677 .L95:
477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
678 .loc 1 477 22 view .LVU188
679 0216 0025 movs r5, #0
ARM GAS /tmp/ccX98wNy.s page 23
680 .LVL43:
681 .L49:
488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
682 .loc 1 490 5 is_stmt 1 view .LVU189
683 .loc 1 490 8 is_stmt 0 view .LVU190
684 0218 344B ldr r3, .L129+12
685 021a 1B68 ldr r3, [r3]
686 .loc 1 490 7 view .LVU191
687 021c DB05 lsls r3, r3, #23
688 021e 0ED5 bpl .L118
689 .L50:
491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Enable write access to Backup domain */
493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** SET_BIT(PWR->CR, PWR_CR_DBP);
494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait for Backup domain Write protection disable */
496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick();
497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT;
503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Set the new LSE configuration -----------------------------------------*/
508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
690 .loc 1 508 5 is_stmt 1 view .LVU192
691 .loc 1 508 5 view .LVU193
692 0220 A368 ldr r3, [r4, #8]
693 0222 012B cmp r3, #1
694 0224 1FD0 beq .L119
695 .loc 1 508 5 discriminator 2 view .LVU194
696 0226 002B cmp r3, #0
697 0228 34D1 bne .L55
698 .loc 1 508 5 discriminator 3 view .LVU195
699 022a 2D4B ldr r3, .L129
700 022c 1A6A ldr r2, [r3, #32]
701 022e 0121 movs r1, #1
702 0230 8A43 bics r2, r1
703 0232 1A62 str r2, [r3, #32]
704 .loc 1 508 5 discriminator 3 view .LVU196
705 0234 1A6A ldr r2, [r3, #32]
706 0236 0331 adds r1, r1, #3
707 0238 8A43 bics r2, r1
708 023a 1A62 str r2, [r3, #32]
709 023c 18E0 b .L54
710 .L118:
493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
711 .loc 1 493 7 view .LVU197
712 023e 2B4A ldr r2, .L129+12
713 0240 1168 ldr r1, [r2]
714 0242 8023 movs r3, #128
ARM GAS /tmp/ccX98wNy.s page 24
715 0244 5B00 lsls r3, r3, #1
716 0246 0B43 orrs r3, r1
717 0248 1360 str r3, [r2]
496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
718 .loc 1 496 7 view .LVU198
496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
719 .loc 1 496 19 is_stmt 0 view .LVU199
720 024a FFF7FEFF bl HAL_GetTick
721 .LVL44:
722 024e 0600 movs r6, r0
723 .LVL45:
498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
724 .loc 1 498 7 is_stmt 1 view .LVU200
725 .L51:
498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
726 .loc 1 498 13 is_stmt 0 view .LVU201
727 0250 264B ldr r3, .L129+12
728 0252 1B68 ldr r3, [r3]
498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
729 .loc 1 498 12 view .LVU202
730 0254 DB05 lsls r3, r3, #23
731 0256 E3D4 bmi .L50
500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
732 .loc 1 500 9 is_stmt 1 view .LVU203
500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
733 .loc 1 500 13 is_stmt 0 view .LVU204
734 0258 FFF7FEFF bl HAL_GetTick
735 .LVL46:
500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
736 .loc 1 500 27 view .LVU205
737 025c 801B subs r0, r0, r6
500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
738 .loc 1 500 11 view .LVU206
739 025e 6428 cmp r0, #100
740 0260 F6D9 bls .L51
502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
741 .loc 1 502 18 view .LVU207
742 0262 0320 movs r0, #3
743 0264 52E1 b .L20
744 .LVL47:
745 .L119:
746 .loc 1 508 5 is_stmt 1 discriminator 1 view .LVU208
747 0266 1E4A ldr r2, .L129
748 0268 136A ldr r3, [r2, #32]
749 026a 0121 movs r1, #1
750 026c 0B43 orrs r3, r1
751 026e 1362 str r3, [r2, #32]
752 .L54:
509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the LSE State */
510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(RCC_OscInitStruct->LSEState != RCC_LSE_OFF)
753 .loc 1 510 5 view .LVU209
754 .loc 1 510 7 is_stmt 0 view .LVU210
755 0270 A368 ldr r3, [r4, #8]
756 0272 002B cmp r3, #0
757 0274 24D0 beq .L57
511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */
ARM GAS /tmp/ccX98wNy.s page 25
513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick();
758 .loc 1 513 7 is_stmt 1 view .LVU211
759 .loc 1 513 19 is_stmt 0 view .LVU212
760 0276 FFF7FEFF bl HAL_GetTick
761 .LVL48:
762 027a 0600 movs r6, r0
763 .LVL49:
514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till LSE is ready */
516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
764 .loc 1 516 7 is_stmt 1 view .LVU213
765 .L58:
766 .loc 1 516 13 is_stmt 0 view .LVU214
767 027c 184B ldr r3, .L129
768 027e 1B6A ldr r3, [r3, #32]
769 .loc 1 516 12 view .LVU215
770 0280 9B07 lsls r3, r3, #30
771 0282 37D4 bmi .L60
517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
772 .loc 1 518 9 is_stmt 1 view .LVU216
773 .loc 1 518 13 is_stmt 0 view .LVU217
774 0284 FFF7FEFF bl HAL_GetTick
775 .LVL50:
776 .loc 1 518 27 view .LVU218
777 0288 801B subs r0, r0, r6
778 .loc 1 518 11 view .LVU219
779 028a 194B ldr r3, .L129+16
780 028c 9842 cmp r0, r3
781 028e F5D9 bls .L58
519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT;
782 .loc 1 520 18 view .LVU220
783 0290 0320 movs r0, #3
784 0292 3BE1 b .L20
785 .LVL51:
786 .L55:
508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the LSE State */
787 .loc 1 508 5 is_stmt 1 discriminator 4 view .LVU221
788 0294 052B cmp r3, #5
789 0296 09D0 beq .L120
508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the LSE State */
790 .loc 1 508 5 discriminator 6 view .LVU222
791 0298 114B ldr r3, .L129
792 029a 1A6A ldr r2, [r3, #32]
793 029c 0121 movs r1, #1
794 029e 8A43 bics r2, r1
795 02a0 1A62 str r2, [r3, #32]
508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the LSE State */
796 .loc 1 508 5 discriminator 6 view .LVU223
797 02a2 1A6A ldr r2, [r3, #32]
798 02a4 0331 adds r1, r1, #3
799 02a6 8A43 bics r2, r1
800 02a8 1A62 str r2, [r3, #32]
801 02aa E1E7 b .L54
802 .L120:
508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the LSE State */
ARM GAS /tmp/ccX98wNy.s page 26
803 .loc 1 508 5 discriminator 5 view .LVU224
804 02ac 0C4B ldr r3, .L129
805 02ae 1A6A ldr r2, [r3, #32]
806 02b0 0421 movs r1, #4
807 02b2 0A43 orrs r2, r1
808 02b4 1A62 str r2, [r3, #32]
508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the LSE State */
809 .loc 1 508 5 discriminator 5 view .LVU225
810 02b6 1A6A ldr r2, [r3, #32]
811 02b8 0339 subs r1, r1, #3
812 02ba 0A43 orrs r2, r1
813 02bc 1A62 str r2, [r3, #32]
814 02be D7E7 b .L54
815 .L57:
521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else
525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */
527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick();
816 .loc 1 527 7 view .LVU226
817 .loc 1 527 19 is_stmt 0 view .LVU227
818 02c0 FFF7FEFF bl HAL_GetTick
819 .LVL52:
820 02c4 0600 movs r6, r0
821 .LVL53:
528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till LSE is disabled */
530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
822 .loc 1 530 7 is_stmt 1 view .LVU228
823 .L61:
824 .loc 1 530 13 is_stmt 0 view .LVU229
825 02c6 064B ldr r3, .L129
826 02c8 1B6A ldr r3, [r3, #32]
827 .loc 1 530 12 view .LVU230
828 02ca 9B07 lsls r3, r3, #30
829 02cc 12D5 bpl .L60
531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
830 .loc 1 532 9 is_stmt 1 view .LVU231
831 .loc 1 532 13 is_stmt 0 view .LVU232
832 02ce FFF7FEFF bl HAL_GetTick
833 .LVL54:
834 .loc 1 532 27 view .LVU233
835 02d2 801B subs r0, r0, r6
836 .loc 1 532 11 view .LVU234
837 02d4 064B ldr r3, .L129+16
838 02d6 9842 cmp r0, r3
839 02d8 F5D9 bls .L61
533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT;
840 .loc 1 534 18 view .LVU235
841 02da 0320 movs r0, #3
842 02dc 16E1 b .L20
843 .L130:
844 02de C046 .align 2
ARM GAS /tmp/ccX98wNy.s page 27
845 .L129:
846 02e0 00100240 .word 1073876992
847 02e4 FFFFFEFF .word -65537
848 02e8 FFFFFBFF .word -262145
849 02ec 00700040 .word 1073770496
850 02f0 88130000 .word 5000
851 .L60:
535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Require to disable power clock if necessary */
540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(pwrclkchanged == SET)
852 .loc 1 540 5 is_stmt 1 view .LVU236
853 .loc 1 540 7 is_stmt 0 view .LVU237
854 02f4 012D cmp r5, #1
855 02f6 39D0 beq .L121
856 .LVL55:
857 .L48:
858 .loc 1 540 7 view .LVU238
859 .LBE2:
541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_PWR_CLK_DISABLE();
543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /*----------------------------- HSI14 Configuration --------------------------*/
547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI14) == RCC_OSCILLATORTYPE_HSI14)
860 .loc 1 547 3 is_stmt 1 view .LVU239
861 .loc 1 547 5 is_stmt 0 view .LVU240
862 02f8 2368 ldr r3, [r4]
863 02fa DB06 lsls r3, r3, #27
864 02fc 10D5 bpl .L63
548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the parameters */
550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_HSI14(RCC_OscInitStruct->HSI14State));
865 .loc 1 550 5 is_stmt 1 view .LVU241
551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSI14CalibrationValue));
866 .loc 1 551 5 view .LVU242
552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the HSI14 State */
554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(RCC_OscInitStruct->HSI14State == RCC_HSI14_ON)
867 .loc 1 554 5 view .LVU243
868 .loc 1 554 25 is_stmt 0 view .LVU244
869 02fe 6369 ldr r3, [r4, #20]
870 .loc 1 554 7 view .LVU245
871 0300 012B cmp r3, #1
872 0302 39D0 beq .L122
555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Disable ADC control of the Internal High Speed oscillator HSI14 */
557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSI14ADC_DISABLE();
558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Enable the Internal High Speed oscillator (HSI). */
560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSI14_ENABLE();
561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */
563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick();
ARM GAS /tmp/ccX98wNy.s page 28
564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till HSI is ready */
566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI14RDY) == RESET)
567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart) > HSI14_TIMEOUT_VALUE)
569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT;
571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Adjusts the Internal High Speed oscillator 14Mhz (HSI14) calibration value. */
575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSI14_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSI14CalibrationValue);
576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else if(RCC_OscInitStruct->HSI14State == RCC_HSI14_ADC_CONTROL)
873 .loc 1 577 10 is_stmt 1 view .LVU246
874 .loc 1 577 12 is_stmt 0 view .LVU247
875 0304 0533 adds r3, r3, #5
876 0306 57D1 bne .L67
578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Enable ADC control of the Internal High Speed oscillator HSI14 */
580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSI14ADC_ENABLE();
877 .loc 1 580 7 is_stmt 1 view .LVU248
878 0308 894A ldr r2, .L131
879 030a 536B ldr r3, [r2, #52]
880 030c 0421 movs r1, #4
881 030e 8B43 bics r3, r1
882 0310 5363 str r3, [r2, #52]
581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Adjusts the Internal High Speed oscillator 14Mhz (HSI14) calibration value. */
583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSI14_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSI14CalibrationValue);
883 .loc 1 583 7 view .LVU249
884 0312 536B ldr r3, [r2, #52]
885 0314 F431 adds r1, r1, #244
886 0316 8B43 bics r3, r1
887 0318 A169 ldr r1, [r4, #24]
888 031a C900 lsls r1, r1, #3
889 031c 0B43 orrs r3, r1
890 031e 5363 str r3, [r2, #52]
891 .L63:
584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else
586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Disable ADC control of the Internal High Speed oscillator HSI14 */
588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSI14ADC_DISABLE();
589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Disable the Internal High Speed oscillator (HSI). */
591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSI14_DISABLE();
592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */
594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick();
595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till HSI is ready */
597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI14RDY) != RESET)
598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart) > HSI14_TIMEOUT_VALUE)
600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT;
ARM GAS /tmp/ccX98wNy.s page 29
602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #if defined(RCC_HSI48_SUPPORT)
608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /*----------------------------- HSI48 Configuration --------------------------*/
609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI48) == RCC_OSCILLATORTYPE_HSI48)
892 .loc 1 609 3 view .LVU250
893 .loc 1 609 5 is_stmt 0 view .LVU251
894 0320 2368 ldr r3, [r4]
895 0322 9B06 lsls r3, r3, #26
896 0324 6ED5 bpl .L70
610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the parameters */
612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_HSI48(RCC_OscInitStruct->HSI48State));
897 .loc 1 612 5 is_stmt 1 view .LVU252
613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* When the HSI48 is used as system clock it is not allowed to be disabled */
615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI48) ||
898 .loc 1 615 5 view .LVU253
899 .loc 1 615 9 is_stmt 0 view .LVU254
900 0326 824B ldr r3, .L131
901 0328 5A68 ldr r2, [r3, #4]
902 032a 0C23 movs r3, #12
903 032c 1340 ands r3, r2
904 .loc 1 615 7 view .LVU255
905 032e 0C2B cmp r3, #12
906 0330 60D0 beq .L71
616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSC
907 .loc 1 616 10 discriminator 1 view .LVU256
908 0332 7F4B ldr r3, .L131
909 0334 5A68 ldr r2, [r3, #4]
910 0336 0C23 movs r3, #12
911 0338 1340 ands r3, r2
615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSC
912 .loc 1 615 73 discriminator 1 view .LVU257
913 033a 082B cmp r3, #8
914 033c 53D0 beq .L123
915 .L72:
617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) != RESET) && (RCC_OscInitStruct->HSI48State != RCC_
619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR;
621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else
624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the HSI48 State */
626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(RCC_OscInitStruct->HSI48State != RCC_HSI48_OFF)
916 .loc 1 626 7 is_stmt 1 view .LVU258
917 .loc 1 626 9 is_stmt 0 view .LVU259
918 033e 236A ldr r3, [r4, #32]
919 0340 002B cmp r3, #0
920 0342 7ED0 beq .L73
627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Enable the Internal High Speed oscillator (HSI48). */
ARM GAS /tmp/ccX98wNy.s page 30
629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSI48_ENABLE();
921 .loc 1 629 9 is_stmt 1 view .LVU260
922 0344 7A4A ldr r2, .L131
923 0346 516B ldr r1, [r2, #52]
924 0348 8023 movs r3, #128
925 034a 5B02 lsls r3, r3, #9
926 034c 0B43 orrs r3, r1
927 034e 5363 str r3, [r2, #52]
630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */
632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick();
928 .loc 1 632 9 view .LVU261
929 .loc 1 632 21 is_stmt 0 view .LVU262
930 0350 FFF7FEFF bl HAL_GetTick
931 .LVL56:
932 0354 0500 movs r5, r0
933 .LVL57:
633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till HSI48 is ready */
635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) == RESET)
934 .loc 1 635 9 is_stmt 1 view .LVU263
935 .L74:
936 .loc 1 635 15 is_stmt 0 view .LVU264
937 0356 764B ldr r3, .L131
938 0358 5B6B ldr r3, [r3, #52]
939 .loc 1 635 14 view .LVU265
940 035a DB03 lsls r3, r3, #15
941 035c 52D4 bmi .L70
636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart) > HSI48_TIMEOUT_VALUE)
942 .loc 1 637 11 is_stmt 1 view .LVU266
943 .loc 1 637 15 is_stmt 0 view .LVU267
944 035e FFF7FEFF bl HAL_GetTick
945 .LVL58:
946 .loc 1 637 29 view .LVU268
947 0362 401B subs r0, r0, r5
948 .loc 1 637 13 view .LVU269
949 0364 0228 cmp r0, #2
950 0366 F6D9 bls .L74
638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT;
951 .loc 1 639 20 view .LVU270
952 0368 0320 movs r0, #3
953 036a CFE0 b .L20
954 .LVL59:
955 .L121:
956 .LBB4:
542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
957 .loc 1 542 7 is_stmt 1 view .LVU271
958 036c 704A ldr r2, .L131
959 036e D369 ldr r3, [r2, #28]
960 0370 7049 ldr r1, .L131+4
961 0372 0B40 ands r3, r1
962 0374 D361 str r3, [r2, #28]
963 0376 BFE7 b .L48
964 .LVL60:
965 .L122:
ARM GAS /tmp/ccX98wNy.s page 31
542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
966 .loc 1 542 7 is_stmt 0 view .LVU272
967 .LBE4:
557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
968 .loc 1 557 7 is_stmt 1 view .LVU273
969 0378 6D4B ldr r3, .L131
970 037a 5A6B ldr r2, [r3, #52]
971 037c 0421 movs r1, #4
972 037e 0A43 orrs r2, r1
973 0380 5A63 str r2, [r3, #52]
560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
974 .loc 1 560 7 view .LVU274
975 0382 5A6B ldr r2, [r3, #52]
976 0384 0339 subs r1, r1, #3
977 0386 0A43 orrs r2, r1
978 0388 5A63 str r2, [r3, #52]
563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
979 .loc 1 563 7 view .LVU275
563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
980 .loc 1 563 19 is_stmt 0 view .LVU276
981 038a FFF7FEFF bl HAL_GetTick
982 .LVL61:
983 038e 0500 movs r5, r0
984 .LVL62:
566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
985 .loc 1 566 7 is_stmt 1 view .LVU277
986 .L65:
566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
987 .loc 1 566 13 is_stmt 0 view .LVU278
988 0390 674B ldr r3, .L131
989 0392 5B6B ldr r3, [r3, #52]
566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
990 .loc 1 566 12 view .LVU279
991 0394 9B07 lsls r3, r3, #30
992 0396 06D4 bmi .L124
568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
993 .loc 1 568 9 is_stmt 1 view .LVU280
568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
994 .loc 1 568 13 is_stmt 0 view .LVU281
995 0398 FFF7FEFF bl HAL_GetTick
996 .LVL63:
568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
997 .loc 1 568 27 view .LVU282
998 039c 401B subs r0, r0, r5
568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
999 .loc 1 568 11 view .LVU283
1000 039e 0228 cmp r0, #2
1001 03a0 F6D9 bls .L65
570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1002 .loc 1 570 18 view .LVU284
1003 03a2 0320 movs r0, #3
1004 03a4 B2E0 b .L20
1005 .L124:
575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1006 .loc 1 575 7 is_stmt 1 view .LVU285
1007 03a6 6249 ldr r1, .L131
1008 03a8 4B6B ldr r3, [r1, #52]
ARM GAS /tmp/ccX98wNy.s page 32
1009 03aa F822 movs r2, #248
1010 03ac 9343 bics r3, r2
1011 03ae A269 ldr r2, [r4, #24]
1012 03b0 D200 lsls r2, r2, #3
1013 03b2 1343 orrs r3, r2
1014 03b4 4B63 str r3, [r1, #52]
1015 03b6 B3E7 b .L63
1016 .LVL64:
1017 .L67:
588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1018 .loc 1 588 7 view .LVU286
1019 03b8 5D4B ldr r3, .L131
1020 03ba 5A6B ldr r2, [r3, #52]
1021 03bc 0421 movs r1, #4
1022 03be 0A43 orrs r2, r1
1023 03c0 5A63 str r2, [r3, #52]
591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1024 .loc 1 591 7 view .LVU287
1025 03c2 5A6B ldr r2, [r3, #52]
1026 03c4 0339 subs r1, r1, #3
1027 03c6 8A43 bics r2, r1
1028 03c8 5A63 str r2, [r3, #52]
594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1029 .loc 1 594 7 view .LVU288
594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1030 .loc 1 594 19 is_stmt 0 view .LVU289
1031 03ca FFF7FEFF bl HAL_GetTick
1032 .LVL65:
1033 03ce 0500 movs r5, r0
1034 .LVL66:
597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1035 .loc 1 597 7 is_stmt 1 view .LVU290
1036 .L68:
597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1037 .loc 1 597 13 is_stmt 0 view .LVU291
1038 03d0 574B ldr r3, .L131
1039 03d2 5B6B ldr r3, [r3, #52]
597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1040 .loc 1 597 12 view .LVU292
1041 03d4 9B07 lsls r3, r3, #30
1042 03d6 A3D5 bpl .L63
599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1043 .loc 1 599 9 is_stmt 1 view .LVU293
599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1044 .loc 1 599 13 is_stmt 0 view .LVU294
1045 03d8 FFF7FEFF bl HAL_GetTick
1046 .LVL67:
599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1047 .loc 1 599 27 view .LVU295
1048 03dc 401B subs r0, r0, r5
599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1049 .loc 1 599 11 view .LVU296
1050 03de 0228 cmp r0, #2
1051 03e0 F6D9 bls .L68
601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1052 .loc 1 601 18 view .LVU297
1053 03e2 0320 movs r0, #3
ARM GAS /tmp/ccX98wNy.s page 33
1054 03e4 92E0 b .L20
1055 .LVL68:
1056 .L123:
616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1057 .loc 1 616 79 view .LVU298
1058 03e6 524B ldr r3, .L131
1059 03e8 5B68 ldr r3, [r3, #4]
1060 03ea C022 movs r2, #192
1061 03ec 5202 lsls r2, r2, #9
1062 03ee 1340 ands r3, r2
616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1063 .loc 1 616 75 view .LVU299
1064 03f0 9342 cmp r3, r2
1065 03f2 A4D1 bne .L72
1066 .L71:
618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1067 .loc 1 618 7 is_stmt 1 view .LVU300
618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1068 .loc 1 618 11 is_stmt 0 view .LVU301
1069 03f4 4E4B ldr r3, .L131
1070 03f6 5B6B ldr r3, [r3, #52]
618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1071 .loc 1 618 9 view .LVU302
1072 03f8 DB03 lsls r3, r3, #15
1073 03fa 03D5 bpl .L70
618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1074 .loc 1 618 59 discriminator 1 view .LVU303
1075 03fc 236A ldr r3, [r4, #32]
1076 03fe 012B cmp r3, #1
1077 0400 00D0 beq .LCB1030
1078 0402 89E0 b .L101 @long jump
1079 .LCB1030:
1080 .L70:
640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else
644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Disable the Internal High Speed oscillator (HSI48). */
646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSI48_DISABLE();
647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */
649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick();
650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till HSI48 is ready */
652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) != RESET)
653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart) > HSI48_TIMEOUT_VALUE)
655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT;
657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #endif /* RCC_HSI48_SUPPORT */
663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
ARM GAS /tmp/ccX98wNy.s page 34
664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /*-------------------------------- PLL Configuration -----------------------*/
665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the parameters */
666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
1081 .loc 1 666 3 is_stmt 1 view .LVU304
667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
1082 .loc 1 667 3 view .LVU305
1083 .loc 1 667 30 is_stmt 0 view .LVU306
1084 0404 636A ldr r3, [r4, #36]
1085 .loc 1 667 6 view .LVU307
1086 0406 002B cmp r3, #0
1087 0408 00D1 bne .LCB1037
1088 040a 87E0 b .L104 @long jump
1089 .LCB1037:
668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check if the PLL is used as system clock or not */
670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
1090 .loc 1 670 5 is_stmt 1 view .LVU308
1091 .loc 1 670 8 is_stmt 0 view .LVU309
1092 040c 484A ldr r2, .L131
1093 040e 5168 ldr r1, [r2, #4]
1094 0410 0C22 movs r2, #12
1095 0412 0A40 ands r2, r1
1096 .loc 1 670 7 view .LVU310
1097 0414 082A cmp r2, #8
1098 0416 60D0 beq .L78
671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
1099 .loc 1 672 7 is_stmt 1 view .LVU311
1100 .loc 1 672 9 is_stmt 0 view .LVU312
1101 0418 022B cmp r3, #2
1102 041a 25D0 beq .L125
673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the parameters */
675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource));
676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL));
677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_PREDIV(RCC_OscInitStruct->PLL.PREDIV));
678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Disable the main PLL. */
680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_PLL_DISABLE();
681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */
683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick();
684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till PLL is disabled */
686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT;
691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Configure the main PLL clock source, predivider and multiplication factor. */
695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PREDIV,
697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLMUL);
698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Enable the main PLL. */
ARM GAS /tmp/ccX98wNy.s page 35
699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_PLL_ENABLE();
700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */
702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick();
703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till PLL is ready */
705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT;
710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else
714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Disable the main PLL. */
716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_PLL_DISABLE();
1103 .loc 1 716 9 is_stmt 1 view .LVU313
1104 041c 444A ldr r2, .L131
1105 041e 1368 ldr r3, [r2]
1106 0420 4549 ldr r1, .L131+8
1107 0422 0B40 ands r3, r1
1108 0424 1360 str r3, [r2]
717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */
719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick();
1109 .loc 1 719 9 view .LVU314
1110 .loc 1 719 21 is_stmt 0 view .LVU315
1111 0426 FFF7FEFF bl HAL_GetTick
1112 .LVL69:
1113 042a 0400 movs r4, r0
1114 .LVL70:
720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till PLL is disabled */
722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
1115 .loc 1 722 9 is_stmt 1 view .LVU316
1116 .L84:
1117 .loc 1 722 15 is_stmt 0 view .LVU317
1118 042c 404B ldr r3, .L131
1119 042e 1B68 ldr r3, [r3]
1120 .loc 1 722 14 view .LVU318
1121 0430 9B01 lsls r3, r3, #6
1122 0432 50D5 bpl .L126
723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
1123 .loc 1 724 11 is_stmt 1 view .LVU319
1124 .loc 1 724 15 is_stmt 0 view .LVU320
1125 0434 FFF7FEFF bl HAL_GetTick
1126 .LVL71:
1127 .loc 1 724 29 view .LVU321
1128 0438 001B subs r0, r0, r4
1129 .loc 1 724 13 view .LVU322
1130 043a 0228 cmp r0, #2
1131 043c F6D9 bls .L84
725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT;
ARM GAS /tmp/ccX98wNy.s page 36
1132 .loc 1 726 20 view .LVU323
1133 043e 0320 movs r0, #3
1134 0440 64E0 b .L20
1135 .LVL72:
1136 .L73:
646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1137 .loc 1 646 9 is_stmt 1 view .LVU324
1138 0442 3B4A ldr r2, .L131
1139 0444 536B ldr r3, [r2, #52]
1140 0446 3D49 ldr r1, .L131+12
1141 0448 0B40 ands r3, r1
1142 044a 5363 str r3, [r2, #52]
649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1143 .loc 1 649 9 view .LVU325
649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1144 .loc 1 649 21 is_stmt 0 view .LVU326
1145 044c FFF7FEFF bl HAL_GetTick
1146 .LVL73:
1147 0450 0500 movs r5, r0
1148 .LVL74:
652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1149 .loc 1 652 9 is_stmt 1 view .LVU327
1150 .L76:
652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1151 .loc 1 652 15 is_stmt 0 view .LVU328
1152 0452 374B ldr r3, .L131
1153 0454 5B6B ldr r3, [r3, #52]
652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1154 .loc 1 652 14 view .LVU329
1155 0456 DB03 lsls r3, r3, #15
1156 0458 D4D5 bpl .L70
654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1157 .loc 1 654 11 is_stmt 1 view .LVU330
654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1158 .loc 1 654 15 is_stmt 0 view .LVU331
1159 045a FFF7FEFF bl HAL_GetTick
1160 .LVL75:
654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1161 .loc 1 654 29 view .LVU332
1162 045e 401B subs r0, r0, r5
654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1163 .loc 1 654 13 view .LVU333
1164 0460 0228 cmp r0, #2
1165 0462 F6D9 bls .L76
656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1166 .loc 1 656 20 view .LVU334
1167 0464 0320 movs r0, #3
1168 0466 51E0 b .L20
1169 .LVL76:
1170 .L125:
675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL));
1171 .loc 1 675 9 is_stmt 1 view .LVU335
676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_PREDIV(RCC_OscInitStruct->PLL.PREDIV));
1172 .loc 1 676 9 view .LVU336
677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1173 .loc 1 677 9 view .LVU337
680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
ARM GAS /tmp/ccX98wNy.s page 37
1174 .loc 1 680 9 view .LVU338
1175 0468 314A ldr r2, .L131
1176 046a 1368 ldr r3, [r2]
1177 046c 3249 ldr r1, .L131+8
1178 046e 0B40 ands r3, r1
1179 0470 1360 str r3, [r2]
683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1180 .loc 1 683 9 view .LVU339
683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1181 .loc 1 683 21 is_stmt 0 view .LVU340
1182 0472 FFF7FEFF bl HAL_GetTick
1183 .LVL77:
1184 0476 0500 movs r5, r0
1185 .LVL78:
686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1186 .loc 1 686 9 is_stmt 1 view .LVU341
1187 .L80:
686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1188 .loc 1 686 15 is_stmt 0 view .LVU342
1189 0478 2D4B ldr r3, .L131
1190 047a 1B68 ldr r3, [r3]
686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1191 .loc 1 686 14 view .LVU343
1192 047c 9B01 lsls r3, r3, #6
1193 047e 06D5 bpl .L127
688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1194 .loc 1 688 11 is_stmt 1 view .LVU344
688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1195 .loc 1 688 15 is_stmt 0 view .LVU345
1196 0480 FFF7FEFF bl HAL_GetTick
1197 .LVL79:
688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1198 .loc 1 688 29 view .LVU346
1199 0484 401B subs r0, r0, r5
688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1200 .loc 1 688 13 view .LVU347
1201 0486 0228 cmp r0, #2
1202 0488 F6D9 bls .L80
690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1203 .loc 1 690 20 view .LVU348
1204 048a 0320 movs r0, #3
1205 048c 3EE0 b .L20
1206 .L127:
695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PREDIV,
1207 .loc 1 695 9 is_stmt 1 view .LVU349
695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PREDIV,
1208 .loc 1 695 9 view .LVU350
1209 048e 284B ldr r3, .L131
1210 0490 DA6A ldr r2, [r3, #44]
1211 0492 0F21 movs r1, #15
1212 0494 8A43 bics r2, r1
1213 0496 216B ldr r1, [r4, #48]
1214 0498 0A43 orrs r2, r1
1215 049a DA62 str r2, [r3, #44]
695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PREDIV,
1216 .loc 1 695 9 view .LVU351
1217 049c 5A68 ldr r2, [r3, #4]
ARM GAS /tmp/ccX98wNy.s page 38
1218 049e 2849 ldr r1, .L131+16
1219 04a0 0A40 ands r2, r1
1220 04a2 E16A ldr r1, [r4, #44]
1221 04a4 A06A ldr r0, [r4, #40]
1222 04a6 0143 orrs r1, r0
1223 04a8 0A43 orrs r2, r1
1224 04aa 5A60 str r2, [r3, #4]
699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1225 .loc 1 699 9 view .LVU352
1226 04ac 1968 ldr r1, [r3]
1227 04ae 8022 movs r2, #128
1228 04b0 5204 lsls r2, r2, #17
1229 04b2 0A43 orrs r2, r1
1230 04b4 1A60 str r2, [r3]
702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1231 .loc 1 702 9 view .LVU353
702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1232 .loc 1 702 21 is_stmt 0 view .LVU354
1233 04b6 FFF7FEFF bl HAL_GetTick
1234 .LVL80:
1235 04ba 0400 movs r4, r0
1236 .LVL81:
705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1237 .loc 1 705 9 is_stmt 1 view .LVU355
1238 .L82:
705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1239 .loc 1 705 15 is_stmt 0 view .LVU356
1240 04bc 1C4B ldr r3, .L131
1241 04be 1B68 ldr r3, [r3]
705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1242 .loc 1 705 14 view .LVU357
1243 04c0 9B01 lsls r3, r3, #6
1244 04c2 06D4 bmi .L128
707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1245 .loc 1 707 11 is_stmt 1 view .LVU358
707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1246 .loc 1 707 15 is_stmt 0 view .LVU359
1247 04c4 FFF7FEFF bl HAL_GetTick
1248 .LVL82:
707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1249 .loc 1 707 29 view .LVU360
1250 04c8 001B subs r0, r0, r4
707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1251 .loc 1 707 13 view .LVU361
1252 04ca 0228 cmp r0, #2
1253 04cc F6D9 bls .L82
709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1254 .loc 1 709 20 view .LVU362
1255 04ce 0320 movs r0, #3
1256 04d0 1CE0 b .L20
1257 .L128:
727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else
732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
ARM GAS /tmp/ccX98wNy.s page 39
733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check if there is a request to disable the PLL used as System clock source */
734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR;
737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else
739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Do not return HAL_ERROR if request repeats the current configuration */
741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** pll_config = RCC->CFGR;
742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** pll_config2 = RCC->CFGR2;
743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (READ_BIT(pll_config2, RCC_CFGR2_PREDIV) != RCC_OscInitStruct->PLL.PREDIV) ||
745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL))
746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR;
748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_OK;
1258 .loc 1 753 10 view .LVU363
1259 04d2 0020 movs r0, #0
1260 04d4 1AE0 b .L20
1261 .L126:
1262 .loc 1 753 10 view .LVU364
1263 04d6 0020 movs r0, #0
1264 04d8 18E0 b .L20
1265 .LVL83:
1266 .L78:
734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1267 .loc 1 734 7 is_stmt 1 view .LVU365
734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1268 .loc 1 734 9 is_stmt 0 view .LVU366
1269 04da 012B cmp r3, #1
1270 04dc 20D0 beq .L108
741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** pll_config2 = RCC->CFGR2;
1271 .loc 1 741 9 is_stmt 1 view .LVU367
741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** pll_config2 = RCC->CFGR2;
1272 .loc 1 741 21 is_stmt 0 view .LVU368
1273 04de 144B ldr r3, .L131
1274 04e0 5A68 ldr r2, [r3, #4]
1275 .LVL84:
742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
1276 .loc 1 742 9 is_stmt 1 view .LVU369
742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
1277 .loc 1 742 21 is_stmt 0 view .LVU370
1278 04e2 D96A ldr r1, [r3, #44]
1279 .LVL85:
743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (READ_BIT(pll_config2, RCC_CFGR2_PREDIV) != RCC_OscInitStruct->PLL.PREDIV) ||
1280 .loc 1 743 9 is_stmt 1 view .LVU371
743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (READ_BIT(pll_config2, RCC_CFGR2_PREDIV) != RCC_OscInitStruct->PLL.PREDIV) ||
1281 .loc 1 743 13 is_stmt 0 view .LVU372
1282 04e4 C023 movs r3, #192
1283 04e6 5B02 lsls r3, r3, #9
1284 04e8 1340 ands r3, r2
743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (READ_BIT(pll_config2, RCC_CFGR2_PREDIV) != RCC_OscInitStruct->PLL.PREDIV) ||
ARM GAS /tmp/ccX98wNy.s page 40
1285 .loc 1 743 11 view .LVU373
1286 04ea A06A ldr r0, [r4, #40]
1287 04ec 8342 cmp r3, r0
1288 04ee 19D1 bne .L109
744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL))
1289 .loc 1 744 13 discriminator 1 view .LVU374
1290 04f0 0F23 movs r3, #15
1291 04f2 0B40 ands r3, r1
743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (READ_BIT(pll_config2, RCC_CFGR2_PREDIV) != RCC_OscInitStruct->PLL.PREDIV) ||
1292 .loc 1 743 90 discriminator 1 view .LVU375
1293 04f4 216B ldr r1, [r4, #48]
1294 .LVL86:
743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (READ_BIT(pll_config2, RCC_CFGR2_PREDIV) != RCC_OscInitStruct->PLL.PREDIV) ||
1295 .loc 1 743 90 discriminator 1 view .LVU376
1296 04f6 8B42 cmp r3, r1
1297 04f8 16D1 bne .L110
745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1298 .loc 1 745 13 view .LVU377
1299 04fa F023 movs r3, #240
1300 04fc 9B03 lsls r3, r3, #14
1301 04fe 1A40 ands r2, r3
1302 .LVL87:
745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1303 .loc 1 745 78 view .LVU378
1304 0500 E36A ldr r3, [r4, #44]
744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL))
1305 .loc 1 744 90 view .LVU379
1306 0502 9A42 cmp r2, r3
1307 0504 12D1 bne .L111
1308 .loc 1 753 10 view .LVU380
1309 0506 0020 movs r0, #0
1310 0508 00E0 b .L20
1311 .LVL88:
1312 .L86:
309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1313 .loc 1 309 12 view .LVU381
1314 050a 0120 movs r0, #1
1315 .LVL89:
1316 .L20:
754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1317 .loc 1 754 1 view .LVU382
1318 050c 02B0 add sp, sp, #8
1319 @ sp needed
1320 050e 70BD pop {r4, r5, r6, pc}
1321 .LVL90:
1322 .L114:
327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1323 .loc 1 327 16 view .LVU383
1324 0510 0120 movs r0, #1
1325 .LVL91:
327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1326 .loc 1 327 16 view .LVU384
1327 0512 FBE7 b .L20
1328 .L90:
381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1329 .loc 1 381 16 view .LVU385
1330 0514 0120 movs r0, #1
ARM GAS /tmp/ccX98wNy.s page 41
1331 0516 F9E7 b .L20
1332 .L101:
620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1333 .loc 1 620 16 view .LVU386
1334 0518 0120 movs r0, #1
1335 051a F7E7 b .L20
1336 .L104:
753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1337 .loc 1 753 10 view .LVU387
1338 051c 0020 movs r0, #0
1339 051e F5E7 b .L20
1340 .L108:
736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1341 .loc 1 736 16 view .LVU388
1342 0520 0120 movs r0, #1
1343 0522 F3E7 b .L20
1344 .LVL92:
1345 .L109:
747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1346 .loc 1 747 18 view .LVU389
1347 0524 0120 movs r0, #1
1348 0526 F1E7 b .L20
1349 .LVL93:
1350 .L110:
747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1351 .loc 1 747 18 view .LVU390
1352 0528 0120 movs r0, #1
1353 052a EFE7 b .L20
1354 .LVL94:
1355 .L111:
747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1356 .loc 1 747 18 view .LVU391
1357 052c 0120 movs r0, #1
1358 052e EDE7 b .L20
1359 .L132:
1360 .align 2
1361 .L131:
1362 0530 00100240 .word 1073876992
1363 0534 FFFFFFEF .word -268435457
1364 0538 FFFFFFFE .word -16777217
1365 053c FFFFFEFF .word -65537
1366 0540 FF7FC2FF .word -4030465
1367 .cfi_endproc
1368 .LFE41:
1370 .section .text.HAL_RCC_MCOConfig,"ax",%progbits
1371 .align 1
1372 .global HAL_RCC_MCOConfig
1373 .syntax unified
1374 .code 16
1375 .thumb_func
1376 .fpu softvfp
1378 HAL_RCC_MCOConfig:
1379 .LVL95:
1380 .LFB43:
755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /**
757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief Initializes the CPU, AHB and APB buses clocks according to the specified
ARM GAS /tmp/ccX98wNy.s page 42
758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * parameters in the RCC_ClkInitStruct.
759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @param RCC_ClkInitStruct pointer to an RCC_OscInitTypeDef structure that
760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * contains the configuration information for the RCC peripheral.
761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @param FLatency FLASH Latency
762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * The value of this parameter depend on device used within the same series
763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency
764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * and updated by @ref HAL_RCC_GetHCLKFreq() function called within this function
765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** *
766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note The HSI is used (enabled by hardware) as system clock source after
767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * start-up from Reset, wake-up from STOP and STANDBY mode, or in case
768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * of failure of the HSE used directly or indirectly as system clock
769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * (if the Clock Security System CSS is enabled).
770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** *
771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note A switch from one clock source to another occurs only if the target
772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * clock source is ready (clock stable after start-up delay or PLL locked).
773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * If a clock source which is not yet ready is selected, the switch will
774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * occur when the clock source will be ready.
775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * You can use @ref HAL_RCC_GetClockConfig() function to know which clock is
776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * currently used as system clock source.
777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval HAL status
778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */
779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** uint32_t tickstart;
782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check Null pointer */
784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(RCC_ClkInitStruct == NULL)
785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR;
787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the parameters */
790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_CLOCKTYPE(RCC_ClkInitStruct->ClockType));
791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_FLASH_LATENCY(FLatency));
792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* To correctly read data from FLASH memory, the number of wait states (LATENCY)
794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** must be correctly programmed according to the frequency of the CPU clock
795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (HCLK) of the device. */
796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Increasing the number of wait states because of higher CPU frequency */
798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(FLatency > __HAL_FLASH_GET_LATENCY())
799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_FLASH_SET_LATENCY(FLatency);
802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check that the new number of wait states is taken into account to access the Flash
804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** memory by reading the FLASH_ACR register */
805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(__HAL_FLASH_GET_LATENCY() != FLatency)
806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR;
808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /*-------------------------- HCLK Configuration --------------------------*/
812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Set the highest APB divider in order to ensure that we do not go through
ARM GAS /tmp/ccX98wNy.s page 43
815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** a non-spec phase whatever we decrease or increase HCLK. */
816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_HCLK_DIV16);
819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Set the new HCLK clock divider */
822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /*------------------------- SYSCLK Configuration ---------------------------*/
827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* HSE is selected as System Clock Source */
832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the HSE ready flag */
835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR;
838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* PLL is selected as System Clock Source */
841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the PLL ready flag */
844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR;
847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #if defined(RCC_CFGR_SWS_HSI48)
850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* HSI48 is selected as System Clock Source */
851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSI48)
852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the HSI48 ready flag */
854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) == RESET)
855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR;
857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #endif /* RCC_CFGR_SWS_HSI48 */
860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* HSI is selected as System Clock Source */
861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else
862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the HSI ready flag */
864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR;
867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */
ARM GAS /tmp/ccX98wNy.s page 44
872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick();
873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT;
879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Decreasing the number of wait states because of lower CPU frequency */
884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(FLatency < __HAL_FLASH_GET_LATENCY())
885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_FLASH_SET_LATENCY(FLatency);
888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check that the new number of wait states is taken into account to access the Flash
890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** memory by reading the FLASH_ACR register */
891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(__HAL_FLASH_GET_LATENCY() != FLatency)
892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR;
894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /*-------------------------- PCLK1 Configuration ---------------------------*/
898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_ClkInitStruct->APB1CLKDivider);
902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Update the SystemCoreClock global variable */
905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CF
906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Configure the source of time base considering new system clocks settings*/
908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** HAL_InitTick (TICK_INT_PRIORITY);
909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_OK;
911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /**
914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @}
915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */
916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** @defgroup RCC_Exported_Functions_Group2 Peripheral Control functions
918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief RCC clocks control functions
919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** *
920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @verbatim
921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** ===============================================================================
922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** ##### Peripheral Control functions #####
923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** ===============================================================================
924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** [..]
925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** This subsection provides a set of functions allowing to control the RCC Clocks
926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** frequencies.
927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @endverbatim
ARM GAS /tmp/ccX98wNy.s page 45
929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @{
930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */
931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #if defined(RCC_CFGR_MCOPRE)
933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /**
934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief Selects the clock source to output on MCO pin.
935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note MCO pin should be configured in alternate function mode.
936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @param RCC_MCOx specifies the output direction for the clock source.
937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * This parameter can be one of the following values:
938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1 Clock source to output on MCO1 pin(PA8).
939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @param RCC_MCOSource specifies the clock source to output.
940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * This parameter can be one of the following values:
941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_NOCLOCK No clock selected
942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_SYSCLK System Clock selected as MCO clock
943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI HSI selected as MCO clock
944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSE HSE selected as MCO clock
945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_LSI LSI selected as MCO clock
946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_LSE LSE selected as MCO clock
947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI14 HSI14 selected as MCO clock
948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @if STM32F042x6
949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI48 HSI48 selected as MCO clock
950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock
951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @elseif STM32F048xx
952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI48 HSI48 selected as MCO clock
953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock
954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @elseif STM32F071xB
955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI48 HSI48 selected as MCO clock
956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock
957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @elseif STM32F072xB
958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI48 HSI48 selected as MCO clock
959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock
960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @elseif STM32F078xx
961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI48 HSI48 selected as MCO clock
962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock
963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @elseif STM32F091xC
964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI48 HSI48 selected as MCO clock
965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock
966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @elseif STM32F098xx
967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI48 HSI48 selected as MCO clock
968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock
969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @elif STM32F030x6
970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock
971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @elif STM32F030xC
972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock
973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @elif STM32F031x6
974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock
975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @elif STM32F038xx
976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock
977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @elif STM32F070x6
978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock
979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @elif STM32F070xB
980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock
981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @endif
982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK_DIV2 PLLCLK Divided by 2 selected as MCO clock
983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @param RCC_MCODiv specifies the MCO DIV.
984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * This parameter can be one of the following values:
985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_1 no division applied to MCO clock
ARM GAS /tmp/ccX98wNy.s page 46
986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_2 division by 2 applied to MCO clock
987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_4 division by 4 applied to MCO clock
988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_8 division by 8 applied to MCO clock
989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_16 division by 16 applied to MCO clock
990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_32 division by 32 applied to MCO clock
991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_64 division by 64 applied to MCO clock
992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_128 division by 128 applied to MCO clock
993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval None
994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */
995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #else
996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /**
997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief Selects the clock source to output on MCO pin.
998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note MCO pin should be configured in alternate function mode.
999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @param RCC_MCOx specifies the output direction for the clock source.
1000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * This parameter can be one of the following values:
1001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1 Clock source to output on MCO1 pin(PA8).
1002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @param RCC_MCOSource specifies the clock source to output.
1003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * This parameter can be one of the following values:
1004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_NOCLOCK No clock selected as MCO clock
1005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_SYSCLK System clock selected as MCO clock
1006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI HSI selected as MCO clock
1007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSE HSE selected as MCO clock
1008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_LSI LSI selected as MCO clock
1009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_LSE LSE selected as MCO clock
1010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI14 HSI14 selected as MCO clock
1011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK_DIV2 PLLCLK Divided by 2 selected as MCO clock
1012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @param RCC_MCODiv specifies the MCO DIV.
1013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * This parameter can be one of the following values:
1014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_1 no division applied to MCO clock
1015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval None
1016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */
1017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #endif
1018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** void HAL_RCC_MCOConfig(uint32_t RCC_MCOx, uint32_t RCC_MCOSource, uint32_t RCC_MCODiv)
1019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1381 .loc 1 1019 1 is_stmt 1 view -0
1382 .cfi_startproc
1383 @ args = 0, pretend = 0, frame = 24
1384 @ frame_needed = 0, uses_anonymous_args = 0
1385 .loc 1 1019 1 is_stmt 0 view .LVU393
1386 0000 70B5 push {r4, r5, r6, lr}
1387 .LCFI3:
1388 .cfi_def_cfa_offset 16
1389 .cfi_offset 4, -16
1390 .cfi_offset 5, -12
1391 .cfi_offset 6, -8
1392 .cfi_offset 14, -4
1393 0002 86B0 sub sp, sp, #24
1394 .LCFI4:
1395 .cfi_def_cfa_offset 40
1396 0004 0D00 movs r5, r1
1397 0006 1600 movs r6, r2
1020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** GPIO_InitTypeDef gpio;
1398 .loc 1 1020 3 is_stmt 1 view .LVU394
1021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the parameters */
1023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_MCO(RCC_MCOx));
1399 .loc 1 1023 3 view .LVU395
ARM GAS /tmp/ccX98wNy.s page 47
1024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_MCODIV(RCC_MCODiv));
1400 .loc 1 1024 3 view .LVU396
1025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_MCO1SOURCE(RCC_MCOSource));
1401 .loc 1 1025 3 view .LVU397
1026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Configure the MCO1 pin in alternate function mode */
1028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** gpio.Mode = GPIO_MODE_AF_PP;
1402 .loc 1 1028 3 view .LVU398
1403 .loc 1 1028 18 is_stmt 0 view .LVU399
1404 0008 0223 movs r3, #2
1405 000a 0293 str r3, [sp, #8]
1029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** gpio.Speed = GPIO_SPEED_FREQ_HIGH;
1406 .loc 1 1029 3 is_stmt 1 view .LVU400
1407 .loc 1 1029 18 is_stmt 0 view .LVU401
1408 000c 0133 adds r3, r3, #1
1409 000e 0493 str r3, [sp, #16]
1030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** gpio.Pull = GPIO_NOPULL;
1410 .loc 1 1030 3 is_stmt 1 view .LVU402
1411 .loc 1 1030 18 is_stmt 0 view .LVU403
1412 0010 0023 movs r3, #0
1413 0012 0393 str r3, [sp, #12]
1031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** gpio.Pin = MCO1_PIN;
1414 .loc 1 1031 3 is_stmt 1 view .LVU404
1415 .loc 1 1031 18 is_stmt 0 view .LVU405
1416 0014 8022 movs r2, #128
1417 .LVL96:
1418 .loc 1 1031 18 view .LVU406
1419 0016 5200 lsls r2, r2, #1
1420 0018 0192 str r2, [sp, #4]
1032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** gpio.Alternate = GPIO_AF0_MCO;
1421 .loc 1 1032 3 is_stmt 1 view .LVU407
1422 .loc 1 1032 18 is_stmt 0 view .LVU408
1423 001a 0593 str r3, [sp, #20]
1033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* MCO1 Clock Enable */
1035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** MCO1_CLK_ENABLE();
1424 .loc 1 1035 3 is_stmt 1 view .LVU409
1425 .LBB5:
1426 .loc 1 1035 3 view .LVU410
1427 .loc 1 1035 3 view .LVU411
1428 001c 0B4C ldr r4, .L134
1429 001e 6269 ldr r2, [r4, #20]
1430 0020 8021 movs r1, #128
1431 .LVL97:
1432 .loc 1 1035 3 is_stmt 0 view .LVU412
1433 0022 8902 lsls r1, r1, #10
1434 0024 0A43 orrs r2, r1
1435 0026 6261 str r2, [r4, #20]
1436 .loc 1 1035 3 is_stmt 1 view .LVU413
1437 0028 6369 ldr r3, [r4, #20]
1438 002a 0B40 ands r3, r1
1439 002c 0093 str r3, [sp]
1440 .loc 1 1035 3 view .LVU414
1441 002e 009B ldr r3, [sp]
1442 .LBE5:
1036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** HAL_GPIO_Init(MCO1_GPIO_PORT, &gpio);
ARM GAS /tmp/ccX98wNy.s page 48
1443 .loc 1 1037 3 view .LVU415
1444 0030 9020 movs r0, #144
1445 .LVL98:
1446 .loc 1 1037 3 is_stmt 0 view .LVU416
1447 0032 01A9 add r1, sp, #4
1448 0034 C005 lsls r0, r0, #23
1449 0036 FFF7FEFF bl HAL_GPIO_Init
1450 .LVL99:
1038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Configure the MCO clock source */
1040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_MCO1_CONFIG(RCC_MCOSource, RCC_MCODiv);
1451 .loc 1 1040 3 is_stmt 1 view .LVU417
1452 003a 6268 ldr r2, [r4, #4]
1453 003c 044B ldr r3, .L134+4
1454 003e 1A40 ands r2, r3
1455 0040 3543 orrs r5, r6
1456 .LVL100:
1457 .loc 1 1040 3 is_stmt 0 view .LVU418
1458 0042 2A43 orrs r2, r5
1459 0044 6260 str r2, [r4, #4]
1041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1460 .loc 1 1041 1 view .LVU419
1461 0046 06B0 add sp, sp, #24
1462 @ sp needed
1463 .LVL101:
1464 .loc 1 1041 1 view .LVU420
1465 0048 70BD pop {r4, r5, r6, pc}
1466 .L135:
1467 004a C046 .align 2
1468 .L134:
1469 004c 00100240 .word 1073876992
1470 0050 FFFFFF80 .word -2130706433
1471 .cfi_endproc
1472 .LFE43:
1474 .section .text.HAL_RCC_EnableCSS,"ax",%progbits
1475 .align 1
1476 .global HAL_RCC_EnableCSS
1477 .syntax unified
1478 .code 16
1479 .thumb_func
1480 .fpu softvfp
1482 HAL_RCC_EnableCSS:
1483 .LFB44:
1042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /**
1044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief Enables the Clock Security System.
1045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note If a failure is detected on the HSE oscillator clock, this oscillator
1046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * is automatically disabled and an interrupt is generated to inform the
1047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * software about the failure (Clock Security System Interrupt, CSSI),
1048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * allowing the MCU to perform rescue operations. The CSSI is linked to
1049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * the Cortex-M0 NMI (Non-Maskable Interrupt) exception vector.
1050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval None
1051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */
1052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** void HAL_RCC_EnableCSS(void)
1053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1484 .loc 1 1053 1 is_stmt 1 view -0
1485 .cfi_startproc
ARM GAS /tmp/ccX98wNy.s page 49
1486 @ args = 0, pretend = 0, frame = 0
1487 @ frame_needed = 0, uses_anonymous_args = 0
1488 @ link register save eliminated.
1054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** SET_BIT(RCC->CR, RCC_CR_CSSON) ;
1489 .loc 1 1054 3 view .LVU422
1490 0000 034A ldr r2, .L137
1491 0002 1168 ldr r1, [r2]
1492 0004 8023 movs r3, #128
1493 0006 1B03 lsls r3, r3, #12
1494 0008 0B43 orrs r3, r1
1495 000a 1360 str r3, [r2]
1055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1496 .loc 1 1055 1 is_stmt 0 view .LVU423
1497 @ sp needed
1498 000c 7047 bx lr
1499 .L138:
1500 000e C046 .align 2
1501 .L137:
1502 0010 00100240 .word 1073876992
1503 .cfi_endproc
1504 .LFE44:
1506 .section .text.HAL_RCC_DisableCSS,"ax",%progbits
1507 .align 1
1508 .global HAL_RCC_DisableCSS
1509 .syntax unified
1510 .code 16
1511 .thumb_func
1512 .fpu softvfp
1514 HAL_RCC_DisableCSS:
1515 .LFB45:
1056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /**
1058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief Disables the Clock Security System.
1059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval None
1060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */
1061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** void HAL_RCC_DisableCSS(void)
1062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1516 .loc 1 1062 1 is_stmt 1 view -0
1517 .cfi_startproc
1518 @ args = 0, pretend = 0, frame = 0
1519 @ frame_needed = 0, uses_anonymous_args = 0
1520 @ link register save eliminated.
1063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** CLEAR_BIT(RCC->CR, RCC_CR_CSSON) ;
1521 .loc 1 1063 3 view .LVU425
1522 0000 024A ldr r2, .L140
1523 0002 1368 ldr r3, [r2]
1524 0004 0249 ldr r1, .L140+4
1525 0006 0B40 ands r3, r1
1526 0008 1360 str r3, [r2]
1064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1527 .loc 1 1064 1 is_stmt 0 view .LVU426
1528 @ sp needed
1529 000a 7047 bx lr
1530 .L141:
1531 .align 2
1532 .L140:
1533 000c 00100240 .word 1073876992
ARM GAS /tmp/ccX98wNy.s page 50
1534 0010 FFFFF7FF .word -524289
1535 .cfi_endproc
1536 .LFE45:
1538 .global __aeabi_uidiv
1539 .section .text.HAL_RCC_GetSysClockFreq,"ax",%progbits
1540 .align 1
1541 .global HAL_RCC_GetSysClockFreq
1542 .syntax unified
1543 .code 16
1544 .thumb_func
1545 .fpu softvfp
1547 HAL_RCC_GetSysClockFreq:
1548 .LFB46:
1065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /**
1067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief Returns the SYSCLK frequency
1068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note The system frequency computed by this function is not the real
1069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * frequency in the chip. It is calculated based on the predefined
1070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * constant and the selected clock source:
1071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note If SYSCLK source is HSI, function returns values based on HSI_VALUE(*)
1072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note If SYSCLK source is HSE, function returns a value based on HSE_VALUE
1073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * divided by PREDIV factor(**)
1074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note If SYSCLK source is PLL, function returns a value based on HSE_VALUE
1075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * divided by PREDIV factor(**) or depending on STM32F0xxxx devices either a value based
1076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * on HSI_VALUE divided by 2 or HSI_VALUE divided by PREDIV factor(*) multiplied by the
1077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * PLL factor.
1078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note (*) HSI_VALUE is a constant defined in stm32f0xx_hal_conf.h file (default value
1079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * 8 MHz) but the real value may vary depending on the variations
1080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * in voltage and temperature.
1081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note (**) HSE_VALUE is a constant defined in stm32f0xx_hal_conf.h file (default value
1082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * 8 MHz), user has to ensure that HSE_VALUE is same as the real
1083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * frequency of the crystal used. Otherwise, this function may
1084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * have wrong result.
1085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** *
1086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note The result of this function could be not correct when using fractional
1087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * value for HSE crystal.
1088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** *
1089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note This function can be used by the user application to compute the
1090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * baud-rate for the communication peripherals or configure other parameters.
1091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** *
1092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note Each time SYSCLK changes, this function must be called to update the
1093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * right SYSCLK value. Otherwise, any configuration based on this function will be incorre
1094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** *
1095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval SYSCLK frequency
1096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */
1097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** uint32_t HAL_RCC_GetSysClockFreq(void)
1098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1549 .loc 1 1098 1 is_stmt 1 view -0
1550 .cfi_startproc
1551 @ args = 0, pretend = 0, frame = 32
1552 @ frame_needed = 0, uses_anonymous_args = 0
1553 0000 30B5 push {r4, r5, lr}
1554 .LCFI5:
1555 .cfi_def_cfa_offset 12
1556 .cfi_offset 4, -12
1557 .cfi_offset 5, -8
1558 .cfi_offset 14, -4
ARM GAS /tmp/ccX98wNy.s page 51
1559 0002 89B0 sub sp, sp, #36
1560 .LCFI6:
1561 .cfi_def_cfa_offset 48
1099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** const uint8_t aPLLMULFactorTable[16] = { 2U, 3U, 4U, 5U, 6U, 7U, 8U, 9U,
1562 .loc 1 1099 3 view .LVU428
1563 .loc 1 1099 17 is_stmt 0 view .LVU429
1564 0004 04AA add r2, sp, #16
1565 0006 1F4B ldr r3, .L150
1566 0008 1800 movs r0, r3
1567 000a 32C8 ldmia r0!, {r1, r4, r5}
1568 000c 32C2 stmia r2!, {r1, r4, r5}
1569 000e 1100 movs r1, r2
1570 0010 0268 ldr r2, [r0]
1571 0012 0A60 str r2, [r1]
1100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 10U, 11U, 12U, 13U, 14U, 15U, 16U, 16U};
1101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** const uint8_t aPredivFactorTable[16] = { 1U, 2U, 3U, 4U, 5U, 6U, 7U, 8U,
1572 .loc 1 1101 3 is_stmt 1 view .LVU430
1573 .loc 1 1101 17 is_stmt 0 view .LVU431
1574 0014 6A46 mov r2, sp
1575 0016 1033 adds r3, r3, #16
1576 0018 13CB ldmia r3!, {r0, r1, r4}
1577 001a 13C2 stmia r2!, {r0, r1, r4}
1578 001c 1B68 ldr r3, [r3]
1579 001e 1360 str r3, [r2]
1102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 9U,10U, 11U, 12U, 13U, 14U, 15U, 16U};
1103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U;
1580 .loc 1 1104 3 is_stmt 1 view .LVU432
1581 .LVL102:
1105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** uint32_t sysclockfreq = 0U;
1582 .loc 1 1105 3 view .LVU433
1106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tmpreg = RCC->CFGR;
1583 .loc 1 1107 3 view .LVU434
1584 .loc 1 1107 10 is_stmt 0 view .LVU435
1585 0020 194B ldr r3, .L150+4
1586 0022 5A68 ldr r2, [r3, #4]
1587 .LVL103:
1108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get SYSCLK source -------------------------------------------------------*/
1110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** switch (tmpreg & RCC_CFGR_SWS)
1588 .loc 1 1110 3 is_stmt 1 view .LVU436
1589 .loc 1 1110 18 is_stmt 0 view .LVU437
1590 0024 0C23 movs r3, #12
1591 0026 1340 ands r3, r2
1592 .loc 1 1110 3 view .LVU438
1593 0028 082B cmp r3, #8
1594 002a 04D0 beq .L143
1595 002c 0C2B cmp r3, #12
1596 002e 26D0 beq .L147
1111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */
1113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** sysclockfreq = HSE_VALUE;
1597 .loc 1 1114 20 view .LVU439
1598 0030 1648 ldr r0, .L150+8
1599 .LVL104:
ARM GAS /tmp/ccX98wNy.s page 52
1600 .L142:
1115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** break;
1116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */
1118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMUL) >> RCC_CFGR_PLLMUL_BITNUMBER
1120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV) >> RCC_CFGR2_PREDIV_BIT
1121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if ((tmpreg & RCC_CFGR_PLLSRC) == RCC_PLLSOURCE_HSE)
1122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV * PLLMUL */
1124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** pllclk = (uint32_t)((uint64_t) HSE_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul);
1125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI48_PREDIV)
1127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else if ((tmpreg & RCC_CFGR_PLLSRC) == RCC_PLLSOURCE_HSI48)
1128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* HSI48 used as PLL clock source : PLLCLK = HSI48/PREDIV * PLLMUL */
1130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** pllclk = (uint32_t)((uint64_t) HSI48_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul);
1131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #endif /* RCC_CFGR_PLLSRC_HSI48_PREDIV */
1133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else
1134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #if (defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F070x6) || defined(STM32F071xB)
1136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* HSI used as PLL clock source : PLLCLK = HSI/PREDIV * PLLMUL */
1137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** pllclk = (uint32_t)((uint64_t) HSI_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul);
1138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #else
1139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */
1140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** pllclk = (uint32_t)((uint64_t) (HSI_VALUE >> 1U) * ((uint64_t) pllmul));
1141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #endif
1142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** sysclockfreq = pllclk;
1144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** break;
1145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #if defined(RCC_CFGR_SWS_HSI48)
1147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** case RCC_SYSCLKSOURCE_STATUS_HSI48: /* HSI48 used as system clock source */
1148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** sysclockfreq = HSI48_VALUE;
1150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** break;
1151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #endif /* RCC_CFGR_SWS_HSI48 */
1153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */
1154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** default: /* HSI used as system clock */
1155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** sysclockfreq = HSI_VALUE;
1157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** break;
1158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return sysclockfreq;
1161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1601 .loc 1 1161 1 view .LVU440
1602 0032 09B0 add sp, sp, #36
1603 @ sp needed
1604 0034 30BD pop {r4, r5, pc}
1605 .LVL105:
1606 .L143:
1119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV) >> RCC_CFGR2_PREDIV_BIT
1607 .loc 1 1119 7 is_stmt 1 view .LVU441
1119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV) >> RCC_CFGR2_PREDIV_BIT
ARM GAS /tmp/ccX98wNy.s page 53
1608 .loc 1 1119 72 is_stmt 0 view .LVU442
1609 0036 910C lsrs r1, r2, #18
1610 0038 0F23 movs r3, #15
1611 003a 1940 ands r1, r3
1119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV) >> RCC_CFGR2_PREDIV_BIT
1612 .loc 1 1119 34 view .LVU443
1613 003c 04A8 add r0, sp, #16
1614 003e 445C ldrb r4, [r0, r1]
1615 .LVL106:
1120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if ((tmpreg & RCC_CFGR_PLLSRC) == RCC_PLLSOURCE_HSE)
1616 .loc 1 1120 7 is_stmt 1 view .LVU444
1120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if ((tmpreg & RCC_CFGR_PLLSRC) == RCC_PLLSOURCE_HSE)
1617 .loc 1 1120 49 is_stmt 0 view .LVU445
1618 0040 1149 ldr r1, .L150+4
1619 0042 C96A ldr r1, [r1, #44]
1120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if ((tmpreg & RCC_CFGR_PLLSRC) == RCC_PLLSOURCE_HSE)
1620 .loc 1 1120 77 view .LVU446
1621 0044 0B40 ands r3, r1
1120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if ((tmpreg & RCC_CFGR_PLLSRC) == RCC_PLLSOURCE_HSE)
1622 .loc 1 1120 34 view .LVU447
1623 0046 6946 mov r1, sp
1624 0048 C95C ldrb r1, [r1, r3]
1625 .LVL107:
1121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1626 .loc 1 1121 7 is_stmt 1 view .LVU448
1121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1627 .loc 1 1121 19 is_stmt 0 view .LVU449
1628 004a C023 movs r3, #192
1629 004c 5B02 lsls r3, r3, #9
1630 004e 1A40 ands r2, r3
1631 .LVL108:
1121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1632 .loc 1 1121 10 view .LVU450
1633 0050 8023 movs r3, #128
1634 0052 5B02 lsls r3, r3, #9
1635 0054 9A42 cmp r2, r3
1636 0056 08D0 beq .L148
1127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1637 .loc 1 1127 12 is_stmt 1 view .LVU451
1127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1638 .loc 1 1127 15 is_stmt 0 view .LVU452
1639 0058 C023 movs r3, #192
1640 005a 5B02 lsls r3, r3, #9
1641 005c 9A42 cmp r2, r3
1642 005e 09D0 beq .L149
1137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #else
1643 .loc 1 1137 9 is_stmt 1 view .LVU453
1137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #else
1644 .loc 1 1137 18 is_stmt 0 view .LVU454
1645 0060 0A48 ldr r0, .L150+8
1646 0062 FFF7FEFF bl __aeabi_uidiv
1647 .LVL109:
1137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #else
1648 .loc 1 1137 16 view .LVU455
1649 0066 6043 muls r0, r4
1650 .LVL110:
1137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #else
ARM GAS /tmp/ccX98wNy.s page 54
1651 .loc 1 1137 16 view .LVU456
1652 0068 E3E7 b .L142
1653 .LVL111:
1654 .L148:
1124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1655 .loc 1 1124 9 is_stmt 1 view .LVU457
1124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1656 .loc 1 1124 18 is_stmt 0 view .LVU458
1657 006a 0848 ldr r0, .L150+8
1658 006c FFF7FEFF bl __aeabi_uidiv
1659 .LVL112:
1124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1660 .loc 1 1124 16 view .LVU459
1661 0070 6043 muls r0, r4
1662 .LVL113:
1124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1663 .loc 1 1124 16 view .LVU460
1664 0072 DEE7 b .L142
1665 .LVL114:
1666 .L149:
1130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1667 .loc 1 1130 9 is_stmt 1 view .LVU461
1130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1668 .loc 1 1130 18 is_stmt 0 view .LVU462
1669 0074 0648 ldr r0, .L150+12
1670 0076 FFF7FEFF bl __aeabi_uidiv
1671 .LVL115:
1130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1672 .loc 1 1130 16 view .LVU463
1673 007a 6043 muls r0, r4
1674 .LVL116:
1130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1675 .loc 1 1130 16 view .LVU464
1676 007c D9E7 b .L142
1677 .LVL117:
1678 .L147:
1149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** break;
1679 .loc 1 1149 20 view .LVU465
1680 007e 0448 ldr r0, .L150+12
1681 .LVL118:
1160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1682 .loc 1 1160 3 is_stmt 1 view .LVU466
1160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1683 .loc 1 1160 10 is_stmt 0 view .LVU467
1684 0080 D7E7 b .L142
1685 .L151:
1686 0082 C046 .align 2
1687 .L150:
1688 0084 00000000 .word .LANCHOR0
1689 0088 00100240 .word 1073876992
1690 008c 00127A00 .word 8000000
1691 0090 006CDC02 .word 48000000
1692 .cfi_endproc
1693 .LFE46:
1695 .section .text.HAL_RCC_ClockConfig,"ax",%progbits
1696 .align 1
1697 .global HAL_RCC_ClockConfig
ARM GAS /tmp/ccX98wNy.s page 55
1698 .syntax unified
1699 .code 16
1700 .thumb_func
1701 .fpu softvfp
1703 HAL_RCC_ClockConfig:
1704 .LVL119:
1705 .LFB42:
780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** uint32_t tickstart;
1706 .loc 1 780 1 is_stmt 1 view -0
1707 .cfi_startproc
1708 @ args = 0, pretend = 0, frame = 0
1709 @ frame_needed = 0, uses_anonymous_args = 0
780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** uint32_t tickstart;
1710 .loc 1 780 1 is_stmt 0 view .LVU469
1711 0000 70B5 push {r4, r5, r6, lr}
1712 .LCFI7:
1713 .cfi_def_cfa_offset 16
1714 .cfi_offset 4, -16
1715 .cfi_offset 5, -12
1716 .cfi_offset 6, -8
1717 .cfi_offset 14, -4
1718 0002 0400 movs r4, r0
1719 0004 0D00 movs r5, r1
781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1720 .loc 1 781 3 is_stmt 1 view .LVU470
784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1721 .loc 1 784 3 view .LVU471
784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1722 .loc 1 784 5 is_stmt 0 view .LVU472
1723 0006 0028 cmp r0, #0
1724 0008 00D1 bne .LCB1637
1725 000a 86E0 b .L166 @long jump
1726 .LCB1637:
790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_FLASH_LATENCY(FLatency));
1727 .loc 1 790 3 is_stmt 1 view .LVU473
791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1728 .loc 1 791 3 view .LVU474
798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1729 .loc 1 798 3 view .LVU475
798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1730 .loc 1 798 17 is_stmt 0 view .LVU476
1731 000c 474B ldr r3, .L178
1732 000e 1A68 ldr r2, [r3]
1733 0010 0123 movs r3, #1
1734 0012 1340 ands r3, r2
798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1735 .loc 1 798 5 view .LVU477
1736 0014 8B42 cmp r3, r1
1737 0016 0AD2 bcs .L154
801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1738 .loc 1 801 5 is_stmt 1 view .LVU478
1739 0018 4449 ldr r1, .L178
1740 .LVL120:
801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1741 .loc 1 801 5 is_stmt 0 view .LVU479
1742 001a 0B68 ldr r3, [r1]
1743 001c 0122 movs r2, #1
ARM GAS /tmp/ccX98wNy.s page 56
1744 001e 9343 bics r3, r2
1745 0020 2B43 orrs r3, r5
1746 0022 0B60 str r3, [r1]
805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1747 .loc 1 805 5 is_stmt 1 view .LVU480
805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1748 .loc 1 805 8 is_stmt 0 view .LVU481
1749 0024 0B68 ldr r3, [r1]
1750 0026 1A40 ands r2, r3
805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1751 .loc 1 805 7 view .LVU482
1752 0028 AA42 cmp r2, r5
1753 002a 00D0 beq .LCB1659
1754 002c 77E0 b .L167 @long jump
1755 .LCB1659:
1756 .L154:
812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1757 .loc 1 812 3 is_stmt 1 view .LVU483
812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1758 .loc 1 812 25 is_stmt 0 view .LVU484
1759 002e 2368 ldr r3, [r4]
812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1760 .loc 1 812 5 view .LVU485
1761 0030 9A07 lsls r2, r3, #30
1762 0032 0ED5 bpl .L155
816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1763 .loc 1 816 5 is_stmt 1 view .LVU486
816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1764 .loc 1 816 7 is_stmt 0 view .LVU487
1765 0034 5B07 lsls r3, r3, #29
1766 0036 05D5 bpl .L156
818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1767 .loc 1 818 7 is_stmt 1 view .LVU488
1768 0038 3D4A ldr r2, .L178+4
1769 003a 5168 ldr r1, [r2, #4]
1770 003c E023 movs r3, #224
1771 003e DB00 lsls r3, r3, #3
1772 0040 0B43 orrs r3, r1
1773 0042 5360 str r3, [r2, #4]
1774 .L156:
822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
1775 .loc 1 822 5 view .LVU489
823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1776 .loc 1 823 5 view .LVU490
1777 0044 3A4A ldr r2, .L178+4
1778 0046 5368 ldr r3, [r2, #4]
1779 0048 F021 movs r1, #240
1780 004a 8B43 bics r3, r1
1781 004c A168 ldr r1, [r4, #8]
1782 004e 0B43 orrs r3, r1
1783 0050 5360 str r3, [r2, #4]
1784 .L155:
827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1785 .loc 1 827 3 view .LVU491
827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1786 .loc 1 827 5 is_stmt 0 view .LVU492
1787 0052 2368 ldr r3, [r4]
ARM GAS /tmp/ccX98wNy.s page 57
1788 0054 DB07 lsls r3, r3, #31
1789 0056 35D5 bpl .L157
829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1790 .loc 1 829 5 is_stmt 1 view .LVU493
832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1791 .loc 1 832 5 view .LVU494
832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1792 .loc 1 832 25 is_stmt 0 view .LVU495
1793 0058 6368 ldr r3, [r4, #4]
832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1794 .loc 1 832 7 view .LVU496
1795 005a 012B cmp r3, #1
1796 005c 09D0 beq .L174
841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1797 .loc 1 841 10 is_stmt 1 view .LVU497
841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1798 .loc 1 841 12 is_stmt 0 view .LVU498
1799 005e 022B cmp r3, #2
1800 0060 24D0 beq .L175
851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1801 .loc 1 851 10 is_stmt 1 view .LVU499
851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1802 .loc 1 851 12 is_stmt 0 view .LVU500
1803 0062 032B cmp r3, #3
1804 0064 28D0 beq .L176
864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1805 .loc 1 864 7 is_stmt 1 view .LVU501
864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1806 .loc 1 864 10 is_stmt 0 view .LVU502
1807 0066 324A ldr r2, .L178+4
1808 0068 1268 ldr r2, [r2]
864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1809 .loc 1 864 9 view .LVU503
1810 006a 9207 lsls r2, r2, #30
1811 006c 05D4 bmi .L159
866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1812 .loc 1 866 16 view .LVU504
1813 006e 0120 movs r0, #1
1814 .LVL121:
866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1815 .loc 1 866 16 view .LVU505
1816 0070 52E0 b .L153
1817 .LVL122:
1818 .L174:
835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1819 .loc 1 835 7 is_stmt 1 view .LVU506
835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1820 .loc 1 835 10 is_stmt 0 view .LVU507
1821 0072 2F4A ldr r2, .L178+4
1822 0074 1268 ldr r2, [r2]
835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1823 .loc 1 835 9 view .LVU508
1824 0076 9203 lsls r2, r2, #14
1825 0078 53D5 bpl .L177
1826 .L159:
869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1827 .loc 1 869 5 is_stmt 1 view .LVU509
ARM GAS /tmp/ccX98wNy.s page 58
1828 007a 2D49 ldr r1, .L178+4
1829 007c 4A68 ldr r2, [r1, #4]
1830 007e 0320 movs r0, #3
1831 .LVL123:
869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1832 .loc 1 869 5 is_stmt 0 view .LVU510
1833 0080 8243 bics r2, r0
1834 0082 1343 orrs r3, r2
1835 0084 4B60 str r3, [r1, #4]
872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1836 .loc 1 872 5 is_stmt 1 view .LVU511
872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1837 .loc 1 872 17 is_stmt 0 view .LVU512
1838 0086 FFF7FEFF bl HAL_GetTick
1839 .LVL124:
1840 008a 0600 movs r6, r0
1841 .LVL125:
874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1842 .loc 1 874 5 is_stmt 1 view .LVU513
1843 .L162:
874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1844 .loc 1 874 12 is_stmt 0 view .LVU514
1845 008c 284B ldr r3, .L178+4
1846 008e 5B68 ldr r3, [r3, #4]
1847 0090 0C22 movs r2, #12
1848 0092 1A40 ands r2, r3
874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1849 .loc 1 874 78 view .LVU515
1850 0094 6368 ldr r3, [r4, #4]
1851 0096 9B00 lsls r3, r3, #2
874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1852 .loc 1 874 11 view .LVU516
1853 0098 9A42 cmp r2, r3
1854 009a 13D0 beq .L157
876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1855 .loc 1 876 7 is_stmt 1 view .LVU517
876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1856 .loc 1 876 11 is_stmt 0 view .LVU518
1857 009c FFF7FEFF bl HAL_GetTick
1858 .LVL126:
876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1859 .loc 1 876 25 view .LVU519
1860 00a0 801B subs r0, r0, r6
876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1861 .loc 1 876 9 view .LVU520
1862 00a2 244B ldr r3, .L178+8
1863 00a4 9842 cmp r0, r3
1864 00a6 F1D9 bls .L162
878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1865 .loc 1 878 16 view .LVU521
1866 00a8 0320 movs r0, #3
1867 00aa 35E0 b .L153
1868 .LVL127:
1869 .L175:
844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1870 .loc 1 844 7 is_stmt 1 view .LVU522
844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
ARM GAS /tmp/ccX98wNy.s page 59
1871 .loc 1 844 10 is_stmt 0 view .LVU523
1872 00ac 204A ldr r2, .L178+4
1873 00ae 1268 ldr r2, [r2]
844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1874 .loc 1 844 9 view .LVU524
1875 00b0 9201 lsls r2, r2, #6
1876 00b2 E2D4 bmi .L159
846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1877 .loc 1 846 16 view .LVU525
1878 00b4 0120 movs r0, #1
1879 .LVL128:
846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1880 .loc 1 846 16 view .LVU526
1881 00b6 2FE0 b .L153
1882 .LVL129:
1883 .L176:
854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1884 .loc 1 854 7 is_stmt 1 view .LVU527
854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1885 .loc 1 854 10 is_stmt 0 view .LVU528
1886 00b8 1D4A ldr r2, .L178+4
1887 00ba 526B ldr r2, [r2, #52]
854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1888 .loc 1 854 9 view .LVU529
1889 00bc D203 lsls r2, r2, #15
1890 00be DCD4 bmi .L159
856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1891 .loc 1 856 16 view .LVU530
1892 00c0 0120 movs r0, #1
1893 .LVL130:
856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1894 .loc 1 856 16 view .LVU531
1895 00c2 29E0 b .L153
1896 .L157:
884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1897 .loc 1 884 3 is_stmt 1 view .LVU532
884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1898 .loc 1 884 17 is_stmt 0 view .LVU533
1899 00c4 194B ldr r3, .L178
1900 00c6 1A68 ldr r2, [r3]
1901 00c8 0123 movs r3, #1
1902 00ca 1340 ands r3, r2
884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1903 .loc 1 884 5 view .LVU534
1904 00cc AB42 cmp r3, r5
1905 00ce 09D9 bls .L164
887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1906 .loc 1 887 5 is_stmt 1 view .LVU535
1907 00d0 1649 ldr r1, .L178
1908 00d2 0B68 ldr r3, [r1]
1909 00d4 0122 movs r2, #1
1910 00d6 9343 bics r3, r2
1911 00d8 2B43 orrs r3, r5
1912 00da 0B60 str r3, [r1]
891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1913 .loc 1 891 5 view .LVU536
891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
ARM GAS /tmp/ccX98wNy.s page 60
1914 .loc 1 891 8 is_stmt 0 view .LVU537
1915 00dc 0B68 ldr r3, [r1]
1916 00de 1A40 ands r2, r3
891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1917 .loc 1 891 7 view .LVU538
1918 00e0 AA42 cmp r2, r5
1919 00e2 20D1 bne .L173
1920 .L164:
898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1921 .loc 1 898 3 is_stmt 1 view .LVU539
898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1922 .loc 1 898 5 is_stmt 0 view .LVU540
1923 00e4 2368 ldr r3, [r4]
1924 00e6 5B07 lsls r3, r3, #29
1925 00e8 06D5 bpl .L165
900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_ClkInitStruct->APB1CLKDivider);
1926 .loc 1 900 5 is_stmt 1 view .LVU541
901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1927 .loc 1 901 5 view .LVU542
1928 00ea 114A ldr r2, .L178+4
1929 00ec 5368 ldr r3, [r2, #4]
1930 00ee 1249 ldr r1, .L178+12
1931 00f0 0B40 ands r3, r1
1932 00f2 E168 ldr r1, [r4, #12]
1933 00f4 0B43 orrs r3, r1
1934 00f6 5360 str r3, [r2, #4]
1935 .L165:
905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1936 .loc 1 905 3 view .LVU543
905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1937 .loc 1 905 21 is_stmt 0 view .LVU544
1938 00f8 FFF7FEFF bl HAL_RCC_GetSysClockFreq
1939 .LVL131:
905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1940 .loc 1 905 68 view .LVU545
1941 00fc 0C4B ldr r3, .L178+4
1942 00fe 5A68 ldr r2, [r3, #4]
905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1943 .loc 1 905 91 view .LVU546
1944 0100 1209 lsrs r2, r2, #4
1945 0102 0F23 movs r3, #15
1946 0104 1340 ands r3, r2
905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1947 .loc 1 905 63 view .LVU547
1948 0106 0D4A ldr r2, .L178+16
1949 0108 D35C ldrb r3, [r2, r3]
905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1950 .loc 1 905 47 view .LVU548
1951 010a D840 lsrs r0, r0, r3
905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1952 .loc 1 905 19 view .LVU549
1953 010c 0C4B ldr r3, .L178+20
1954 010e 1860 str r0, [r3]
908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1955 .loc 1 908 3 is_stmt 1 view .LVU550
1956 0110 0020 movs r0, #0
1957 0112 FFF7FEFF bl HAL_InitTick
ARM GAS /tmp/ccX98wNy.s page 61
1958 .LVL132:
910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1959 .loc 1 910 3 view .LVU551
910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1960 .loc 1 910 10 is_stmt 0 view .LVU552
1961 0116 0020 movs r0, #0
1962 .L153:
911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1963 .loc 1 911 1 view .LVU553
1964 @ sp needed
1965 .LVL133:
1966 .LVL134:
911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1967 .loc 1 911 1 view .LVU554
1968 0118 70BD pop {r4, r5, r6, pc}
1969 .LVL135:
1970 .L166:
786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1971 .loc 1 786 12 view .LVU555
1972 011a 0120 movs r0, #1
1973 .LVL136:
786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1974 .loc 1 786 12 view .LVU556
1975 011c FCE7 b .L153
1976 .LVL137:
1977 .L167:
807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1978 .loc 1 807 14 view .LVU557
1979 011e 0120 movs r0, #1
1980 .LVL138:
807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1981 .loc 1 807 14 view .LVU558
1982 0120 FAE7 b .L153
1983 .LVL139:
1984 .L177:
837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1985 .loc 1 837 16 view .LVU559
1986 0122 0120 movs r0, #1
1987 .LVL140:
837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1988 .loc 1 837 16 view .LVU560
1989 0124 F8E7 b .L153
1990 .L173:
893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1991 .loc 1 893 14 view .LVU561
1992 0126 0120 movs r0, #1
1993 0128 F6E7 b .L153
1994 .L179:
1995 012a C046 .align 2
1996 .L178:
1997 012c 00200240 .word 1073881088
1998 0130 00100240 .word 1073876992
1999 0134 88130000 .word 5000
2000 0138 FFF8FFFF .word -1793
2001 013c 00000000 .word AHBPrescTable
2002 0140 00000000 .word SystemCoreClock
2003 .cfi_endproc
ARM GAS /tmp/ccX98wNy.s page 62
2004 .LFE42:
2006 .section .text.HAL_RCC_GetHCLKFreq,"ax",%progbits
2007 .align 1
2008 .global HAL_RCC_GetHCLKFreq
2009 .syntax unified
2010 .code 16
2011 .thumb_func
2012 .fpu softvfp
2014 HAL_RCC_GetHCLKFreq:
2015 .LFB47:
1162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /**
1164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief Returns the HCLK frequency
1165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note Each time HCLK changes, this function must be called to update the
1166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * right HCLK value. Otherwise, any configuration based on this function will be incorrect
1167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** *
1168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency
1169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * and updated within this function
1170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval HCLK frequency
1171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */
1172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** uint32_t HAL_RCC_GetHCLKFreq(void)
1173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
2016 .loc 1 1173 1 is_stmt 1 view -0
2017 .cfi_startproc
2018 @ args = 0, pretend = 0, frame = 0
2019 @ frame_needed = 0, uses_anonymous_args = 0
2020 @ link register save eliminated.
1174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return SystemCoreClock;
2021 .loc 1 1174 3 view .LVU563
2022 .loc 1 1174 10 is_stmt 0 view .LVU564
2023 0000 014B ldr r3, .L181
2024 0002 1868 ldr r0, [r3]
1175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
2025 .loc 1 1175 1 view .LVU565
2026 @ sp needed
2027 0004 7047 bx lr
2028 .L182:
2029 0006 C046 .align 2
2030 .L181:
2031 0008 00000000 .word SystemCoreClock
2032 .cfi_endproc
2033 .LFE47:
2035 .section .text.HAL_RCC_GetPCLK1Freq,"ax",%progbits
2036 .align 1
2037 .global HAL_RCC_GetPCLK1Freq
2038 .syntax unified
2039 .code 16
2040 .thumb_func
2041 .fpu softvfp
2043 HAL_RCC_GetPCLK1Freq:
2044 .LFB48:
1176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /**
1178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief Returns the PCLK1 frequency
1179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note Each time PCLK1 changes, this function must be called to update the
1180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * right PCLK1 value. Otherwise, any configuration based on this function will be incorrec
1181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval PCLK1 frequency
ARM GAS /tmp/ccX98wNy.s page 63
1182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */
1183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** uint32_t HAL_RCC_GetPCLK1Freq(void)
1184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
2045 .loc 1 1184 1 is_stmt 1 view -0
2046 .cfi_startproc
2047 @ args = 0, pretend = 0, frame = 0
2048 @ frame_needed = 0, uses_anonymous_args = 0
2049 0000 10B5 push {r4, lr}
2050 .LCFI8:
2051 .cfi_def_cfa_offset 8
2052 .cfi_offset 4, -8
2053 .cfi_offset 14, -4
1185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
1186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE) >> RCC_CFGR_PPRE_BITNU
2054 .loc 1 1186 3 view .LVU567
2055 .loc 1 1186 11 is_stmt 0 view .LVU568
2056 0002 FFF7FEFF bl HAL_RCC_GetHCLKFreq
2057 .LVL141:
2058 .loc 1 1186 54 view .LVU569
2059 0006 044B ldr r3, .L184
2060 0008 5A68 ldr r2, [r3, #4]
2061 .loc 1 1186 78 view .LVU570
2062 000a 120A lsrs r2, r2, #8
2063 000c 0723 movs r3, #7
2064 000e 1340 ands r3, r2
2065 .loc 1 1186 49 view .LVU571
2066 0010 024A ldr r2, .L184+4
2067 0012 D35C ldrb r3, [r2, r3]
2068 .loc 1 1186 33 view .LVU572
2069 0014 D840 lsrs r0, r0, r3
1187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
2070 .loc 1 1187 1 view .LVU573
2071 @ sp needed
2072 0016 10BD pop {r4, pc}
2073 .L185:
2074 .align 2
2075 .L184:
2076 0018 00100240 .word 1073876992
2077 001c 00000000 .word APBPrescTable
2078 .cfi_endproc
2079 .LFE48:
2081 .section .text.HAL_RCC_GetOscConfig,"ax",%progbits
2082 .align 1
2083 .global HAL_RCC_GetOscConfig
2084 .syntax unified
2085 .code 16
2086 .thumb_func
2087 .fpu softvfp
2089 HAL_RCC_GetOscConfig:
2090 .LVL142:
2091 .LFB49:
1188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /**
1190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief Configures the RCC_OscInitStruct according to the internal
1191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * RCC configuration registers.
1192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @param RCC_OscInitStruct pointer to an RCC_OscInitTypeDef structure that
1193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * will be configured.
ARM GAS /tmp/ccX98wNy.s page 64
1194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval None
1195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */
1196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** void HAL_RCC_GetOscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
1197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
2092 .loc 1 1197 1 is_stmt 1 view -0
2093 .cfi_startproc
2094 @ args = 0, pretend = 0, frame = 0
2095 @ frame_needed = 0, uses_anonymous_args = 0
2096 @ link register save eliminated.
1198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the parameters */
1199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(RCC_OscInitStruct != NULL);
2097 .loc 1 1199 3 view .LVU575
1200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Set all possible values for the Oscillator type parameter ---------------*/
1202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI \
2098 .loc 1 1202 3 view .LVU576
1203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** | RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_HSI14;
1204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #if defined(RCC_HSI48_SUPPORT)
1205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->OscillatorType |= RCC_OSCILLATORTYPE_HSI48;
2099 .loc 1 1205 3 view .LVU577
2100 .loc 1 1205 37 is_stmt 0 view .LVU578
2101 0000 3F23 movs r3, #63
2102 0002 0360 str r3, [r0]
1206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #endif /* RCC_HSI48_SUPPORT */
1207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get the HSE configuration -----------------------------------------------*/
1210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((RCC->CR &RCC_CR_HSEBYP) == RCC_CR_HSEBYP)
2103 .loc 1 1210 3 is_stmt 1 view .LVU579
2104 .loc 1 1210 10 is_stmt 0 view .LVU580
2105 0004 324B ldr r3, .L201
2106 0006 1B68 ldr r3, [r3]
2107 .loc 1 1210 5 view .LVU581
2108 0008 5B03 lsls r3, r3, #13
2109 000a 40D5 bpl .L187
1211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->HSEState = RCC_HSE_BYPASS;
2110 .loc 1 1212 5 is_stmt 1 view .LVU582
2111 .loc 1 1212 33 is_stmt 0 view .LVU583
2112 000c 0523 movs r3, #5
2113 000e 4360 str r3, [r0, #4]
2114 .L188:
1213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else if((RCC->CR &RCC_CR_HSEON) == RCC_CR_HSEON)
1215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->HSEState = RCC_HSE_ON;
1217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else
1219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->HSEState = RCC_HSE_OFF;
1221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get the HSI configuration -----------------------------------------------*/
1224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((RCC->CR &RCC_CR_HSION) == RCC_CR_HSION)
2115 .loc 1 1224 3 is_stmt 1 view .LVU584
2116 .loc 1 1224 10 is_stmt 0 view .LVU585
2117 0010 2F4B ldr r3, .L201
ARM GAS /tmp/ccX98wNy.s page 65
2118 0012 1B68 ldr r3, [r3]
2119 .loc 1 1224 5 view .LVU586
2120 0014 DB07 lsls r3, r3, #31
2121 0016 44D5 bpl .L190
1225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->HSIState = RCC_HSI_ON;
2122 .loc 1 1226 5 is_stmt 1 view .LVU587
2123 .loc 1 1226 33 is_stmt 0 view .LVU588
2124 0018 0123 movs r3, #1
2125 001a C360 str r3, [r0, #12]
2126 .L191:
1227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else
1229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->HSIState = RCC_HSI_OFF;
1231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->HSICalibrationValue = (uint32_t)((RCC->CR &RCC_CR_HSITRIM) >> RCC_CR_HSITRIM_B
2127 .loc 1 1233 3 is_stmt 1 view .LVU589
2128 .loc 1 1233 59 is_stmt 0 view .LVU590
2129 001c 2C49 ldr r1, .L201
2130 001e 0A68 ldr r2, [r1]
2131 .loc 1 1233 44 view .LVU591
2132 0020 D208 lsrs r2, r2, #3
2133 0022 1F23 movs r3, #31
2134 0024 1340 ands r3, r2
2135 .loc 1 1233 42 view .LVU592
2136 0026 0361 str r3, [r0, #16]
1234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get the LSE configuration -----------------------------------------------*/
1236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((RCC->BDCR &RCC_BDCR_LSEBYP) == RCC_BDCR_LSEBYP)
2137 .loc 1 1236 3 is_stmt 1 view .LVU593
2138 .loc 1 1236 10 is_stmt 0 view .LVU594
2139 0028 0B6A ldr r3, [r1, #32]
2140 .loc 1 1236 5 view .LVU595
2141 002a 5B07 lsls r3, r3, #29
2142 002c 3CD5 bpl .L192
1237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->LSEState = RCC_LSE_BYPASS;
2143 .loc 1 1238 5 is_stmt 1 view .LVU596
2144 .loc 1 1238 33 is_stmt 0 view .LVU597
2145 002e 0523 movs r3, #5
2146 0030 8360 str r3, [r0, #8]
2147 .L193:
1239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else if((RCC->BDCR &RCC_BDCR_LSEON) == RCC_BDCR_LSEON)
1241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->LSEState = RCC_LSE_ON;
1243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else
1245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->LSEState = RCC_LSE_OFF;
1247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get the LSI configuration -----------------------------------------------*/
1250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((RCC->CSR &RCC_CSR_LSION) == RCC_CSR_LSION)
2148 .loc 1 1250 3 is_stmt 1 view .LVU598
ARM GAS /tmp/ccX98wNy.s page 66
2149 .loc 1 1250 10 is_stmt 0 view .LVU599
2150 0032 274B ldr r3, .L201
2151 0034 5B6A ldr r3, [r3, #36]
2152 .loc 1 1250 5 view .LVU600
2153 0036 DB07 lsls r3, r3, #31
2154 0038 40D5 bpl .L195
1251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->LSIState = RCC_LSI_ON;
2155 .loc 1 1252 5 is_stmt 1 view .LVU601
2156 .loc 1 1252 33 is_stmt 0 view .LVU602
2157 003a 0123 movs r3, #1
2158 003c C361 str r3, [r0, #28]
2159 .L196:
1253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else
1255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->LSIState = RCC_LSI_OFF;
1257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get the HSI14 configuration -----------------------------------------------*/
1260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((RCC->CR2 & RCC_CR2_HSI14ON) == RCC_CR2_HSI14ON)
2160 .loc 1 1260 3 is_stmt 1 view .LVU603
2161 .loc 1 1260 10 is_stmt 0 view .LVU604
2162 003e 244B ldr r3, .L201
2163 0040 5B6B ldr r3, [r3, #52]
2164 .loc 1 1260 5 view .LVU605
2165 0042 DB07 lsls r3, r3, #31
2166 0044 3DD5 bpl .L197
1261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->HSI14State = RCC_HSI_ON;
2167 .loc 1 1262 5 is_stmt 1 view .LVU606
2168 .loc 1 1262 35 is_stmt 0 view .LVU607
2169 0046 0123 movs r3, #1
2170 0048 4361 str r3, [r0, #20]
2171 .L198:
1263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else
1265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->HSI14State = RCC_HSI_OFF;
1267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->HSI14CalibrationValue = (uint32_t)((RCC->CR2 & RCC_CR2_HSI14TRIM) >> RCC_HSI14
2172 .loc 1 1269 3 is_stmt 1 view .LVU608
2173 .loc 1 1269 61 is_stmt 0 view .LVU609
2174 004a 214A ldr r2, .L201
2175 004c 516B ldr r1, [r2, #52]
2176 .loc 1 1269 46 view .LVU610
2177 004e C908 lsrs r1, r1, #3
2178 0050 1F23 movs r3, #31
2179 0052 0B40 ands r3, r1
2180 .loc 1 1269 44 view .LVU611
2181 0054 8361 str r3, [r0, #24]
1270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #if defined(RCC_HSI48_SUPPORT)
1272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get the HSI48 configuration if any-----------------------------------------*/
1273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->HSI48State = __HAL_RCC_GET_HSI48_STATE();
2182 .loc 1 1273 3 is_stmt 1 view .LVU612
ARM GAS /tmp/ccX98wNy.s page 67
2183 .loc 1 1273 35 is_stmt 0 view .LVU613
2184 0056 536B ldr r3, [r2, #52]
2185 0058 8021 movs r1, #128
2186 005a 4902 lsls r1, r1, #9
2187 005c 0B40 ands r3, r1
2188 005e 591E subs r1, r3, #1
2189 0060 8B41 sbcs r3, r3, r1
2190 .loc 1 1273 33 view .LVU614
2191 0062 0362 str r3, [r0, #32]
1274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #endif /* RCC_HSI48_SUPPORT */
1275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get the PLL configuration -----------------------------------------------*/
1277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((RCC->CR &RCC_CR_PLLON) == RCC_CR_PLLON)
2192 .loc 1 1277 3 is_stmt 1 view .LVU615
2193 .loc 1 1277 10 is_stmt 0 view .LVU616
2194 0064 1368 ldr r3, [r2]
2195 .loc 1 1277 5 view .LVU617
2196 0066 DB01 lsls r3, r3, #7
2197 0068 2ED5 bpl .L199
1278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLState = RCC_PLL_ON;
2198 .loc 1 1279 5 is_stmt 1 view .LVU618
2199 .loc 1 1279 37 is_stmt 0 view .LVU619
2200 006a 0223 movs r3, #2
2201 006c 4362 str r3, [r0, #36]
2202 .L200:
1280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else
1282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLState = RCC_PLL_OFF;
1284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLSource = (uint32_t)(RCC->CFGR & RCC_CFGR_PLLSRC);
2203 .loc 1 1285 3 is_stmt 1 view .LVU620
2204 .loc 1 1285 52 is_stmt 0 view .LVU621
2205 006e 184B ldr r3, .L201
2206 0070 5A68 ldr r2, [r3, #4]
2207 .loc 1 1285 38 view .LVU622
2208 0072 C021 movs r1, #192
2209 0074 4902 lsls r1, r1, #9
2210 0076 0A40 ands r2, r1
2211 .loc 1 1285 36 view .LVU623
2212 0078 8262 str r2, [r0, #40]
1286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLMUL = (uint32_t)(RCC->CFGR & RCC_CFGR_PLLMUL);
2213 .loc 1 1286 3 is_stmt 1 view .LVU624
2214 .loc 1 1286 49 is_stmt 0 view .LVU625
2215 007a 5A68 ldr r2, [r3, #4]
2216 .loc 1 1286 35 view .LVU626
2217 007c F021 movs r1, #240
2218 007e 8903 lsls r1, r1, #14
2219 0080 0A40 ands r2, r1
2220 .loc 1 1286 33 view .LVU627
2221 0082 C262 str r2, [r0, #44]
1287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PREDIV = (uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV);
2222 .loc 1 1287 3 is_stmt 1 view .LVU628
2223 .loc 1 1287 49 is_stmt 0 view .LVU629
2224 0084 DA6A ldr r2, [r3, #44]
2225 .loc 1 1287 35 view .LVU630
ARM GAS /tmp/ccX98wNy.s page 68
2226 0086 0F23 movs r3, #15
2227 0088 1340 ands r3, r2
2228 .loc 1 1287 33 view .LVU631
2229 008a 0363 str r3, [r0, #48]
1288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
2230 .loc 1 1288 1 view .LVU632
2231 @ sp needed
2232 008c 7047 bx lr
2233 .L187:
1214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
2234 .loc 1 1214 8 is_stmt 1 view .LVU633
1214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
2235 .loc 1 1214 15 is_stmt 0 view .LVU634
2236 008e 104B ldr r3, .L201
2237 0090 1B68 ldr r3, [r3]
1214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
2238 .loc 1 1214 10 view .LVU635
2239 0092 DB03 lsls r3, r3, #15
2240 0094 02D5 bpl .L189
1216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
2241 .loc 1 1216 5 is_stmt 1 view .LVU636
1216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
2242 .loc 1 1216 33 is_stmt 0 view .LVU637
2243 0096 0123 movs r3, #1
2244 0098 4360 str r3, [r0, #4]
2245 009a B9E7 b .L188
2246 .L189:
1220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
2247 .loc 1 1220 5 is_stmt 1 view .LVU638
1220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
2248 .loc 1 1220 33 is_stmt 0 view .LVU639
2249 009c 0023 movs r3, #0
2250 009e 4360 str r3, [r0, #4]
2251 00a0 B6E7 b .L188
2252 .L190:
1230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
2253 .loc 1 1230 5 is_stmt 1 view .LVU640
1230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
2254 .loc 1 1230 33 is_stmt 0 view .LVU641
2255 00a2 0023 movs r3, #0
2256 00a4 C360 str r3, [r0, #12]
2257 00a6 B9E7 b .L191
2258 .L192:
1240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
2259 .loc 1 1240 8 is_stmt 1 view .LVU642
1240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
2260 .loc 1 1240 15 is_stmt 0 view .LVU643
2261 00a8 094B ldr r3, .L201
2262 00aa 1B6A ldr r3, [r3, #32]
1240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
2263 .loc 1 1240 10 view .LVU644
2264 00ac DB07 lsls r3, r3, #31
2265 00ae 02D5 bpl .L194
1242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
2266 .loc 1 1242 5 is_stmt 1 view .LVU645
1242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
2267 .loc 1 1242 33 is_stmt 0 view .LVU646
ARM GAS /tmp/ccX98wNy.s page 69
2268 00b0 0123 movs r3, #1
2269 00b2 8360 str r3, [r0, #8]
2270 00b4 BDE7 b .L193
2271 .L194:
1246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
2272 .loc 1 1246 5 is_stmt 1 view .LVU647
1246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
2273 .loc 1 1246 33 is_stmt 0 view .LVU648
2274 00b6 0023 movs r3, #0
2275 00b8 8360 str r3, [r0, #8]
2276 00ba BAE7 b .L193
2277 .L195:
1256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
2278 .loc 1 1256 5 is_stmt 1 view .LVU649
1256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
2279 .loc 1 1256 33 is_stmt 0 view .LVU650
2280 00bc 0023 movs r3, #0
2281 00be C361 str r3, [r0, #28]
2282 00c0 BDE7 b .L196
2283 .L197:
1266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
2284 .loc 1 1266 5 is_stmt 1 view .LVU651
1266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
2285 .loc 1 1266 35 is_stmt 0 view .LVU652
2286 00c2 0023 movs r3, #0
2287 00c4 4361 str r3, [r0, #20]
2288 00c6 C0E7 b .L198
2289 .L199:
1283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
2290 .loc 1 1283 5 is_stmt 1 view .LVU653
1283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
2291 .loc 1 1283 37 is_stmt 0 view .LVU654
2292 00c8 0123 movs r3, #1
2293 00ca 4362 str r3, [r0, #36]
2294 00cc CFE7 b .L200
2295 .L202:
2296 00ce C046 .align 2
2297 .L201:
2298 00d0 00100240 .word 1073876992
2299 .cfi_endproc
2300 .LFE49:
2302 .section .text.HAL_RCC_GetClockConfig,"ax",%progbits
2303 .align 1
2304 .global HAL_RCC_GetClockConfig
2305 .syntax unified
2306 .code 16
2307 .thumb_func
2308 .fpu softvfp
2310 HAL_RCC_GetClockConfig:
2311 .LVL143:
2312 .LFB50:
1289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /**
1291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief Get the RCC_ClkInitStruct according to the internal
1292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * RCC configuration registers.
1293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @param RCC_ClkInitStruct pointer to an RCC_ClkInitTypeDef structure that
1294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * contains the current clock configuration.
ARM GAS /tmp/ccX98wNy.s page 70
1295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @param pFLatency Pointer on the Flash Latency.
1296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval None
1297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */
1298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t *pFLatency)
1299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
2313 .loc 1 1299 1 is_stmt 1 view -0
2314 .cfi_startproc
2315 @ args = 0, pretend = 0, frame = 0
2316 @ frame_needed = 0, uses_anonymous_args = 0
2317 .loc 1 1299 1 is_stmt 0 view .LVU656
2318 0000 10B5 push {r4, lr}
2319 .LCFI9:
2320 .cfi_def_cfa_offset 8
2321 .cfi_offset 4, -8
2322 .cfi_offset 14, -4
1300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the parameters */
1301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(RCC_ClkInitStruct != NULL);
2323 .loc 1 1301 3 is_stmt 1 view .LVU657
1302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(pFLatency != NULL);
2324 .loc 1 1302 3 view .LVU658
1303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Set all possible values for the Clock type parameter --------------------*/
1305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1;
2325 .loc 1 1305 3 view .LVU659
2326 .loc 1 1305 32 is_stmt 0 view .LVU660
2327 0002 0723 movs r3, #7
2328 0004 0360 str r3, [r0]
1306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get the SYSCLK configuration --------------------------------------------*/
1308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_ClkInitStruct->SYSCLKSource = (uint32_t)(RCC->CFGR & RCC_CFGR_SW);
2329 .loc 1 1308 3 is_stmt 1 view .LVU661
2330 .loc 1 1308 51 is_stmt 0 view .LVU662
2331 0006 0A4B ldr r3, .L204
2332 0008 5C68 ldr r4, [r3, #4]
2333 .loc 1 1308 37 view .LVU663
2334 000a 0322 movs r2, #3
2335 000c 2240 ands r2, r4
2336 .loc 1 1308 35 view .LVU664
2337 000e 4260 str r2, [r0, #4]
1309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get the HCLK configuration ----------------------------------------------*/
1311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_HPRE);
2338 .loc 1 1311 3 is_stmt 1 view .LVU665
2339 .loc 1 1311 52 is_stmt 0 view .LVU666
2340 0010 5C68 ldr r4, [r3, #4]
2341 .loc 1 1311 38 view .LVU667
2342 0012 F022 movs r2, #240
2343 0014 2240 ands r2, r4
2344 .loc 1 1311 36 view .LVU668
2345 0016 8260 str r2, [r0, #8]
1312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get the APB1 configuration ----------------------------------------------*/
1314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE);
2346 .loc 1 1314 3 is_stmt 1 view .LVU669
2347 .loc 1 1314 53 is_stmt 0 view .LVU670
2348 0018 5B68 ldr r3, [r3, #4]
2349 .loc 1 1314 39 view .LVU671
ARM GAS /tmp/ccX98wNy.s page 71
2350 001a E022 movs r2, #224
2351 001c D200 lsls r2, r2, #3
2352 001e 1340 ands r3, r2
2353 .loc 1 1314 37 view .LVU672
2354 0020 C360 str r3, [r0, #12]
1315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get the Flash Wait State (Latency) configuration ------------------------*/
1316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** *pFLatency = __HAL_FLASH_GET_LATENCY();
2355 .loc 1 1316 3 is_stmt 1 view .LVU673
2356 .loc 1 1316 16 is_stmt 0 view .LVU674
2357 0022 044B ldr r3, .L204+4
2358 0024 1A68 ldr r2, [r3]
2359 0026 0123 movs r3, #1
2360 0028 1340 ands r3, r2
2361 .loc 1 1316 14 view .LVU675
2362 002a 0B60 str r3, [r1]
1317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
2363 .loc 1 1317 1 view .LVU676
2364 @ sp needed
2365 002c 10BD pop {r4, pc}
2366 .L205:
2367 002e C046 .align 2
2368 .L204:
2369 0030 00100240 .word 1073876992
2370 0034 00200240 .word 1073881088
2371 .cfi_endproc
2372 .LFE50:
2374 .section .text.HAL_RCC_CSSCallback,"ax",%progbits
2375 .align 1
2376 .weak HAL_RCC_CSSCallback
2377 .syntax unified
2378 .code 16
2379 .thumb_func
2380 .fpu softvfp
2382 HAL_RCC_CSSCallback:
2383 .LFB52:
1318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /**
1320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief This function handles the RCC CSS interrupt request.
1321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note This API should be called under the NMI_Handler().
1322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval None
1323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */
1324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** void HAL_RCC_NMI_IRQHandler(void)
1325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check RCC CSSF flag */
1327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(__HAL_RCC_GET_IT(RCC_IT_CSS))
1328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* RCC Clock Security System interrupt user callback */
1330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** HAL_RCC_CSSCallback();
1331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Clear RCC CSS pending bit */
1333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_CLEAR_IT(RCC_IT_CSS);
1334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
1337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /**
1338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief RCC Clock Security System interrupt callback
1339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval none
ARM GAS /tmp/ccX98wNy.s page 72
1340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */
1341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __weak void HAL_RCC_CSSCallback(void)
1342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
2384 .loc 1 1342 1 is_stmt 1 view -0
2385 .cfi_startproc
2386 @ args = 0, pretend = 0, frame = 0
2387 @ frame_needed = 0, uses_anonymous_args = 0
2388 @ link register save eliminated.
1343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* NOTE : This function Should not be modified, when the callback is needed,
1344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** the HAL_RCC_CSSCallback could be implemented in the user file
1345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */
1346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
2389 .loc 1 1346 1 view .LVU678
2390 @ sp needed
2391 0000 7047 bx lr
2392 .cfi_endproc
2393 .LFE52:
2395 .section .text.HAL_RCC_NMI_IRQHandler,"ax",%progbits
2396 .align 1
2397 .global HAL_RCC_NMI_IRQHandler
2398 .syntax unified
2399 .code 16
2400 .thumb_func
2401 .fpu softvfp
2403 HAL_RCC_NMI_IRQHandler:
2404 .LFB51:
1325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check RCC CSSF flag */
2405 .loc 1 1325 1 view -0
2406 .cfi_startproc
2407 @ args = 0, pretend = 0, frame = 0
2408 @ frame_needed = 0, uses_anonymous_args = 0
2409 0000 10B5 push {r4, lr}
2410 .LCFI10:
2411 .cfi_def_cfa_offset 8
2412 .cfi_offset 4, -8
2413 .cfi_offset 14, -4
1327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
2414 .loc 1 1327 3 view .LVU680
1327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
2415 .loc 1 1327 6 is_stmt 0 view .LVU681
2416 0002 054B ldr r3, .L210
2417 0004 9B68 ldr r3, [r3, #8]
1327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
2418 .loc 1 1327 5 view .LVU682
2419 0006 1B06 lsls r3, r3, #24
2420 0008 00D4 bmi .L209
2421 .L207:
1335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
2422 .loc 1 1335 1 view .LVU683
2423 @ sp needed
2424 000a 10BD pop {r4, pc}
2425 .L209:
1330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
2426 .loc 1 1330 5 is_stmt 1 view .LVU684
2427 000c FFF7FEFF bl HAL_RCC_CSSCallback
2428 .LVL144:
1333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
ARM GAS /tmp/ccX98wNy.s page 73
2429 .loc 1 1333 5 view .LVU685
2430 0010 024B ldr r3, .L210+4
2431 0012 8022 movs r2, #128
2432 0014 1A70 strb r2, [r3]
1335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****
2433 .loc 1 1335 1 is_stmt 0 view .LVU686
2434 0016 F8E7 b .L207
2435 .L211:
2436 .align 2
2437 .L210:
2438 0018 00100240 .word 1073876992
2439 001c 0A100240 .word 1073877002
2440 .cfi_endproc
2441 .LFE51:
2443 .section .rodata
2444 .align 2
2445 .set .LANCHOR0,. + 0
2446 .LC0:
2447 0000 02 .byte 2
2448 0001 03 .byte 3
2449 0002 04 .byte 4
2450 0003 05 .byte 5
2451 0004 06 .byte 6
2452 0005 07 .byte 7
2453 0006 08 .byte 8
2454 0007 09 .byte 9
2455 0008 0A .byte 10
2456 0009 0B .byte 11
2457 000a 0C .byte 12
2458 000b 0D .byte 13
2459 000c 0E .byte 14
2460 000d 0F .byte 15
2461 000e 10 .byte 16
2462 000f 10 .byte 16
2463 .LC1:
2464 0010 01 .byte 1
2465 0011 02 .byte 2
2466 0012 03 .byte 3
2467 0013 04 .byte 4
2468 0014 05 .byte 5
2469 0015 06 .byte 6
2470 0016 07 .byte 7
2471 0017 08 .byte 8
2472 0018 09 .byte 9
2473 0019 0A .byte 10
2474 001a 0B .byte 11
2475 001b 0C .byte 12
2476 001c 0D .byte 13
2477 001d 0E .byte 14
2478 001e 0F .byte 15
2479 001f 10 .byte 16
2480 .text
2481 .Letext0:
2482 .file 2 "/usr/lib/gcc/arm-none-eabi/8.3.1/include/stdint.h"
2483 .file 3 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h"
2484 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h"
2485 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h"
ARM GAS /tmp/ccX98wNy.s page 74
2486 .file 6 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h"
2487 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h"
2488 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h"
2489 .file 9 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h"
ARM GAS /tmp/ccX98wNy.s page 75
DEFINED SYMBOLS
*ABS*:0000000000000000 stm32f0xx_hal_rcc.c
/tmp/ccX98wNy.s:16 .text.HAL_RCC_DeInit:0000000000000000 $t
/tmp/ccX98wNy.s:24 .text.HAL_RCC_DeInit:0000000000000000 HAL_RCC_DeInit
/tmp/ccX98wNy.s:190 .text.HAL_RCC_DeInit:00000000000000ac $d
/tmp/ccX98wNy.s:202 .text.HAL_RCC_OscConfig:0000000000000000 $t
/tmp/ccX98wNy.s:209 .text.HAL_RCC_OscConfig:0000000000000000 HAL_RCC_OscConfig
/tmp/ccX98wNy.s:846 .text.HAL_RCC_OscConfig:00000000000002e0 $d
/tmp/ccX98wNy.s:854 .text.HAL_RCC_OscConfig:00000000000002f4 $t
/tmp/ccX98wNy.s:1362 .text.HAL_RCC_OscConfig:0000000000000530 $d
/tmp/ccX98wNy.s:1371 .text.HAL_RCC_MCOConfig:0000000000000000 $t
/tmp/ccX98wNy.s:1378 .text.HAL_RCC_MCOConfig:0000000000000000 HAL_RCC_MCOConfig
/tmp/ccX98wNy.s:1469 .text.HAL_RCC_MCOConfig:000000000000004c $d
/tmp/ccX98wNy.s:1475 .text.HAL_RCC_EnableCSS:0000000000000000 $t
/tmp/ccX98wNy.s:1482 .text.HAL_RCC_EnableCSS:0000000000000000 HAL_RCC_EnableCSS
/tmp/ccX98wNy.s:1502 .text.HAL_RCC_EnableCSS:0000000000000010 $d
/tmp/ccX98wNy.s:1507 .text.HAL_RCC_DisableCSS:0000000000000000 $t
/tmp/ccX98wNy.s:1514 .text.HAL_RCC_DisableCSS:0000000000000000 HAL_RCC_DisableCSS
/tmp/ccX98wNy.s:1533 .text.HAL_RCC_DisableCSS:000000000000000c $d
/tmp/ccX98wNy.s:1540 .text.HAL_RCC_GetSysClockFreq:0000000000000000 $t
/tmp/ccX98wNy.s:1547 .text.HAL_RCC_GetSysClockFreq:0000000000000000 HAL_RCC_GetSysClockFreq
/tmp/ccX98wNy.s:1688 .text.HAL_RCC_GetSysClockFreq:0000000000000084 $d
/tmp/ccX98wNy.s:1696 .text.HAL_RCC_ClockConfig:0000000000000000 $t
/tmp/ccX98wNy.s:1703 .text.HAL_RCC_ClockConfig:0000000000000000 HAL_RCC_ClockConfig
/tmp/ccX98wNy.s:1997 .text.HAL_RCC_ClockConfig:000000000000012c $d
/tmp/ccX98wNy.s:2007 .text.HAL_RCC_GetHCLKFreq:0000000000000000 $t
/tmp/ccX98wNy.s:2014 .text.HAL_RCC_GetHCLKFreq:0000000000000000 HAL_RCC_GetHCLKFreq
/tmp/ccX98wNy.s:2031 .text.HAL_RCC_GetHCLKFreq:0000000000000008 $d
/tmp/ccX98wNy.s:2036 .text.HAL_RCC_GetPCLK1Freq:0000000000000000 $t
/tmp/ccX98wNy.s:2043 .text.HAL_RCC_GetPCLK1Freq:0000000000000000 HAL_RCC_GetPCLK1Freq
/tmp/ccX98wNy.s:2076 .text.HAL_RCC_GetPCLK1Freq:0000000000000018 $d
/tmp/ccX98wNy.s:2082 .text.HAL_RCC_GetOscConfig:0000000000000000 $t
/tmp/ccX98wNy.s:2089 .text.HAL_RCC_GetOscConfig:0000000000000000 HAL_RCC_GetOscConfig
/tmp/ccX98wNy.s:2298 .text.HAL_RCC_GetOscConfig:00000000000000d0 $d
/tmp/ccX98wNy.s:2303 .text.HAL_RCC_GetClockConfig:0000000000000000 $t
/tmp/ccX98wNy.s:2310 .text.HAL_RCC_GetClockConfig:0000000000000000 HAL_RCC_GetClockConfig
/tmp/ccX98wNy.s:2369 .text.HAL_RCC_GetClockConfig:0000000000000030 $d
/tmp/ccX98wNy.s:2375 .text.HAL_RCC_CSSCallback:0000000000000000 $t
/tmp/ccX98wNy.s:2382 .text.HAL_RCC_CSSCallback:0000000000000000 HAL_RCC_CSSCallback
/tmp/ccX98wNy.s:2396 .text.HAL_RCC_NMI_IRQHandler:0000000000000000 $t
/tmp/ccX98wNy.s:2403 .text.HAL_RCC_NMI_IRQHandler:0000000000000000 HAL_RCC_NMI_IRQHandler
/tmp/ccX98wNy.s:2438 .text.HAL_RCC_NMI_IRQHandler:0000000000000018 $d
/tmp/ccX98wNy.s:2444 .rodata:0000000000000000 $d
UNDEFINED SYMBOLS
HAL_GetTick
HAL_InitTick
SystemCoreClock
uwTickPrio
HAL_GPIO_Init
__aeabi_uidiv
AHBPrescTable
APBPrescTable
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