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130 lines
6.2 KiB
130 lines
6.2 KiB
/**
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**************************************************************************************************
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* @file i2c.h
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* @author Kerem Yollu & Edwin Koch
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* @date 18.07.2022
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* @version 1.0
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**************************************************************************************************
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* @brief I2C communitation based on the Standart I2C Protocol V7 Defined by NXP/Philips :
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* following third Party Protocols based on I2C Bus are not going to be implemented : C-BUS SMBUS PMBUS IPMI DDC ATCA
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* This will also not have a I3C support for the forseable futrue.
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*
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* **Detailed Description :**
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*
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* I2C communitation based on the Standart I2C Protocol V7 Defined by NXP/Philips :
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* following third Party Protocols based on I2C Bus are not going to be implemented : C-BUS SMBUS PMBUS IPMI DDC ATCA
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* This will also not have a I3C support for the forseable futrue.
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*
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* @todo
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* - 18.07.2021 : Implement the i2c.c.
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**************************************************************************************************
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*/
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#ifndef _I2C_H_
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#define _I2C_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <stdint.h>
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#define I2C_STATE_RESET 1 // Not Initialized
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#define I2C_STATE_READY 2 // Ready
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#define I2C_STATE_TX 4 // Transmitting
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#define I2C_STATE_RX 5 // Receiving
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#define I2C_STATE_LISTEN 6 // Listening
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#define I2C_STATE_ABORT 7 // Aborted by user
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#define I2C_STATE_TIMEOUT 8 // Timeout
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#define I2C_STATE_ERROR 9 // Error happened
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/*! Enum of possible I2C opperation modes */
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typedef enum{
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i2cModeMaster, /*!< Master mode : In Master mode, the I2C interface initiates a data transfer and generates the clock signal. */
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i2cModeMultyMaster, /*!< Multimaster Mode : In case if more than one master are present in one I2C bus, In such case each device needs to be able to cooperate with the fact that another device is currently talking and the bus is therefore busy (Arbirtation). For More information : https://www.i2c-bus.org/multimaster/ */
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i2cModeSlave /*!< Slave mode : A slave device has to always be ready to detect and process a start condition and to recognize its address */
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}i2cMode_t;
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/*! Enum of possible I2C speeds */
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typedef enum{
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i2cSpeedStandart, /*!< SM 100 kbits/s This is the stantrd spped for any standart i2c Applications */
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i2cSpeedFast, /*!< FM 400 kbits/s */
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i2cSpeedFastPlus, /*!< FM+ 1 Mbits/s */
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i2cSpeedHightSpeed, /*!< HS 3.4 Mbits/s */
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i2cSpeedUltraFast /*!< UFM 5 Mbits/s */
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}i2cSpeed_t;
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/*! Enum of possible I2C Adress sizes */
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typedef enum{
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i2cAddressSizeSevenBits, /*!< 7 Bits address size */
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i2cAddressSizeTenBits /*!< 10 Bits address size */
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}i2cAddressSize_t;
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/*! Enum of possible I2C Address count */
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typedef enum{
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i2cAddressCountSingle, /*!< Only one adress for communication */
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i2cAddressCountDual /*!< Dual adresses for one device respondng to two adresses */
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}i2cAddressCount_t;
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/*! Enum for clock strechning activation. Can only be implmented as Slave for more information : https://www.i2c-bus.org/clock-stretching/ */
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typedef enum{
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i2cClockStrechingEnable, /*!< In situations where an I2C slave is not able to co-operate with the clock speed given by the master and needs to slow down a little. This is done by a mechanism referred to as clock stretching. */
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i2cCLockStrechingDisable /*!< We assume that the master and slave have compatible Clock frequencies */
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}i2cClockStreching_t;
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typedef struct
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{
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uint16_t adress; /*!< First and Main address of the device */
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i2cAddressSize_t adressSize; /*!< 10 or 7 bit adress size */
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i2cAddressCount_t addresCount; /*!< SIngle or multiple */
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i2cMode_t mode; /*!< Master, Slave or Multymaster Modes */
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i2cSpeed_t speed;/*!< Bus Speed */
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i2cClockStreching_t streching; /*!< Clock Streching enablede or disabled*/
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uint32_t timing; /*!< Specifies the I2C timing The timings must be configured
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in order to guarantee a correct data hold and setup time, used in master
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and slave modes. */
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uint16_t adressSecond; /*!< Second adress if dual adresse mode is configured*/
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}i2cChannelDefinition_t;
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/**
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* @brief Initilize the I2C Hardware
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*/
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int8_t i2cInit(i2cCh_t i2cChannel);
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void i2cRead(uint8_t *reg, uint8_t *buffer, uint8_t *regLenght, uint8_t *bufferLenght); // Defined by me : Read a given number of bytes
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void i2cWrite(uint8_t *reg, uint8_t *data, uint8_t *regLenght, uint8_t *dataLenght); // Defined by me : Send a given number of bytes
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uint8_t i2cTestDeviceSpeed(); // Defined by me : Cycle trough different modes until device cnat't answer fast enought
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uint8_t i2cDiscoverDevices(); // Defined by me : Scan the awailable address range on standart mode to find devices
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void i2cInitChannelAsMaster(); // Hardware Specific : Initilise the hardware channel in master mode
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void i2cInitChannelAsSlave(); // Hardware Specific : Initilise the hardware channel in slavic mode (@life of boris)
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void i2cFreeChannel(); // Hardware Specific : Free the hardware channel for othe recousrces
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void i2cClockSynchronise();// I2C Standart : Clock Syncronization
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void i2cReadDeviceInfo(); // I2c Standart : 3 Bytes (24 bits) | 12 Bits : Manufacturer info | 9 Bits: Part Identification | 3 Bits DIE Rev.
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void i2cAbortTransmit(); // I2c Standart : Stop Communication for multimaster mode
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void i2cClockStretch(); // I2C Standart : Optional For Pausing Communication because treatement takes longer than the communication
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void i2cArbitration(); // I2C Standart : Arbitration for multimaster mode to define the right master.
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void i2cSoftReset(); // I2C Standart : Software reset not supported by all hardware.
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void i2cBusClear(); // I2C Standart : in case if SCL is stuck
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void i2cSetSpeed(uint8_t speed); // I2C Standart
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void i2cSetAddress(uint16_t address); // I2C Standart
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void i2cSetAddressMode(); // I2C Standart
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void i2cSetTimeout(uint8_t timeout); // Hardware specific
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void i2cSetInterrupt(); // Hardware Specific
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void i2cSetDma(); // Hardware specific
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void i2cThrowError(int16_t error); // Defined by me : Private error function for error handling
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void i2cPointReg(uint8_t reg); // Defined by me : Points to the register to be red from
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#ifdef __cplusplus
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}
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#endif
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#endif // _I2C_H_
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