/**
**************************************************************************************************
* @file		hwd_interrupt.h		
* @author	Kerem Yollu & Edwin Koch
* @date		26.02.2023
* @version	1.0
************************************************************************************************** 
* @brief
* 
* **Detailed Description :**
*	
**************************************************************************************************
*/

#ifndef _HWD_INTERRUPT_H_
#define _HWD_INTERRUPT_H_

#ifdef __cplusplus
extern "C" {
#endif

#include "interrupt.h"
#include "hardwareDescription.h"

/*! interrupt types. These act as indexes for the */



typedef enum {
	PINX0_RISING_EDGE,
	PINX0_FALLING_EDGE,
	PINX0_BOTH_EDGE,
	PINX1_RISING_EDGE,
	PINX1_FALLING_EDGE,
	PINX1_BOTH_EDGE,
	PINX2_RISING_EDGE,
	PINX2_FALLING_EDGE,
	PINX2_BOTH_EDGE,
	PINX3_RISING_EDGE,
	PINX3_FALLING_EDGE,
	PINX3_BOTH_EDGE,
	PINX4_RISING_EDGE,
	PINX4_FALLING_EDGE,
	PINX4_BOTH_EDGE,
	PINX5_RISING_EDGE,
	PINX5_FALLING_EDGE,
	PINX5_BOTH_EDGE,
	PINX6_RISING_EDGE,
	PINX6_FALLING_EDGE,
	PINX6_BOTH_EDGE,
	PINX6_BOTH_EDGE,
	PINX7_RISING_EDGE,
	PINX7_FALLING_EDGE,
	PINX7_BOTH_EDGE,
	PINX8_RISING_EDGE,
	PINX8_FALLING_EDGE,
	PINX8_BOTH_EDGE,
	PINX9_RISING_EDGE,
	PINX9_FALLING_EDGE,
	PINX9_BOTH_EDGE,
	PINX10_RISING_EDGE,
	PINX10_FALLING_EDGE,
	PINX10_BOTH_EDGE,
	PINX11_RISING_EDGE,
	PINX11_FALLING_EDGE,
	PINX11_BOTH_EDGE,
	PINX12_RISING_EDGE,
	PINX12_FALLING_EDGE,
	PINX12_BOTH_EDGE,
	PINX13_RISING_EDGE,
	PINX13_FALLING_EDGE,
	PINX13_BOTH_EDGE,
	PINX14_RISING_EDGE,
	PINX14_FALLING_EDGE,
	PINX14_BOTH_EDGE,
	PINX15_RISING_EDGE,
	PINX15_FALLING_EDGE,
	PINX15_BOTH_EDGE,
	TIM1_BREAK,
	TIM1_UPDATE,
	TIM1_TRIGGER,
	TIM1_COMMUNICATION,
	TIM1_COUNTERCOMPARE_1,
	TIM1_COUNTERCOMPARE_2,
	TIM1_COUNTERCOMPARE_3,
	TIM1_COUNTERCOMPARE_4,
	TIM2_UPDATE,
	TIM2_COUNTERCOMPARE_1,
	TIM2_COUNTERCOMPARE_2,
	TIM2_COUNTERCOMPARE_3,
	TIM2_COUNTERCOMPARE_4,
	TIM2_TRIGGER,
	TIM2_CAPTURECOMPARE_1,
	TIM2_CAPTURECOMPARE_2,
	TIM2_CAPTURECOMPARE_3,
  	TIM2_CAPTURECOMAPRE_4,
	TIM3_UPDATE,
	TIM3_COUNTERCOMPARE_1,
	TIM3_COUNTERCOMPARE_2,
	TIM3_COUNTERCOMPARE_3,
	TIM3_COUNTERCOMPARE_4,
	TIM3_TRIGGER,
	TIM3_CAPTURECOMPARE_1,
	TIM3_CAPTURECOMPARE_2,
	TIM3_CAPTURECOMPARE_3,
  	TIM3_CAPTURECOMAPRE_4,
	TIM14_CAPTURECOMPARE_1_OVERCAPTURE,
	TIM14_CAPTURECOMPARE_1,
	TIM14_UPDATE,
	TIM16_CAPTURECOMPARE_1_OVERCAPTURE,
	TIM16_BREAK,
	TIM16_COMMUNICATION,
	TIM16_CAPTURECOMPARE_1,
	TIM16_UPDATE,
	TIM17_CAPTURECOMPARE_1_OVERCAPTURE,
	TIM17_BREAK,
	TIM17_COMMUNICATION,
	TIM17_CAPTURECOMPARE_1,
	TIM17_UPDATE,
	SPI1_TX_FIFO_EMPTY,
	SPI1_TX_FIFO_1_4,
	SPI1_TX_FIFO_1_2,
	SPI1_TX_FIFO_FULL,
	SPI1_RX_FIFO_EMPTY,
	SPI1_RX_FIFO_1_4,
	SPI1_RX_FIFO_1_2,
	SPI1_RX_FIFO_FULL,
	SPI1_FRAME_FORMAT_ERROR,
	SPI1_BUSY,
	SPI1_OVERRUN,
	SPI1_MODE_FAULT,
	SPI1_CRC_ERROR,
	SPI1_UNDERRUN,
	SPI1_CHANNEL_SIDE,
	SPI1_TX_BUFFER_EMPTY,
	SPI1_RX_BUFFER_NOT_EMPTY,
	intTypeEND
}intrType_t;


#ifdef __cplusplus
}
#endif

#endif // _HWD_INTERRUPT_H_