/*! Enum of the awailable pins for this package */
#include "stm32f042x6.h"

// this file contains all the specific hardware definitions  for the given chip stm32f042x6.
// Its used for the interfaces for the CSL.


#define PACKAGE_LQFP32 1

#define MAX_USART_CHANNEL_COUNT 2
#define MAX_I2C_CHANNEL_COUNT 1
#define MAX_SPI_CHANNEL_COUNT 2
#define MAX_I2S_CHANNEL_COUNT 2
#define MAX_CAN_CHANNEL_COUNT 1


#define MAX_N_PORTS_COUNT	3
#define MAX_PORT_PINS_COUNT	16
#define MAX_N_PIN_ALT_FUNC	8

#define MAX_PORT_A_PIN_NO	15
#define MAX_PORT_B_PIN_NO	15
#define MAX_PORT_F_PIN_NO	1

typedef enum 
{
//  NAME  = BASE ADDR   | PORT | PIN NO
	pinA0 =  0x00 | 0,	/*!< Port: A Pin: 0  ->  Port A Mask | Pin Mask */
	pinA1 =  0x00 | 1,	/*!< Port: A Pin: 1  ->  Port A Mask | Pin Mask */
	pinA2 =  0x00 | 2,	/*!< Port: A Pin: 2  ->  Port A Mask | Pin Mask */
	pinA3 =  0x00 | 3,	/*!< Port: A Pin: 3  ->  Port A Mask | Pin Mask */
	pinA4 =  0x00 | 4,	/*!< Port: A Pin: 4  ->  Port A Mask | Pin Mask */
	pinA5 =  0x00 | 5,	/*!< Port: A Pin: 5  ->  Port A Mask | Pin Mask */
	pinA6 =  0x00 | 6,	/*!< Port: A Pin: 6  ->  Port A Mask | Pin Mask */
	pinA7 =  0x00 | 7,	/*!< Port: A Pin: 7  ->  Port A Mask | Pin Mask */
	pinA8 =  0x00 | 8,	/*!< Port: A Pin: 8  ->  Port A Mask | Pin Mask */
	pinA9 =  0x00 | 9,	/*!< Port: A Pin: 9  ->  Port A Mask | Pin Mask */
	pinA10 = 0x00 | 10,	/*!< Port: A Pin: 10 ->  Port A Mask | Pin Mask */
	pinA11 = 0x00 | 11,	/*!< Port: A Pin: 11 ->  Port A Mask | Pin Mask */
	pinA12 = 0x00 | 12,	/*!< Port: A Pin: 12 ->  Port A Mask | Pin Mask */
	pinA13 = 0x00 | 13,	/*!< Port: A Pin: 13 ->  Port A Mask | Pin Mask */
	pinA14 = 0x00 | 14,	/*!< Port: A Pin: 14 ->  Port A Mask | Pin Mask */
	pinA15 = 0x00 | 15,	/*!< Port: A Pin: 15 ->  Port A Mask | Pin Mask */

	pinB0 =  0x10 | 0,	/*!< Port: B Pin: 0  ->  Port B Mask | Pin Mask */
	pinB1 =  0x10 | 1,	/*!< Port: B Pin: 1  ->  Port B Mask | Pin Mask */
	pinB3 =  0x10 | 3,	/*!< Port: B Pin: 3  ->  Port B Mask | Pin Mask */
	pinB4 =  0x10 | 4,	/*!< Port: B Pin: 4  ->  Port B Mask | Pin Mask */
	pinB5 =  0x10 | 5,	/*!< Port: B Pin: 5  ->  Port B Mask | Pin Mask */
	pinB6 =  0x10 | 6,	/*!< Port: B Pin: 6  ->  Port B Mask | Pin Mask */
	pinB7 =  0x10 | 7,	/*!< Port: B Pin: 7  ->  Port B Mask | Pin Mask */
	pinB8 =  0x10 | 8,	/*!< Port: B Pin: 8  ->  Port B Mask | Pin Mask */
             
	pinF0 =  0x20 | 0,	/*!< Port: F Pin: 0  ->  Port F Mask | Pin Mask */
	pinF1 =  0x20 | 1	/*!< Port: F Pin: 1  ->  Port F Mask | Pin Mask */
}pinNo_t;    
             
static const  uint32_t portBase_Addr_List[3] = {GPIOA_BASE, GPIOB_BASE, GPIOF_BASE};
             
static const uint8_t altFunc_List[MAX_N_PORTS_COUNT][MAX_PORT_PINS_COUNT] = {
	{	// PORT A
		0b01110000, //PA0 
		0b11110000, //PA1
		0b01110000, //PA2
		0b01110000, //PA3	
		0b11111000, //PA4	
		0b11110000, //PA5 
		0b11110110, //PA6
		0b11111110, //PA7
		0b11111000, //PA8
		0b01111100, //PA9
		0b11111000, //PA10
		0b11111100, //PA11
		0b11111100, //PA12
		0b11100000, //PA13
		0b11000000, //PA14
		0b11110100	//PA15
	},
	{	// PORT B
		0b11110000, //PB0  
		0b11110000, //PB1  
		0b00010000, //PB2  
		0b11110000, //PB3  
		0b11110100, //PB4  
		0b11110000, //PB5  
		0b11110000, //PB6  
		0b11110000, //PB7  
		0b11111000, //PB8  
		0b11111100, //PB9  
		0b11110100, //PB10 
		0b11100000, //PB11 
		0b11100000, //PB12
		0b10100100, //PB13
		0b10100100, //PB14
		0b10100000	//PB15
	},
	{	// PORT F
		0b11000000, //PF0 
		0b01000000, //PF1 
		0b00000000, //N.A 
		0b00000000, //N.A 
		0b00000000, //N.A 
		0b00000000, //N.A 
		0b00000000, //N.A 
		0b00000000, //N.A 
		0b00000000, //N.A 
		0b00000000, //N.A 
		0b00000000, //N.A
		0b00000000, //N.A
		0b00000000, //N.A
		0b00000000, //N.A
		0b00000000, //N.A
		0b00000000	//N.A
	}	
};


/*
void setAlt(pin_no_t id, uint8_t af)
{
	// check for index overshoot
	assert(MAX_NO_ALT_PER_PIN < af);
	
	// fail if list entry returns 0
	//assert(pinAltList[((id & 0xF0) >> 4)][id & 0x0F]) != 0);
		  
	// setup alt function here...
}
*/