/**
**************************************************************************************************
* @file		hwd_i2c.h		
* @author	Kerem Yollu & Edwin Koch
* @date		26.02.2023
* @version	1.0
************************************************************************************************** 
* @brief
* 
* **Detailed Description :**
*	
**************************************************************************************************
*/

#ifndef _HWD_I2C_H_
#define _HWD_I2C_H_

#ifdef __cplusplus
extern "C" {
#endif

#include "hardwareDescription.h"

#define MAX_I2C_CHANNEL_COUNT 1

/*! Awailable I2C Channels Hadware dependent Register independent */
typedef enum{
	I2C_CH_1
}i2cCh_t;


/*! I2C Channel Base adress  Hadware dependent Register dependent*/
static const uint32_t i2cBase_Addr_List[MAX_I2C_CHANNEL_COUNT] =  {
	I2C1_BASE
};

/*! RCC Bus number index list connected to the I2C */
static const uint8_t i2cBus_No[MAX_I2C_CHANNEL_COUNT] = {
	1  /*!< I2C1 is connected to bus 1 */
};

/*! RCC I2C clock enable bit position for the given register*/
static const uint8_t i2cBus_En_bitPos[MAX_I2C_CHANNEL_COUNT] = {
	RCC_APB1ENR_I2C1EN_Pos
};

/*! RCC I2C reset bit position for the given register*/
static const uint8_t i2cBus_Rst_bitPos[MAX_I2C_CHANNEL_COUNT] = {
	RCC_APB1RSTR_I2C1RST_Pos
};

#ifdef __cplusplus
}
#endif

#endif // _HWD_I2C_H_