From f708b410a95d822bc9ef611eb08a0a9e7bcd696f Mon Sep 17 00:00:00 2001 From: kerem Date: Thu, 28 Jul 2022 17:53:33 +0200 Subject: [PATCH] Able to get register ack from slave ! Finally ! --- ked/csl/stm32f042/Src/i2c.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/ked/csl/stm32f042/Src/i2c.c b/ked/csl/stm32f042/Src/i2c.c index ca346d7..81ceb9c 100644 --- a/ked/csl/stm32f042/Src/i2c.c +++ b/ked/csl/stm32f042/Src/i2c.c @@ -116,10 +116,6 @@ void i2cMasterRecieve(i2c_t *i2cHardware, uint8_t devAddress, uint8_t registerAd //Set Buffer size I2C_BASE->CR2 |= 1 << I2C_CR2_NBYTES_Pos; - //Check if the TX buffer is empty - while(!(I2C_BASE->ISR & (I2C_ISR_TXE))); - //Register to be sent - I2C_BASE->TXDR |= 0xCE; //Generate start condition I2C_BASE->CR2 |= I2C_CR2_START; @@ -127,8 +123,12 @@ void i2cMasterRecieve(i2c_t *i2cHardware, uint8_t devAddress, uint8_t registerAd //Wait until the start condition in generated. while(!(I2C_BASE->ISR & (I2C_ISR_BUSY))); + //Check if the TX buffer is empty + while(!(I2C_BASE->ISR & (I2C_ISR_TXE))); + //Register to be sent + I2C_BASE->TXDR |= 0xf0; - //while(!(I2C_BASE->ISR & (I2C_ISR_RXNE))); + while(!(I2C_BASE->ISR & (I2C_ISR_RXNE))); i2cCR1= I2C_BASE->CR1; i2cCR2= I2C_BASE->CR2;