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@ -3,38 +3,78 @@
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// generic implementation of spi channel class
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void spiInitMaster(spiCH_t spi_hw_ch,
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spi_mode_t mode,
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spi_clkPol_t clockPolarity,
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spi_phase_t phase,
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spi_framef_t frameFormat,
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spi_comMode_t comMode,
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uint32_t prescaler)
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{
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#if 0
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RCC->APB2ENR |= (1<<12); // Enable SPI1 CLock
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SPI1->CR1 |= (1<<0)|(1<<1); // CPOL=1, CPHA=1
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//SPI_BASE->CR1 |= (1<<0) | (1 << 1);
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SPI1->CR1 |= (1<<2); // Master Mode
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//SPI_BASE->CR1 |= (1 << 2);
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SPI1->CR1 |= (3<<3); // BR[2:0] = 011: fPCLK/16, PCLK2 = 80MHz, SPI clk = 5MHz
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//SPI_BASE-> CR1 |= (3<<3);
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SPI1->CR1 &= ~(1<<7); // LSBFIRST = 0, MSB first
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//SPI_BASE->CR1 &= ~(1<<7);
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SPI1->CR1 |= (1<<8) | (1<<9); // SSM=1, SSi=1 -> Software Slave Management
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//SPI_BASE->CR1 |= (1 << 8) | (1 << 9);
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SPI1->CR1 &= ~(1<<10); // RXONLY = 0, full-duplex
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//SPI_BASE->CR1 &= ~(1<<10);
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SPI1->CR1 &= ~(1<<11); // CRCL =0, 8 bit data
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//SPI_BASE->CR1 &= ~(1 << 11);
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#endif
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#if 1
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//RCC->APB2ENR |= (1<<12); // Enable SPI1 CLock
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spiEnableBus(spi_hw_ch);
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//SPI1->CR1 |= (1<<0)|(1<<1); // CPOL=1, CPHA=1
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SPI_BASE->CR1 |= (1<<2) | (1 << 1);
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//SPI_BASE->CR1 |= (1<<0) | (1 << 1);
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spiSetPolarity(spi_hw_ch,clockPolarity);
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spiSetPhase(spi_hw_ch,phase);
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//SPI1->CR1 |= (1<<2); // Master Mode
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SPI_BASE->CR1 |= (1 << 2);
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//SPI_BASE->CR1 |= (1 << 2);
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spiSetMode(spi_hw_ch, SPI_MASTER);
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//SPI1->CR1 |= (3<<3); // BR[2:0] = 011: fPCLK/16, PCLK2 = 80MHz, SPI clk = 5MHz
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SPI_BASE-> CR1 |= (3<<3);
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//SPI_BASE-> CR1 |= (3<<3);
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spiSetClockPrescaler(spi_hw_ch, prescaler);
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//SPI1->CR1 &= ~(1<<7); // LSBFIRST = 0, MSB first
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SPI_BASE->CR1 &= ~(1<<7);
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//SPI_BASE->CR1 &= ~(1<<7);
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spiSetFrameFormat(spi_hw_ch,frameFormat);
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//SPI1->CR1 |= (1<<8) | (1<<9); // SSM=1, SSi=1 -> Software Slave Management
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SPI_BASE->CR1 |= (1 << 8) | (1 << 9);
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spiSetSoftwareSlaveManagement(spi_hw_ch,1);
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//SPI1->CR1 &= ~(1<<10); // RXONLY = 0, full-duplex
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SPI_BASE->CR1 &= ~(1<<10);
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//spiSetComMode(spi_hw_ch, comMode);
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//SPI1->CR1 &= ~(1<<11); // DFF=0, 8 bit data
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//SPI1->CR1 &= ~(1<<11); // CRCL =0, 8 bit data
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SPI_BASE->CR1 &= ~(1 << 11);
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//spiDissable(spi_hw_ch);
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#endif
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//SPI1->CR2 = 0;
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SPI_BASE->CR2 = 0;
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//SPI_BASE->CR2 = 0;
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/*
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spiReset(spi_ch);
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@ -51,7 +91,7 @@ void spiInitMaster(spiCH_t spi_hw_ch,
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spiSetClockPrescaler(spi_ch, prescaler);
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spiDissable(spi_ch);
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spiDissable(spi_hw_ch);
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*/
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}
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@ -194,7 +234,7 @@ void spiWrite32bit(spi_ch_t *spi_ch,
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{
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pinWrite(spi_ch->pin,0);
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if(spi_ch->format == LSB_FIRST) {
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spiTrx(spi_ch->spi,(uint8_t)(bits >> 32));
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spiTrx(spi_ch->spi,(uint8_t)(bits >> 24));
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spiTrx(spi_ch->spi,(uint8_t)(bits >> 16));
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spiTrx(spi_ch->spi,(uint8_t)(bits >> 8));
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spiTrx(spi_ch->spi,(uint8_t)(bits));
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@ -202,7 +242,7 @@ void spiWrite32bit(spi_ch_t *spi_ch,
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spiTrx(spi_ch->spi,(uint8_t)(bits));
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spiTrx(spi_ch->spi,(uint8_t)(bits >> 8));
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spiTrx(spi_ch->spi,(uint8_t)(bits >> 16));
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spiTrx(spi_ch->spi,(uint8_t)(bits >> 32));
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spiTrx(spi_ch->spi,(uint8_t)(bits >> 24));
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}
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pinWrite(spi_ch->pin,1);
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}
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