From a43ded526c84f601ed0d9b1a12b891b12ba68647 Mon Sep 17 00:00:00 2001 From: polymurph Date: Mon, 20 Dec 2021 14:51:45 +0100 Subject: [PATCH] documentation of code... ongoing --- .../stm32f042/Device/hardwareDescription.h | 35 +++++++++++++------ 1 file changed, 24 insertions(+), 11 deletions(-) diff --git a/bsl/csl/stm32f042/Device/hardwareDescription.h b/bsl/csl/stm32f042/Device/hardwareDescription.h index 32986ff..284e837 100644 --- a/bsl/csl/stm32f042/Device/hardwareDescription.h +++ b/bsl/csl/stm32f042/Device/hardwareDescription.h @@ -35,10 +35,7 @@ #define MAX_PORT_B_PIN_NO 15 #define MAX_PORT_F_PIN_NO 1 - - - - +/*! Pin number typedef enum. It contains all the available pins */ typedef enum { // NAME = BASE ADDR | PORT | PIN NO @@ -71,12 +68,17 @@ typedef enum pinF0 = 0x20 | 0, /*!< Port: F Pin: 0 -> Port F Mask | Pin Mask */ pinF1 = 0x20 | 1 /*!< Port: F Pin: 1 -> Port F Mask | Pin Mask */ }pinNo_t; - + +/**List of all possible port base addresses. This is used for the funcionality of of pin.h*/ static const uint32_t portBase_Addr_List[MAX_N_PORTS_COUNT] = { - GPIOA_BASE, - GPIOB_BASE, - GPIOF_BASE}; - + GPIOA_BASE, //!< Base address Port A + GPIOB_BASE, //!< Base address Port B + GPIOF_BASE //!< Base address Port F +}; + +/*! This is a bitmap list of all possible alternative functions for each pin. + * 1means that there is an alternative function available and 0 for none. Tis is used + * for the functionality in pin.h*/ static const uint8_t altFunc_List[MAX_N_PORTS_COUNT][MAX_PORT_PINS_COUNT] = { { // PORT A 0b01110000, //PA0 @@ -135,7 +137,10 @@ static const uint8_t altFunc_List[MAX_N_PORTS_COUNT][MAX_PORT_PINS_COUNT] = { }; -/*! Enum for awailable timer DS Page: 12 (block diagaram) The order of the enums is very important and should not be changed as it is used ofr table indexing */ +/** + * Enum for awailable timer DS Page: 12 (block diagaram) The order of the enums is very important + * and should not be changed as it is used ofr table indexing + * */ typedef enum { timer_1, /*!< Advanced control 16-bit timer with PWM capability RM Page: 320 */ timer_2, /*!< General purpose 32-bit timer RM Page: 393 */ @@ -145,7 +150,9 @@ typedef enum { timer_17 /*!< General purpose 16-bit timer RM Page: 480 */ } timerNo_t; -/*! Enum for awailable clok sources RM Page: 95 */ +/** + * Enum for awailable clok sources RM Page: 95 + * */ typedef enum { HSI, /*!< High speed internal */ HSE, /*!< High speed external */ @@ -153,6 +160,9 @@ typedef enum { LSE /*!< Low speed External */ }clkSources_t; +/** + * Timer base addresslist of all available timers + * */ static const uint32_t timerBase_Addr_List[MAX_TIMER_CHANNEL_COUNT] = { TIM1_BASE, TIM2_BASE, @@ -162,6 +172,9 @@ static const uint32_t timerBase_Addr_List[MAX_TIMER_CHANNEL_COUNT] = { TIM17_BASE }; +/** + * RCC clock enabcke bit position for the given register + * */ static const uint8_t timerBus_En_bitPos[MAX_TIMER_CHANNEL_COUNT] = { RCC_APB2ENR_TIM1EN_Pos, RCC_APB1ENR_TIM2EN_Pos,