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first GPIO bare level implementation /bsl/nucleo_f042k6/periferals/gpio | it's on the false directory but it's easy to change

Browse Source
interrupts
key 4 years ago
parent 117630b3f4
commit 8429f4859c
12 changed files with 128 additions and 65 deletions
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bsl/csl/stm32f042/Docs/dm00031936-stm32f0x1stm32f0x2.pdf
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bsl/csl/stm32f042/Docs/stm32f042k6.pdf
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bsl/csl/stm32f042/Src/stm32f0xx_csl.c
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@ -46,7 +46,7 @@
/* Private function prototypes -----------------------------------------------*/
void SystemClock_Config(void);
static void MX_GPIO_Init(void);
//static void MX_GPIO_Init(void);
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
@ -88,7 +88,7 @@ int stmStart()
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
// MX_GPIO_Init();
/* USER CODE BEGIN 2 */
/* USER CODE END 2 */

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bsl/nucleo_f042k6/Docs/dm00231744-stm32-nucleo-mb1180.pdf
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15
bsl/nucleo_f042k6/periferals/gpio/gpio.cpp
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@ -1,5 +1,8 @@
#include "gpio.hpp"
#include "../../bsl_nucleo_f042k6.h"
//#include "/home/key/git/ked/bsl/csl/stm32f042/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h"
#include "gpioMap.hpp"
#define PIN_COUNT 26
class Gpio::gpioImpl
@ -15,6 +18,12 @@ class Gpio::gpioImpl
gpioImpl()
{
//Enable clock access to GPIOA
RCC_AHBENR |= IOPBEN;
//Set pin B3 as output pin
GPIOX_MODER |= (1U<<10); //Set bit 10 to 1
GPIOX_MODER &=~ (1U<<11); //Set bit 11 to 0
}
void setFunction(uint8_t gpioNo, Gpio::pinFunction function)
@ -51,11 +60,13 @@ class Gpio::gpioImpl
{
if(value == 1)
{
LL_GPIO_SetOutputPin(LED_G_GPIO_Port,LED_G_Pin);
GPIOB_ODR |= LED_PIN;
//LL_GPIO_SetOutputPin(LED_G_GPIO_Port,LED_G_Pin);
}
else if(value == 0)
{
LL_GPIO_ResetOutputPin(LED_G_GPIO_Port,LED_G_Pin);
GPIOB_ODR &=~ LED_PIN;
//LL_GPIO_ResetOutputPin(LED_G_GPIO_Port,LED_G_Pin);
}
}

45
bsl/nucleo_f042k6/periferals/gpio/gpioMap.hpp
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@ -0,0 +1,45 @@
/*
* My gola is to write my own gio lib
*
*/
//USER LED GREEN
//PORT B
//PIN 3
//#define PERIPH_BASE (0x40000000UL)
#define AHB1_PERIPH_OFFSET (0x00020000UL)
#define AHB1_PERIPH_BASE (PERIPH_BASE + AHB1_PERIPH_OFFSET)
#define AHB2_PERIPH_OFFSET (0x08000000UL)
#define AHB2_PERIPH_BASE (PERIPH_BASE + AHB2_PERIPH_OFFSET)
#define GPIOA_OFFSET (0x0000U)
//#define GPIOA_BASE (AHB2_PERIPH_BASE + GPIOA_OFFSET)
#define GPIOB_OFFSET (0x00000400UL)
//#define GPIOB_BASE (AHB2_PERIPH_BASE + GPIOB_OFFSET)
#define RCC_OFFSET (0x00021000UL)
//#define RCC_BASE (AHB1_PERIPH_BASE + RCC_OFFSET)
//https://stackoverflow.com/questions/18785991/define-regx-volatile-unsigned-int-x
#define AHBENR_OFFSET (0x14UL)
#define RCC_AHBENR (*(volatile unsigned int *)(RCC_BASE + AHBENR_OFFSET))
#define IOPAEN (1U << 17)
#define IOPBEN (1U << 18)
#define MODER_OFFSET (0x00UL)
#define GPIOX_MODER (*(volatile unsigned int *)(GPIOB_BASE + MODER_OFFSET))
#define GPIOX_ODR_OFFSET (0x14UL)
#define GPIOB_ODR (*(volatile unsigned int *)(GPIOB_BASE + GPIOX_ODR_OFFSET))
#define PINB3 (1U<<3)
#define LED_PIN PINB3

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build/bsl/nucleo_f042k6/periferals/gpio/CMakeFiles/stmGpio.dir/CXX.includecache
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@ -175,4 +175,8 @@ gpio.hpp
/home/key/git/ked/bsl/nucleo_f042k6/periferals/gpio/gpio.hpp
../../bsl_nucleo_f042k6.h
/home/key/git/ked/bsl/nucleo_f042k6/bsl_nucleo_f042k6.h
gpioMap.hpp
/home/key/git/ked/bsl/nucleo_f042k6/periferals/gpio/gpioMap.hpp
/home/key/git/ked/bsl/nucleo_f042k6/periferals/gpio/gpioMap.hpp

1
build/bsl/nucleo_f042k6/periferals/gpio/CMakeFiles/stmGpio.dir/depend.internal
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@ -27,3 +27,4 @@ bsl/nucleo_f042k6/periferals/gpio/CMakeFiles/stmGpio.dir/gpio.cpp.o
../periferals/gpio/gpio.hpp
/home/key/git/ked/bsl/nucleo_f042k6/bsl_nucleo_f042k6.h
/home/key/git/ked/bsl/nucleo_f042k6/periferals/gpio/gpio.cpp
/home/key/git/ked/bsl/nucleo_f042k6/periferals/gpio/gpioMap.hpp

1
build/bsl/nucleo_f042k6/periferals/gpio/CMakeFiles/stmGpio.dir/depend.make
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@ -26,4 +26,5 @@ bsl/nucleo_f042k6/periferals/gpio/CMakeFiles/stmGpio.dir/gpio.cpp.o: ../bsl/csl/
bsl/nucleo_f042k6/periferals/gpio/CMakeFiles/stmGpio.dir/gpio.cpp.o: ../periferals/gpio/gpio.hpp
bsl/nucleo_f042k6/periferals/gpio/CMakeFiles/stmGpio.dir/gpio.cpp.o: ../bsl/nucleo_f042k6/bsl_nucleo_f042k6.h
bsl/nucleo_f042k6/periferals/gpio/CMakeFiles/stmGpio.dir/gpio.cpp.o: ../bsl/nucleo_f042k6/periferals/gpio/gpio.cpp
bsl/nucleo_f042k6/periferals/gpio/CMakeFiles/stmGpio.dir/gpio.cpp.o: ../bsl/nucleo_f042k6/periferals/gpio/gpioMap.hpp

BIN
build/refOvenTest.bin
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Binary file not shown.

3
main.cpp
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@ -1,4 +1,5 @@
#include"main.hpp"
#include "periferals/gpio/gpio.hpp"
int main(int argc, char *argv[])
@ -11,7 +12,7 @@ int main(int argc, char *argv[])
LL_mDelay(500);
gpio.writePin(1,1);
LL_mDelay(500);
gpio.writePin(1,1);
gpio.writePin(1,0);
}
return 1;
}

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