iplemented all timer interrupts

master
polymurph 2 years ago
parent db1166e1b9
commit 70f2035c2c

@ -51,6 +51,19 @@ typedef enum {
TIM3_CAPTURECOMPARE_2,
TIM3_CAPTURECOMPARE_3,
TIM3_CAPTURECOMAPRE_4,
TIM14_CAPTURECOMPARE_1_OVERCAPTURE,
TIM14_CAPTURECOMPARE_1,
TIM14_UPDATE,
TIM16_CAPTURECOMPARE_1_OVERCAPTURE,
TIM16_BREAK,
TIM16_COMMUNICATION,
TIM16_CAPTURECOMPARE_1,
TIM16_UPDATE,
TIM17_CAPTURECOMPARE_1_OVERCAPTURE,
TIM17_BREAK,
TIM17_COMMUNICATION,
TIM17_CAPTURECOMPARE_1,
TIM17_UPDATE,
intTypeEND
}intrType_t;
@ -85,11 +98,22 @@ static const uint8_t interruptTypeIndexList[intTypeEND] =
TIM3_IRQn,
TIM3_IRQn,
TIM3_IRQn,
TIM3_IRQn
TIM3_IRQn,
TIM14_IRQn,
TIM14_IRQn,
TIM14_IRQn,
TIM16_IRQn,
TIM16_IRQn,
TIM16_IRQn,
TIM16_IRQn,
TIM16_IRQn,
TIM17_IRQn,
TIM17_IRQn,
TIM17_IRQn,
TIM17_IRQn,
TIM17_IRQn
};
#ifdef __cplusplus
}
#endif

@ -1,10 +1,13 @@
#include "interrupt.h"
#include "hwd_interrupt.h"
/**
* @brief Default Handler
*
* This handler is called when no interrupt handler was set
*/
static void defaultHandler(){};
// pointers to dedicated interrupt handlers
void intInit(
intrType_t intType,
intHandler_t handler,

@ -256,7 +256,7 @@ void TIM1_BRK_UP_TRG_COM_IRQn()
TIM1->SR &= ~TIM_SR_BIF;
((intHandler_t)(intHandlerList[TIM1_BREAK]))();
}
if(TIM1->SR & TIM_SR_UIF) {
TIM1->SR &= ~TIM_SR_UIF;
((intHandler_t)(intHandlerList[TIM1_UPDATE]))();
@ -412,4 +412,78 @@ void TIM3_IRQHandler()
((intHandler_t)(intHandlerList[TIM3_CAPTURECOMAPRE_4]))();
}
}
void TIM14_IRQn()
{
if(TIM14->SR & TIM_SR_CC1OF) {
TIM14-> SR &= ~TIM_SR_CC1OF;
((intHandler_t)(intHandlerList[TIM14_CAPTURECOMPARE_1_OVERCAPTURE]))();
}
if(TIM14->SR & TIM_SR_CC1IF) {
TIM14-> SR &= ~TIM_SR_CC1IF;
((intHandler_t)(intHandlerList[TIM14_CAPTURECOMPARE_1]))();
}
if(TIM14->SR & TIM_SR_UIF) {
TIM14-> SR &= ~TIM_SR_UIF;
((intHandler_t)(intHandlerList[TIM14_UPDATE]))();
}
}
void TIM16_IRQn()
{
if(TIM16->SR & TIM_SR_CC1OF) {
TIM16-> SR &= ~TIM_SR_CC1OF;
((intHandler_t)(intHandlerList[TIM16_CAPTURECOMPARE_1_OVERCAPTURE]))();
}
if(TIM16->SR & TIM_SR_BIF) {
TIM16-> SR &= ~TIM_SR_BIF;
((intHandler_t)(intHandlerList[TIM16_BREAK]))();
}
if(TIM16->SR & TIM_SR_COMIF) {
TIM16-> SR &= ~TIM_SR_COMIF;
((intHandler_t)(intHandlerList[TIM16_COMMUNICATION]))();
}
if(TIM16->SR & TIM_SR_CC1IF) {
TIM16-> SR &= ~TIM_SR_CC1IF;
((intHandler_t)(intHandlerList[TIM16_CAPTURECOMPARE_1]))();
}
if(TIM16->SR & TIM_SR_UIF) {
TIM16-> SR &= ~TIM_SR_UIF;
((intHandler_t)(intHandlerList[TIM16_UPDATE]))();
}
}
void TIM117_IRQn()
{
if(TIM17->SR & TIM_SR_CC1OF) {
TIM17-> SR &= ~TIM_SR_CC1OF;
((intHandler_t)(intHandlerList[TIM17_CAPTURECOMPARE_1_OVERCAPTURE]))();
}
if(TIM17->SR & TIM_SR_BIF) {
TIM17-> SR &= ~TIM_SR_BIF;
((intHandler_t)(intHandlerList[TIM17_BREAK]))();
}
if(TIM17->SR & TIM_SR_COMIF) {
TIM17-> SR &= ~TIM_SR_COMIF;
((intHandler_t)(intHandlerList[TIM17_COMMUNICATION]))();
}
if(TIM17->SR & TIM_SR_CC1IF) {
TIM17-> SR &= ~TIM_SR_CC1IF;
((intHandler_t)(intHandlerList[TIM17_CAPTURECOMPARE_1]))();
}
if(TIM17->SR & TIM_SR_UIF) {
TIM17-> SR &= ~TIM_SR_UIF;
((intHandler_t)(intHandlerList[TIM17_UPDATE]))();
}
}
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