From 0b46bcc24a1f948abfeb8242c77db9f281d51274 Mon Sep 17 00:00:00 2001 From: polymurph <eddyed.k@gmail.com> Date: Wed, 3 Aug 2022 11:32:40 +0200 Subject: [PATCH] cleanup + work on implementation --- ked/csl/stm32f042/Src/imp_spi.c | 73 +++------------------------------ main.c | 4 +- 2 files changed, 8 insertions(+), 69 deletions(-) diff --git a/ked/csl/stm32f042/Src/imp_spi.c b/ked/csl/stm32f042/Src/imp_spi.c index 2a08076..d4c1dc9 100644 --- a/ked/csl/stm32f042/Src/imp_spi.c +++ b/ked/csl/stm32f042/Src/imp_spi.c @@ -1,51 +1,13 @@ #include "spi.h" -#include "usart.h" //#define SPI_BASE ((SPI_TypeDef *)spiBase_Addr_List[spi_hw_ch]) -// https://controllerstech.com/spi-using-registers-in-stm32/ -/* -void spiInit(spiCH_t spi_hw_ch) -{ - spiReset(spi_hw_ch); - - // TODO implement bittwiddeling etc. for generic SPI init - RCC->APB2ENR |= (1<<12); // Enable SPI1 CLock - - //SPI1->CR1 |= (1<<0)|(1<<1); // CPOL=1, CPHA=1 - SPI_BASE->CR1 |= (1<<2) | (1 << 1); - - //SPI1->CR1 |= (1<<2); // Master Mode - SPI_BASE->CR1 |= (1 << 2); - - //SPI1->CR1 |= (3<<3); // BR[2:0] = 011: fPCLK/16, PCLK2 = 80MHz, SPI clk = 5MHz - SPI_BASE-> CR1 |= (3<<3); - - //SPI1->CR1 &= ~(1<<7); // LSBFIRST = 0, MSB first - SPI_BASE->CR1 &= ~(1<<7); - - //SPI1->CR1 |= (1<<8) | (1<<9); // SSM=1, SSi=1 -> Software Slave Management - SPI_BASE->CR1 |= (1 << 8) | (1 << 9); - - //SPI1->CR1 &= ~(1<<10); // RXONLY = 0, full-duplex - SPI_BASE->CR1 &= ~(1<<10); - - //SPI1->CR1 &= ~(1<<11); // DFF=0, 8 bit data - SPI_BASE->CR1 &= ~(1 << 11); - - //SPI1->CR2 = 0; - SPI_BASE->CR2 = 0; -} -*/ void spiReset(spiCH_t spi_hw_ch) { if(spiBus_No[spi_hw_ch] == 1) { RCC->APB1RSTR |= (1 << spiBus_Rst_bitPos[spi_hw_ch]); RCC->APB1RSTR &= ~(1 << spiBus_Rst_bitPos[spi_hw_ch]); - print_Usart(usart2, "BUS 1\n\r"); return; } - - print_Usart(usart2, "BUS 2\n\r"); RCC->APB2RSTR |= (1 << spiBus_Rst_bitPos[spi_hw_ch]); RCC->APB2RSTR &= ~(1 << spiBus_Rst_bitPos[spi_hw_ch]); @@ -54,27 +16,22 @@ void spiReset(spiCH_t spi_hw_ch) void spiEnableBus(spiCH_t spi_hw_ch) { if(spiBus_No[spi_hw_ch] == 1) { - print_Usart(usart2,"BUS EN 1\n\r"); RCC->APB1ENR |= (1 << spiBus_En_bitPos[spi_hw_ch]); return; } - print_Usart(usart2,"BUS EN 2\n\r"); RCC->APB2ENR |= (1 << spiBus_En_bitPos[spi_hw_ch]); } void spiEnable(spiCH_t spi_hw_ch) { - - //SPI1->CR1 |= (1<<8) | (1<<9); // SSM=1, SSi=1 -> Software Slave Management - //SPI_BASE->CR1 |= (1 << 8) | (1 << 9); - - SPI_BASE->CR1 |= SPI_CR1_SPE; } void spiDissable(spiCH_t spi_hw_ch) { + // TODO: implement p.768 procedure for dissabling + //while(SPI_BASE->SR SPI_BASE->CR1 &= ~SPI_CR1_SPE; } @@ -149,34 +106,16 @@ void spiSetInternalSlaveSelect(spiCH_t spi_hw_ch, uint8_t logic) uint8_t spiTrx8BitPolling(spiCH_t spi_hw_ch, uint8_t tx_data) { - uint8_t data; - // example - // wait for BSY bit to Reset -> This will indicate that SPI is not busy in communication - while (((SPI_BASE->SR)&(1<<7))); + while (SPI_BASE->SR & SPI_SR_BSY); // from example code p.975 f // this masking must be done. otherwise 16bits frame will be used *(uint8_t*)&(SPI_BASE->DR) = tx_data; // Wait for RXNE to set -> This will indicate that the Rx buffer is not empty - while (!((SPI_BASE->SR) &(SPI_SR_RXNE))); - data = SPI_BASE->DR; - - return *(uint8_t*)&(SPI_BASE->DR); - - -// implementation 2. step -#if 0 - // wait for SPY ready - while((SPI_BASE->SR) & (1 << 7)); - - // load tx data - SPI_BASE->DR = tx_data; - - // Wait for RXNE flag to be set which indicates transmit complete - while(!((SPI_BASE->SR) & (1<<0)); + while (!(SPI_BASE->SR &SPI_SR_RXNE)); - return SPI_BASE->DR; -#endif + return *(uint8_t*)&(SPI_BASE->DR); } + diff --git a/main.c b/main.c index 3970258..e4f521d 100644 --- a/main.c +++ b/main.c @@ -22,7 +22,7 @@ void max7219_test_display(spi_ch_t* spi_ch) // spiWrite16bit(spi_ch, 0x0F01); //delayMs(50); // spiWrite16bit(spi_ch, 0x0F01); - delayMs(1000); + delayMs(200); /* pinWrite(spi_ch->pin, 0); spiTrx(spi_ch->spi, 0x0F); @@ -32,7 +32,7 @@ void max7219_test_display(spi_ch_t* spi_ch) // set mode to shutdown spiWrite16bit(spi_ch, 0x0F00); - delayMs(1000); + delayMs(200); /* pinWrite(spi_ch->pin, 0); spiTrx(spi_ch->spi, 0x0C);