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started implementing spi

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redesign_interrupts
polymurph 3 years ago
parent b3a167dac3
commit 0201de364e
6 changed files with 771 additions and 2 deletions
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6
ked/csl/stm32f042/Src/CMakeLists.txt
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@ -28,3 +28,9 @@ target_compile_options(stmTimer PRIVATE ${C_FLAGS})
target_compile_definitions(stmTimer PRIVATE ${C_DEFS})
target_include_directories(stmTimer PUBLIC ${PERIFERALS_DIR} ${CSL_INCLUDES})
add_library(sub::timer ALIAS stmTimer)
add_library(stmSPI imp_spi.c)
target_compile_options(stmSPI PRIVATE ${C_FLAGS})
target_compile_definitions(stmSPI PRIVATE ${C_DEFS})
target_include_directories(stmSPI PUBLIC ${PERIFERALS_DIR} ${CSL_INCLUDES})
add_library(sub::imp_spi ALIAS stmSPI)

146
ked/csl/stm32f042/Src/imp_spi.c
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@ -0,0 +1,146 @@
#include "spi.h"
#define SPI_BASE ((SPI_TypeDef *)spiBase_Addr_List[spi_hw_ch])
void spiReset(spiCH_t spi_hw_ch)
{
if(spiBus_No[spi_hw_ch] == 1) {
RCC->APB1RSTR |= (1 << spiBus_Rst_bitPos[spi_hw_ch]);
RCC->APB1RSTR &= ~(1 << spiBus_Rst_bitPos[spi_hw_ch]);
return;
}
RCC->APB2RSTR |= (1 << spiBus_Rst_bitPos[spi_hw_ch]);
RCC->APB2RSTR &= ~(1 << spiBus_Rst_bitPos[spi_hw_ch]);
}
void spiEnableBus(spiCH_t spi_hw_ch)
{
if(spiBus_No[spi_hw_ch] == 1) {
RCC->APB1ENR |= (1 << spiBus_En_bitPos[spi_hw_ch]);
return;
}
RCC->APB2ENR |= (1 << spiBus_En_bitPos[spi_hw_ch]);
}
void spiEnable(spiCH_t spi_hw_ch)
{
SPI_BASE->CR1 |= SPI_CR1_SPE;
}
void spiDissable(spiCH_t spi_hw_ch)
{
// TODO: implement p.768 procedure for dissabling
//while(SPI_BASE->SR
SPI_BASE->CR1 &= ~SPI_CR1_SPE;
}
void spiSetMode(spiCH_t spi_hw_ch, spi_mode_t mode)
{
SPI_BASE->CR1 &= ~(mode << SPI_CR1_MSTR_Pos);
SPI_BASE->CR1 |= mode << SPI_CR1_MSTR_Pos;
// TODO: find out if this is the correct place to set the SSOE bit
SPI_BASE->CR2 &= ~SPI_CR2_SSOE;
if(mode == SPI_MASTER) {
SPI_BASE->CR2 |= SPI_CR2_SSOE;
}
}
void spiSetPolarity(spiCH_t spi_hw_ch, spi_clkPol_t clkPol)
{
// reset
SPI_BASE->CR1 &= ~SPI_CR1_CPOL;
// set
SPI_BASE->CR1 |= clkPol << SPI_CR1_CPOL_Pos;
}
void spiSetPhase(spiCH_t spi_hw_ch, spi_phase_t phase)
{
// reset
SPI_BASE->CR1 &= ~(phase << SPI_CR1_CPHA_Pos);
// set
SPI_BASE->CR1 |= phase << SPI_CR1_CPHA_Pos;
}
void spiSetBitFrameLength(spiCH_t spi_hw_ch, spi_framel_t framel)
{
SPI_BASE->CR2 &= ~(SPI_CR2_FRXTH | SPI_CR2_DS);
// using p.974 as example
if(framel == SPI_FRAME_LENGTH_8BIT) {
// set FIFO reception threshold to 8 bit
SPI_BASE->CR2 |= SPI_CR2_FRXTH;
// set transfer lwnght to 8 bit
SPI_BASE->CR2 |= SPI_CR2_DS_0 | SPI_CR2_DS_1 | SPI_CR2_DS_2;
return;
}
SPI_BASE->CR2 |= SPI_CR2_DS;
}
void spiSetFrameFormat(spiCH_t spi_hw_ch, spi_framef_t framef)
{
// reset
SPI_BASE->CR1 &= ~SPI_CR1_LSBFIRST;
// set
SPI_BASE->CR1 |= framef << SPI_CR1_LSBFIRST_Pos;
}
spi_framef_t spiGetFrameFormat(spiCH_t spi_hw_ch)
{
return (spi_framef_t)(SPI_BASE->CR1 & SPI_CR1_LSBFIRST) >> SPI_CR1_LSBFIRST_Pos;
}
void spiSetClockPrescaler(spiCH_t spi_hw_ch, uint32_t clkDiv)
{
// reset
SPI_BASE->CR1 &= ~SPI_CR1_BR;
// set
SPI_BASE->CR1 |= (clkDiv << SPI_CR1_BR_Pos) & SPI_CR1_BR;
}
void spiSetComMode(spiCH_t spi_hw_ch, spi_comMode_t comMode)
{
// reset
SPI_BASE->CR1 &= ~SPI_CR1_RXONLY;
// set
SPI_BASE->CR1 |= comMode << SPI_CR1_RXONLY_Pos;
}
void spiSetSoftwareSlaveManagement(spiCH_t spi_hw_ch, uint8_t logic)
{
SPI_BASE->CR1 &= ~SPI_CR1_SSM;
if(logic){
SPI_BASE->CR1 |= SPI_CR1_SSM;
}
}
void spiSetInternalSlaveSelect(spiCH_t spi_hw_ch, uint8_t logic)
{
SPI_BASE->CR1 &= ~SPI_CR1_SSI;
if(logic) {
SPI_BASE->CR1 |= SPI_CR1_SSI;
}
}
uint8_t spiTrx8BitPolling(spiCH_t spi_hw_ch, uint8_t tx_data)
{
// wait for BSY bit to Reset -> This will indicate that SPI is not busy in communication
while (SPI_BASE->SR & SPI_SR_BSY);
// from example code p.975 f
// this masking must be done. otherwise 16bits frame will be used
*(uint8_t*)&(SPI_BASE->DR) = tx_data;
// Wait for RXNE to set -> This will indicate that the Rx buffer is not empty
while (!(SPI_BASE->SR &SPI_SR_RXNE));
// TODO: test read!
return *(uint8_t*)&(SPI_BASE->DR);
}

4
ked/csl/stm32f042/config.cmake
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@ -73,7 +73,9 @@ set (MAIN_DEFS ${C_DEFS})
list(APPEND EXTRA_LIBS sub::startup)
#list(APPEND EXTRA_LIBS sub::translator)
list(APPEND EXTRA_LIBS sub::delay)
list(APPEND EXTRA_LIBS sub::pin)
list(APPEND EXTRA_LIBS sub::usart)
list(APPEND EXTRA_LIBS sub::timer)
list(APPEND EXTRA_LIBS sub::init)
list(APPEND EXTRA_LIBS sub::spi)
list(APPEND EXTRA_LIBS sub::imp_spi)
list(APPEND EXTRA_LIBS sub::pin)

8
ked/periferals/CMakeLists.txt
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@ -1 +1,7 @@
# add_subdirectory(${CSL_USED})
add_library(SPI spi.c)
target_compile_options(SPI PRIVATE ${C_FLAGS})
target_compile_definitions(SPI PRIVATE ${C_DEFS})
target_include_directories(SPI PUBLIC ${PERIFERALS_DIR} ${CSL_INCLUDES})
add_library(sub::spi ALIAS SPI)

219
ked/periferals/spi.c
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@ -0,0 +1,219 @@
#include "spi.h"
// generic implementation of spi channel class
void spiInitMaster(
spiCH_t spi_hw_ch,
spi_clkPol_t clockPolarity,
spi_phase_t phase,
spi_framef_t frameFormat,
spi_comMode_t comMode,
uint32_t prescaler,
pinNo_t clkPin,
uint16_t altFuncClkPin,
pinNo_t MOSIPin,
uint16_t altFuncMOSIPin,
pinNo_t MISOPin,
uint16_t altFuncMISOPin)
{
// GPIO setup
pinInit(clkPin);
pinInit(MOSIPin);
pinInit(MISOPin);
pinConfig(clkPin, alternate, pushPull, output, veryFast);
pinConfig(MISOPin, alternate, floating, input , veryFast);
pinConfig(MOSIPin, alternate, pushPull, output, veryFast);
pinSetAlternate(clkPin, altFuncClkPin);
pinSetAlternate(MOSIPin, altFuncMOSIPin);
pinSetAlternate(MISOPin, altFuncMISOPin);
// SPI setup
spiEnableBus(spi_hw_ch);
spiSetPolarity(spi_hw_ch,clockPolarity);
spiSetPhase(spi_hw_ch,phase);
spiSetMode(spi_hw_ch, SPI_MASTER);
spiSetClockPrescaler(spi_hw_ch, prescaler);
spiSetFrameFormat(spi_hw_ch,frameFormat);
spiSetSoftwareSlaveManagement(spi_hw_ch,1);
spiSetInternalSlaveSelect(spi_hw_ch,0);
spiSetComMode(spi_hw_ch, comMode);
spiSetClockPrescaler(spi_hw_ch, prescaler);
spiSetBitFrameLength(spi_hw_ch, SPI_FRAME_LENGTH_8BIT);
}
void spiSetupCH(spi_ch_t *ch, spiCH_t spi_hw_ch, pinNo_t chipselectPin)
{
ch->pin = chipselectPin;
ch->spi = spi_hw_ch;
pinWrite(chipselectPin, 0);
}
uint8_t spiReadReg(spi_ch_t *spi_ch, uint8_t reg_address) {
uint8_t buf;
// select target device
pinWrite(spi_ch->pin,0);
// send address of target register
spiTrx8BitPolling(spi_ch->spi, reg_address);
// read from target register
buf = spiTrx8BitPolling(spi_ch->spi,0x00);
// release target device
pinWrite(spi_ch->pin,1);
return buf;
}
void spiAutoReadBlock(spi_ch_t *spi_ch,
uint8_t start_address,
uint8_t* buffer,
uint8_t buf_len) {
uint8_t i = 0;
// select target device
pinWrite(spi_ch->pin,0);
// send address of starting register
spiTrx8BitPolling(spi_ch->spi, start_address);
// read block from device
for(;i < buf_len;i++) {
buffer[i] = spiTrx8BitPolling(spi_ch->spi, 0x00);
}
// release target device
pinWrite(spi_ch->pin,1);
}
void spiWriteReg(spi_ch_t *spi_ch,
uint8_t reg_address,
uint8_t data) {
// select target device
pinWrite(spi_ch->pin,0);
// send address of target register
spiTrx8BitPolling(spi_ch->spi, reg_address);
// write to target register
spiTrx8BitPolling(spi_ch->spi, data);
// release target device
pinWrite(spi_ch->pin,1);
}
void spiWriteBlock(spi_ch_t *spi_ch,
uint8_t start_address,
const uint8_t *data,
uint8_t data_len) {
uint8_t i = 0;
// select target device
pinWrite(spi_ch->pin,0);
// send address of starting register
spiTrx8BitPolling(spi_ch->spi, start_address);
// read block from device
for(;i < data_len;i++) {
spiTrx8BitPolling(spi_ch->spi, data[i]);
}
// release target device
pinWrite(spi_ch->pin,1);
}
void spiWrite8bit(spi_ch_t *spi_ch,
uint8_t bits)
{
pinWrite(spi_ch->pin,0);
spiTrx8BitPolling(spi_ch->spi,bits);
pinWrite(spi_ch->pin,1);
}
uint8_t spiReadWrite8bit(spi_ch_t *spi_ch,
uint8_t bits)
{
uint8_t buf;
pinWrite(spi_ch->pin,0);
buf = spiTrx8BitPolling(spi_ch->spi,bits);
pinWrite(spi_ch->pin,1);
return buf;
}
void spiWrite16bit(spi_ch_t *spi_ch,
uint16_t bits)
{
pinWrite(spi_ch->pin,0);
if(spiGetFrameFormat(spi_ch->spi) == SPI_MSB_FIRST) {
spiTrx8BitPolling(spi_ch->spi,(uint8_t)(bits >> 8));
spiTrx8BitPolling(spi_ch->spi,(uint8_t)(bits));
} else {
spiTrx8BitPolling(spi_ch->spi,(uint8_t)(bits));
spiTrx8BitPolling(spi_ch->spi,(uint8_t)(bits >> 8));
}
pinWrite(spi_ch->pin,1);
}
uint16_t spiReadWrite16bit(spi_ch_t *spi_ch,
uint16_t bits)
{
uint16_t buf;
pinWrite(spi_ch->pin,0);
if(spiGetFrameFormat(spi_ch->spi) == SPI_LSB_FIRST) {
buf = spiTrx8BitPolling(spi_ch->spi,(uint8_t)(bits >> 8)) << 8;
buf |= spiTrx8BitPolling(spi_ch->spi,(uint8_t)(bits));
} else {
buf = spiTrx8BitPolling(spi_ch->spi,(uint8_t)(bits));
buf |= spiTrx8BitPolling(spi_ch->spi,(uint8_t)(bits >> 8)) << 8;
}
pinWrite(spi_ch->pin,1);
return buf;
}
void spiWrite32bit(spi_ch_t *spi_ch,
uint32_t bits)
{
pinWrite(spi_ch->pin,0);
if(spiGetFrameFormat(spi_ch->spi) == SPI_LSB_FIRST) {
spiTrx8BitPolling(spi_ch->spi,(uint8_t)(bits >> 24));
spiTrx8BitPolling(spi_ch->spi,(uint8_t)(bits >> 16));
spiTrx8BitPolling(spi_ch->spi,(uint8_t)(bits >> 8));
spiTrx8BitPolling(spi_ch->spi,(uint8_t)(bits));
} else {
spiTrx8BitPolling(spi_ch->spi,(uint8_t)(bits));
spiTrx8BitPolling(spi_ch->spi,(uint8_t)(bits >> 8));
spiTrx8BitPolling(spi_ch->spi,(uint8_t)(bits >> 16));
spiTrx8BitPolling(spi_ch->spi,(uint8_t)(bits >> 24));
}
pinWrite(spi_ch->pin,1);
}
uint32_t spiReadWrite32bit(spi_ch_t *spi_ch,
uint8_t bits)
{
uint32_t buf;
pinWrite(spi_ch->pin,0);
if(spiGetFrameFormat(spi_ch->spi) == SPI_LSB_FIRST) {
buf = spiTrx8BitPolling(spi_ch->spi,(uint8_t)(bits >> 24)) << 24;
buf |= spiTrx8BitPolling(spi_ch->spi,(uint8_t)(bits >> 16)) << 16;
buf |= spiTrx8BitPolling(spi_ch->spi,(uint8_t)(bits >> 8)) << 8;
buf |= spiTrx8BitPolling(spi_ch->spi,(uint8_t)(bits));
} else {
buf = spiTrx8BitPolling(spi_ch->spi,(uint8_t)(bits));
buf |= spiTrx8BitPolling(spi_ch->spi,(uint8_t)(bits >> 8)) >> 8;
buf |= spiTrx8BitPolling(spi_ch->spi,(uint8_t)(bits >> 16)) >> 16;
buf |= spiTrx8BitPolling(spi_ch->spi,(uint8_t)(bits >> 24)) >> 24;
}
pinWrite(spi_ch->pin,1);
return buf;
}

390
ked/periferals/spi.h
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@ -0,0 +1,390 @@
/**
**************************************************************************************************
* @file spi.h
* @author Kerem Yollu & Edwin Koch
* @date 12.03.2022
* @version 1.0
**************************************************************************************************
* @brief This is the genral interface for spi.
*
* **Detailed Description :**
* This the spi interface and belongs to the interface layer.
*
**************************************************************************************************
*/
#ifndef _SPI_H_
#define _SPI_H_
#ifdef __cplusplus
extern "C" {
#endif
#include "hardwareDescription.h"
#include "pin.h"
// TODO: when everything worksmove this into imp.spi.c
//#include "hardwareDescription.h"
//#define SPI_BASE ((SPI_TypeDef *)spiBase_Addr_List[spi_hw_ch])
/*! Enum of possible States*/
typedef enum{
SPI_SLAVE,
SPI_MASTER
} spi_mode_t;
/* Enum of clock polarities*/
typedef enum{
SPI_NONINVERTED,
SPI_INVERTED
}spi_clkPol_t;
/*! Enum of phases*/
typedef enum{
SPI_CAPTURE_ON_FIRST_CLK_TRANSITION,
SPI_CAPTURE_ON_SECCOND_CLK_TRANSITION
} spi_phase_t;
/*! Enum of frame formats*/
typedef enum{
SPI_MSB_FIRST,
SPI_LSB_FIRST
}spi_framef_t;
/*! Enum of frame lenghts*/
typedef enum{
SPI_FRAME_LENGTH_8BIT,
SPI_FRAME_LENGTH_16BIT
}spi_framel_t;
/*! Enum of communication mode*/
typedef enum{
SPI_DOUPLEX,
SPI_SIMPLEX
}spi_comMode_t;
/*! \brief SPI cannel class
* This class cpntains the pin and spi channel number
* select.
* */
typedef struct{
pinNo_t pin; /*!< pin number */
spiCH_t spi; /*!< spi hardware channel number */
}spi_ch_t;
typedef uint8_t (*readReg_t) (uint8_t);
// generic code
/** TODO: setup init with all attributes
* TODO: setup auto pin set alternate function
* @brief This is the spi hardware channel class
* @param spi_hw_ch SPI hardware channel
*/
void spiInitMaster(
spiCH_t spi_hw_ch,
spi_clkPol_t clockPolarity,
spi_phase_t phase,
spi_framef_t frameFormat,
spi_comMode_t comMode,
uint32_t prescaler,
pinNo_t clkPin,
uint16_t altFuncClkPin,
pinNo_t MOSIPin,
uint16_t altFuncMOSIPin,
pinNo_t MISOPin,
uint16_t altFuncMISOPin);
/**
* \brief Set up SPI channel
* Set up a SPI channel by passig a hardware SPI channel and a chipselect pin.
* The chipselect pin will be set to high (chipselect is lowactive).
* \param *ch pointer to SPI channel
* \param spi_hw_ch SPI hardware channel
* \param chipslectPin designated pin for chipslect
*/
void spiSetupCH(
spi_ch_t *ch,
spiCH_t spi_hw_ch,
pinNo_t chipselectPin);
/**
* \brief Read register
* Read one byte from a one register with one byte address.
* \param *spi_ch spi pointer to spi channel object
* \param reg_address register address
* \return register content
*/
uint8_t spiReadReg(
spi_ch_t *spi_ch,
uint8_t reg_address);
/**
* \brief Read Block
* Read a block of data starting at a given start address.
* This function makes use of the auto register increment of the device to be read from.
* The address will be sent once and then data is read.
* \param *spi_ch pointer to spi cannel object
* \param start_address start address to the first register
* \param *buffer pointer to the buffer in which the read content is written into
* \param buf_len length of buffer
*/
void spiAutoReadBlock(
spi_ch_t *spi_ch,
uint8_t start_address,
uint8_t* buffer,
uint8_t buf_len);
/**
* \brief Write register
* Write one byte to one register with one byte address.
* \param *spi_ch pointer to spi channel object
* \param reg_address register address
* \param data data byte to be written into register
*
*/
void spiWriteReg(
spi_ch_t *spi_ch,
uint8_t reg_address,
uint8_t data);
/**
* \brief Write data block
* Write a block of data starting at a given start address.
* This function makes use of the auto register increment of the device to be written to. The
* address will be sent once an then data is written.
* \param *spi_ch pointer to spi channel object
* \param start_address start address of the first reister
* \param *data pointer to data to be written
* \param data_len length of data to be written
*/
void spiWriteBlock(
spi_ch_t *spi_ch,
uint8_t start_address,
const uint8_t *data,
uint8_t data_len);
/**
* \brief write 8 bits
* \param bits 8 bits
*/
void spiWrite8bit(
spi_ch_t *spi_ch,
uint8_t bits);
/**
* \brief read and write simultainously 8 bits
* \param bits 8 bits
* \return 8 bits
*/
uint8_t spiReadWrite8bit(
spi_ch_t *spi_ch,
uint8_t bits);
/**
* \brief write 16 bits
* \param bits 16 bits
*/
void spiWrite16bit(
spi_ch_t *spi_ch,
uint16_t bits);
/**
* \brief read and write simultainously 16 bits
* \param bits 16 bits
* \return 16 bits
*/
uint16_t spiReadWrite16bit(
spi_ch_t *spi_ch,
uint16_t bits);
/**
* \brief write 32 bits
* \param bits 32 bits
*/
void spiWrite32bit(
spi_ch_t *spi_ch,
uint32_t bits);
/**
* \brief read and write simultainously 32 bits
* \param bits 32 bits
* \return 32 bits
*/
uint32_t spiReadWrite32bit(
spi_ch_t *spi_ch,
uint8_t bits);
// implementation
/**
* @brief SPI hardware peripheral reset
* @param spi_hw_ch SPI hardware channel
*/
void spiReset(
spiCH_t spi_hw_ch);
/**
* @brief Enable Bus for SPI
* @param spi_hw_ch SPI hardware channel
*/
void spiEnableBus(
spiCH_t spi_hw_ch);
/**
* @brief Enable SPI hardware channel
* @param spi_hw_ch SPI hardware channel
*/
void spiEnable(
spiCH_t spi_hw_ch);
/**
* @brief Dissable SPI hardware channel
* @param spi_hw_ch SPI hardware channel
*/
void spiDissable(
spiCH_t spi_hw_ch);
/**
* @brief Set SPI operation mode (MASTER or SLAVE)
* @param spi_hw_ch SPI hardware channel
* @param mode
*/
void spiSetMode(
spiCH_t spi_hw_ch,
spi_mode_t mode);
/**
* @brief Set SPI clock polarity
* @param spi_hw_ch SPI hardware channel
* @param clkPol Clock polarity
*/
void spiSetPolarity(
spiCH_t spi_hw_ch,
spi_clkPol_t clkPol);
/**
* @breif Get SPI polarity
* @param spi_hw_ch SPI hardware channel
* @return polarity
*/
spi_clkPol_t spiGetPolarity(
spiCH_t spi_hw_ch);
/**
* @brief Set SPI clock phase
* @param spi_hw_ch SPI hardware channel
* @param phase
*/
void spiSetPhase(
spiCH_t spi_hw_ch,
spi_phase_t phase);
/**
* @brief Get SPI clock phase
* @param spi_hw_ch SPI hardware channel
* @return phase
*/
spi_phase_t spiGetPhase(
spiCH_t spi_hw_ch);
/**
* @brief Set frame length
* one can choose between 4/8/16 bits. For devices that not support a given frame length an error
* will be generated.
* @param spi_hw_ch SPI hardware channel
* @param framel Frame length
*/
void spiSetBitFrameLength(
spiCH_t spi_hw_ch,
spi_framel_t framel);
/**
* @brief Set SPI frame format
* @param spi_hw_ch SPI hardware channel
* @param framef Frame format
*/
void spiSetFrameFormat(
spiCH_t spi_hw_ch,
spi_framef_t framef);
/**
* @brief Get SPI frame format
* @param spi_hw_ch SPI hardware channel
* @return Frame format
*/
spi_framef_t spiGetFrameFormat(
spiCH_t spi_hw_ch);
/**
* @brief Set Clock Prescaler
* This is dependent on your target device. Please enter in the correct value.
* The entered Value will be masked with the maximal number of bits (truncated)
* @param spi_hw_ch SPI hardware channel
* @param clkDiv
*/
void spiSetClockPrescaler(
spiCH_t spi_hw_ch,
uint32_t clkDiv);
/**
* @brief Set communication Mode
* @param spi_hw_ch SPI hardware channel
* @param comMode
*/
void spiSetComMode(
spiCH_t spi_hw_ch,
spi_comMode_t comMode);
/**
* @brief Get Clock Prescaler
* @param spi_hw_ch SPI hardware channel
* @return prescaler
*/
uint32_t spiGetClockPrescaler(
spiCH_t spi_hw_ch);
#if 0
/**
* @brief Set software slave management
* @param logic 1 = enabled, 0 = dissabled
*/
void spiSetSoftwareSlaveManagement(spiCH_t spi_hw_ch, uint8_t logic);
#endif
/**
* @brief Enable software slave management
* @param spi_hw_ch SPI hardware channel
* @param logic Slave management done by software... 1 = enables / 0 = dissabled
*/
void spiSetSoftwareSlaveManagement(
spiCH_t spi_hw_ch,
uint8_t logic);
/**
* @brief Enable internal slave select
* @param spi_hw_ch SPI hardware channel
* @param logic 1 = enable / 0 = dissable
*/
void spiSetInternalSlaveSelect(
spiCH_t spi_hw_ch,
uint8_t logic);
/*!
* @brief Transmits and receives one byte of data in polling mode
* @param spi_hw_ch SPI hardware channel
* @param tx_data 'tx_data' The byte to be transmitted"
* @return The received data
*/
uint8_t spiTrx8BitPolling(
spiCH_t spi_hw_ch,
uint8_t tx_data);
#ifdef __cplusplus
}
#endif
#endif // _SPI_H_
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