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KED/csl/stm32f042/Src/imp_interrupt.c

99 lines
1.5 KiB

#include "interrupt.h"
//static void defaultHandler(){};
static uint32_t intHandlerList[intTypeEND]={0,0,0,0,0,0,0,0,0,0};
// pointers to dedicated interrupt handlers
void intInit(
intrType_t intType,
intHandler_t handler,
uint8_t priority)
{
NVIC_SetPriority(interruptTypeIndexList[intType], priority);
// TODO: add index ceck!
intHandlerList[intType] = (uint32_t)handler;
}
void intEnableAll()
{
__enable_irq();
}
void intDissableAll()
{
__disable_irq();
}
void intEnable(
intrType_t intType)
{
NVIC_EnableIRQ(interruptTypeIndexList[intType]);
}
void intDissable(
intrType_t intType)
{
NVIC_DisableIRQ(interruptTypeIndexList[intType]);
}
// Interrupt service routines
void TIM2_IRQHandler()
{
if(TIM2->SR & TIM_SR_UIF) {
// clear flag
TIM2-> SR &= ~TIM_SR_UIF;
//TODO: call handler here
((intHandler_t)(intHandlerList[TIM2_UPDATE]))();
}
if(TIM2->SR & TIM_SR_CC1IF) {
TIM2-> SR &= ~TIM_SR_CC1IF;
}
if(TIM2->SR & TIM_SR_CC2IF) {
TIM2-> SR &= ~TIM_SR_CC2IF;
}
if(TIM2->SR & TIM_SR_CC3IF) {
TIM2-> SR &= ~TIM_SR_CC3IF;
}
if(TIM2->SR & TIM_SR_CC4IF) {
TIM2-> SR &= ~TIM_SR_CC4IF;
}
if(TIM2->SR & TIM_SR_TIF) {
TIM2-> SR &= ~TIM_SR_TIF;
}
if(TIM2->SR & TIM_SR_CC1OF) {
TIM2-> SR &= ~TIM_SR_CC1OF;
}
if(TIM2->SR & TIM_SR_CC2OF) {
TIM2-> SR &= ~TIM_SR_CC2OF;
}
if(TIM2->SR & TIM_SR_CC3OF) {
TIM2-> SR &= ~TIM_SR_CC3OF;
}
if(TIM2->SR & TIM_SR_CC4OF) {
TIM2-> SR &= ~TIM_SR_CC4OF;
}
}